A REPORT ON THE EIJIAG
(Electronic Nuraerical Integrator and Computer)
■Report of V/ork under Contract No, •■/-670-0RD-4926
Be-Gween
Ordnance Derartiaont ,^ United States Arm}
^%_shin[^ton. D, C._
and
Tho^ University of Pennsylvania
MSPJ.^, School of Sloctrical Engineering
Ph il ado 1 ph ia. Pa.
#<
■ ■' ' u ^ , PREFACE
The Report on the ENIAC consists of five separately bound parts,
as follows:
1, ENIAC Operating Manual
2, ENIAC Maintenance Manual
3, Part I, Technical Description of the ENIAC
Voluiae I (Chapters I to VI)
4, Part I, Technical Description of the ENIAC
Volume II (Chapters VII to XI)
5, Part II, Technical Description of the ENIAC
Included with the Operating Manual and Parts I and II of the Technical
Description are all drawings (see table 0,3 below) which are required for
understanding these reports. The Maintenance iianual assiunes access to the
complete file of ENIAC drawings.
Part I of the Technical Description is intended for those who
wish to have a general understanding of how the ENIAC works, without con-
cerning themselves with the details of the circuits; it assumes no knowledge
of electronics or circuit theory. Part II is intended for those who require
a detailed understanding of the circuits. Its organization, to a great extent,
duplicates that of Part I so as to make cross referencing between the two parts
easy.
The ENIAC Operating Manual contains a complete set of instructions
for operating the ENIhC, It includes very little explanatory material, and
hence assumes familiarity with Part I of the Technical Description of the
ENIAC, The ENIAC Maintenance Manual includes description of the various test
units and procedures for testing, as W;:ill as a list of common and probable
sources of trouble. It assumes a complete understanding of the circuits of
ENIAC, i.e. a knowledge of both Parts I and II of the Technical Description
of the ENIAC.
0^
The Report on the ENIAC and the complete file of ENIAC drawings
constitute a complete description and set of instructions for operation and
maintenance of the machine ♦ The drawings carry a number of the form PX-n-m,
The following tables give the classification according to this numbering system.
TABLE 0.1
Values of
n
Division
1
General
2
Tost Equipment
3
Racks and Panels
4
Trays, Cables, Adaptors, and Load Boxes
5
Accumulators
6
High Speed Multiplier
7
Function Table
8
Master Programmer
9
Cycling Unit and Initiating Unit
10
Divider and Square Rooter
11
Constant Transmitter
12
Printer
13
Power Supplies
Values of
m
101-200
201-300
301-400
401-500
TABLE 0,2
Subject
Wiring Dlagr-ams
Mechanical Drawings
Report Drawings
Illustration Problem Set-Ups.
The reader of this report will be primajrily interested in the types
of drawings listed in the following paragraphs, A table on page 4 gives the
corresponding drawing number for each unit of the ENIAC.
1) Front Panel Drawings, These drawings show in some detail the
switches, sockets, etc., for each panel of each unit. They contain the
essential instructions for setting up a problem on the ENIaC.
2) Front View Drawings, There is one of these drawings for each
kind of panel used in the various units of the ENIAC, These show the relative
position of the trays and the location of the various neon lights. Since these
drawings show the neon lights, they can bo used to check the proper operation of
the various units,
3) Block Diagrams. These drawings illustrate the logical essentials
of the internal circuits of each unit. That is, resistors, condensers, and
some other electrical details are not shown; but conplete channels (paths of
pulses or gates representing numbers or program signals) are shown in all their
multiplicity. These drawings will be of interest to those who are interested
in Parts I and II of the Technical Report,
4) Cross-section Diagrams, These drawings are electronically complete
except that only one channel is shown where there is more than one. Thus, these
drawings show every resistor and condenser and any other electronic elements .
belonging to any circuit. These drawings will be of particular interest to
the maintenance personnel and to those reading' Part II of the technical report,
5) Detail Drawings. All other drawings of the ENIAC come under
this heading. A complete file of drawings is available at the location of the
ENIAC#
Table 0.3
EHIAC DRA/^NGS
Unit
Front Panel
Front Viev^
Block Diagram
Cross - Section
Initiating
Unit
PX~9-302
9-302R
PX-9-305 PX-9-307
Cycling Unit
pX-9-303
9-303R
PX-9-304
PX-9-307
Accumulator
PX-5-301
PX-5-305
PX-5-304
?X-5-ll$
Multiplier
PX-6-302
6-302R
6-303
6-303R
6-304
6-30/4pt
PX-6-309
PX-6-308
PX-6-112A
6-112B
Function Table
PX-7-302
7-302R
7-303
7-303R
PX-7-305
PX-7-304
PX-7-117
7-118
Divider and
Square Rooter
PX-10-301
IO-3OIR
PX-lO-302
PX-lO-304
Constant Trans-
mitter
PX-11-302
11-302R
11-303
II-3O3R
11-304
11-304R
PX-11-306
PX-ll-307
PX-11-116
11-309
(C.T. and R.)
Printer
PX-12-301
I2-3OIR
12-302
12-302R
12-303
12-303R
PX-12-306
PX-12-307
PX-12-115
MB-ster Pro-
grammer
PX-8-301
8-3OIR
8-302
8-302R
PX-8-303
PX-8-304
PX-8-102
Other drawings of particular interest:
Floor Plan PX-1-302 IBM Punch and PX-12-112
n.C. Varing PX-1-303 Plugboard PX-12-305
IBM Reader and PX-11-119 Pulse ..mDlifier i-nd PX-4-302
plugboard PX-11-30 5 Block Diagram PX-4-301
Interconnection of Multiplier end Accumulators PX-6-311
Interconnection of Divider and accumulators PX-10— 307
The front view drawings and the large front panel drawings (whose
numbers do not end with "R") are bound as a part of the Operator's Manual,
Included with the report is a folder containing all the drawings
listed in the above table except the largo front panel (see above). A com-
plete file of drawings is available at the location of the ENIAC,
r
PART I
TECmilCAL DESCRIPTION OF THE EN I AC
by
AdolG K. Goldstino
Moore School of Eloctrical Enginooring
University of Pennsylvania
TABLE OF CONTENTS
I. INTRODUCTION
1.1» BRIEF DESCRIPTION OF THE EiakC 1
1.1.1. What the ENIAC does 1
1.1.2. The Units of the ENIAC 2
1.1.3. Representation of Digits by Pulses 4
1.1.4. Prograinraing by Means of Pulses,
Switches, and Cables 6
1.1.5. Synchronized System 8
1.2, ELECTRONIC ELEMENTS 10
1.2.1. Single Tube Elements 11
1.2.1.1, Buffers and Cathode Followers 11
1.2.1.2, Inverters 12
1.2.1.3, Gate Tubes 12
1.2.2. Multi-Tube Elements 12
1.2.2.1, Flip-flops 12
1.2.2.2, Counters 13
1.2.2.3. Standard Transmitters 15
1.2.2.4. Receivers and Transceivers 15
1,2,2*5. Plug-in Units 18
1.3. CUSSIFICATION OF ENIAC CIRCUITS: Numerical and
Programming 18
1.3.1. Program Controls 19
1.3.2, Common Programming Circuits 19
n
1.4. PROGRAI,MING THE ENIAC 20
1.4.1, Preparatory Formulation of the Problem 20
1.4.2, Planning the Programs and Program Sequences 21
1.4.3, Programming on Higher Levels 22
1.4.4, Special Linking of Program Sequences by
Magnitude Discrimination 23
1.5. EQUIBIENT ASSOCIATED WITH THE ENIAC 23
1.5.1. Ventilating Equipment 23
1.5.2. Power Equipment 24
1.5.3. Special Test Equipment 24
II, INITIATING UNIT
2.1, STARTING, STOPPING AND INITIAL CLEARING 1
2.1.1. Starting and Stopping the ENIAC 2
2.1.2. Initial Clearing '^0
2.2, READER AND PRINTER PROGRidl CONTROLS ON THE INITIATING UNIT 15
2.2.1, Reader Program Controls i5
2.2.2, Printer Program Controls 17
2.3, INITIATING PULSE FOR A COMPUTATION: Reader Start Button and 17
Initiating Pulse Button.
2.4^ SELECTIVE CLEAR CONTROLS 20
2,5. DEVICES FOR TESTING THE ENIi.C 20
Ill
III* CYCLING UNIT
3.1. PULSES AND GATES AND THfilR SOURCES 2
3.1.1, The Pulses and Gates 2
3.1.2. Sources of the Pulses and Gates 3
3.2. METHODS OF OPER/.TION 6
3.3. THE CYCLING UNIT OSCILLOSCOPE 10
IV, ACCUMULATOR
4.0. GENERAL SUMMiiRY OF THE aCCW-IULhTOR 2
4.1. PROGRAM CONTROLS AND THE SIGNIFICANT FIGURES AND
SELECTIVE CLEaR SV^TCHES 4
4.1.1. The Operation Switch 5
4.1.2. The Clear-Correct Switch 5
4.1.3* Repeat Switch 7
4.1.4. The Significant Figures Switch 8
4.1.5. The Selective Clear Switch 10
4.2. caaiON PROGRi.:.PiING CIRCUITS 10
4.2.1, The Receive Circuits 10
4.2.2, The Transmit Circuits 10
4.2.3, The Clear Circuits 11
4.2.4, Circuit for Admitting the I'P to Units Decade 12
4.2.5, Repeater Piing Common to Repeat Program Controls 12
IV
4.3. NUMERICAL CIRCUITS
4.3.1. Operation of the Numerical Circuits in
Transmitting a Number and/or its Complement
4.3.2. Operation of the Numerical Circuits in Re-
ceiving a Number
4.3.3. Static Communication Between an Accumulator
and Another ENI.'^C Unit
4.4.1. Use of an Accumulator to Store Two Numbers
4.4.2. Interconnection of Two nccumulators to Form
a Twenty Decade .xccumulator ■
4.5. ILLUSTRATIVE PROBLEL'IS
4.5.1, Computation in Accumul?.tors
4.5.2, Dummy Programs
4.5.3, Magnitude Discrimination Program^s
V. HIGH-SPEED MULTIPLIER
12
12
15
18
4.4. USE OF ACCU^.IULi.TORS FOR FEvffiR TH>.N OR MORE TUi^ TEN DIGITS 20
20
20
22
25
27
28
5,0. GENERi.L Sm^L.RY
5.1. PROGRM'I CONTROLS
5.1.1, The Multiplier and Multiplicand ivcCumulator
Receive Switches
5.1.2, Multiplier and Multiplicand Accumulator
Clear Switches
11
5.1.3. The Significant Figures S^Aiitch 11
5.1.4. Places Svdtches 12
5.1.5. Product Disposal Switch 12
5.2. COMvION PROGRiuldING CIRCUITS 13
5.2.1, Argument Accumulator Receive Circuits 13
5.2.2, Prograjn Ring and Associated Circuits 14
5.2.3, xirgument Accumulator Clear Circuits 18
5*244,, Product Disposal Circuits 18
5.3. NUMERICAL CIRCUITS 19
5.4. INTERRELATION OF THE HIGH-SPEED ilULTIPLIER i.KD ITS
ASSOCIATED .-.CCUlviUI^.TORS 22
5.4.1, Interconnections for Numerical and Programming
Data 22
5,4. lol. Programming Connections for
"Receive argument" Instructions 24
5.4.1.2, Connections for Partial Product
Reception 24
5.4.1.3, Connections for Complement Correction 24
5.4.1.4, Connections for Final Product Collection 25
5.4.1.5, Programming Connections for Product
Disposal Instructions 26
5.4.2, Position of Decimal Point in Product Accumulator 26
VI
5.5. ILLUSTR^vTIVE PROBLEtIS 2?
5.5.1* One Prograrn Control Devoted to Each
Multiplication 28
5.5.2, One Program Control Used Repeatedly 29
5.5.3. Isolation of Program Sequences which
Stimulate Transmission of Arguments, to
Argument accumulators, "Multiplication
Programs, and Reception of Products from
Product Accumulators 30
VI. DIVIDER AND SQUaRE ROOTER
6.0. GEMER^'i smMARY ^
6.1. PROGRi^^l CONTROLS ^^
6.1.1, The Numerator accumulator and Denominator
Accumulator Receive Switches 12
6.1.2, The Numerator i^ccumulator and Denominator
Accumulator Clear Switches 13
6.1.3, The Divide-Square Root and Places Switch 14
6.1.4, The Round Off Switch 15
6.1.5, The i.nswer Disposal Switch 16
6.1.6, The Interlock Switch 17
6.2. COIEION PROGR/vMING CIRCUITS 19
6.2.1- Status of the Circuits before a Transceiver
is Stimulated 19
Vll
6.2,2, The Program Ring Circuit 20
6,2c 3-, The Interlock and Clear Circuit 22
6,2,4, The Ovej'draft and Sign Indication Circuits 23
6,2c5. The External - Internal Prograjnraing Circuits 26
6.2.6, The Divide Flip--flop 29
6,2 o7. Chronological Description of the Common
Programraing Circuits 30
6.3. NmffiRICaL CIRCUITS 31
6.4. INTERRELi.TION OF DIVIDFii ^ND SQUARP. ROOTER A^JD ITS
ASSOCI..TED ..CCUIIUUTORS 34
6.4.1, Interconnections for Numerical Data 34
6.4.2, Interconnections for Programming Instructions 37
6.4. 3, Relationship Between alignment of the Arguments
and the Answer 39
6.5. ILLUSTRATIVE PROBLEtl SET-UP 43
VII. FUNCTION TABLE
7.0. GENEFtAL SUI\iI/uiY OF THE FUNCTION TaBLE 1
7.1. PROGRA.M CONTROLS 5
7.1.1. The Operation Switch o
7.1.2. Argument Clear Svatch 7
7.1.3. The Repeat Switch ^
Vlll
7.2. COMON PROG{tAMi'.aNG CIRCUITS «
7.3, NUMERICAL CIRCUITS 12
7.3.1. Storage: Portable Function Table, Master
PM Switches, Digit Delete and Constant
Digit Switches, Subtract Pulse Switches 12
7.3.2. Input to the Portable Function Table:
Argument Counters and Table Input Gates 16
7.3.3. Function Output 19
7.3.3.1. Transmission of Information Stored
on Portable Function Table Switches 19
7.3.3.2. Transiaission of Information Stored on
Constant Digit Switches 21
7.3.3.3. Role of the Subtract Pulse Switches 21
7.4. STOR/iGE OF PROGR.h!.MING DATA BY I\/iEANS OF THE. FUNCTION TABLE 21
7.5. ILLUSTFtilTIVE EX^vtIPLES OF THE 'USE OF THE FUNCTION T^BIE IN
INTERPOUTION 24
7.5.1. Quadratic Lagrangian Interpolation 26
7.5.2. Biquadratic Lagrangian Interpolation 30
7.5.3. The Drag Function of the Exterior Ballistics
Equations 34
VIII. CONSTANT TRjiNSLIITTER i.ND IM REaDER
8.0. GENER.X SIMIARY OF THE READER AND CONSTANT TRaNStllTTER 2
IX
8.0.1. IBI Cards 2
8.0.2, The Card Reader 3
8.0.3. Card Reading 4
8.0.4, Storage of Card Data in the Constant Transmitter 6
8.0.5. Transmission of Data from the Constant Trans-
mitter 7
8.1, PROGRMI CONTROLS OF THE IBi READER
9
8.1.1. Program Input and Output Circuits 10
8.1.2. Emergency Start Switch 11
8.1.3. Initial Start Switch 12
8.2, POLARITY SWITCH AND PLUG BOARD 15
8.3, PR0C3li^.aiING CIRCUITS OF THE READER • 21
8.3.1. Reset Control Circuits 21
8.3.2. Group Selection Circuits 23
8.3.3. Reset and Finish Signal Circuits 24
8.4, NUI-IERICAL CIRCUITS OF THE READER 26
8.5, PROGRjdi CONTROLS aND PROGR^^miNG CIRCUITS OF THE CONSTANT
TRiiNailTTER 26
8.6, NUIERICAL CIRCUITS OF THii CONSTANT TRAIISI^ITTER 30
8.6.1. Storing Information from Cards in the
Constant Transmitter 30
X
8,6,2» Transmitting Information from the Constant
Transmitter
8.6.2.1, Constants read from a card
8.6.2.2, Constants set up on. set switches
32
32
34
8,7. ILUJSTFtATIVE PROBLEM
34
IX, PRINTER
9,0. GENERAL SUiaiARY OF THE IWI PUNCH AND PRINTER
9,1, PROGRiilMING CIRCUITS OF THE HUNTER aND IBM PUNCH
9,2, IBM GANG PUNCH PLUG BOARD
9.3, NUl'IERICAL CliiCUITS OF THE PRINTER i^ND PUNCH
10
9.4. UNITS CONNECTED TO THE PRINTER
9.5. ILLUSTRATIVE PROBLHvI SET-UP
13
16
X. MASTER PROGRaiaiER
10,0. GENEIii^L SUMlvURY
10.1. DECADE ASSOCIATOR STOTCHES
X0,2, laSTER PROGRAlfiiER DECADES
10.2.1. Decade Counter: Input and Carry-over Circuits 4
10.2.2. Decade Switches and Decade Counter Clear CirQtdts 5
10,3. STEPPERS
It A f
XL
10.3.1. Stepper Input and Output Circuits 6
10.3.2. Cycling a Stepper Counter 6
10,3,2,1, Stepper Direct Input 8
10,3fc2.2, Stepper Cycling Gates 8
10.3.3. Clearing a Stepper Counter 9
10.3.3.1. Stepper Clear Switch 9
10.3.3.2, Stepper Clear Direct Input 10
10.4. PROGRi^ILIING THE LIaSTEII PROGIl.d'IMER H
10.5. USES OF THE ■^^■lSTER PROGRkMLIER 1^
10.5.1. Link Prograjii Control 11
10.5.1.1. The Stiniul3-tion of Sequences 12
10.5.1.2. Iteration of the Sequences of a Chain 12
10.5.1.3. The Stimulation of Program Hierarchies 13
10.5.2. Digit PrograrA Control 13
10.5.3. Accumulating Values of an Independent Variable 17
10.5.4. Extending the Program Control Facilities of
Other Units 18
10.6. ILLUSTRATIVE PROBLEM SET-UPS 20
10.6.1. Problem 1 21
10.6.2. Problem 2 23
10.6.2.1. Sequencee 1, 2, and 3. 26
10.6.2.2. Clearing the Decades lAihich Store
the Independent Vari ablet-Sequence 4 28
10.6.2.3. Sequence 5 ^^
10.6.2.4* Tests on y and y' 30
Xll
XI. SYNCHRONIZING, DIGIT, AND PROGR/J/I TR>.NaiISSION SYSTMS AND SPECIAL EQUIB'SENT
11..1. SYNCHRONIZING TRUNIN 2
11.2. DIGIT TR.lNS!/iISSION 2
11.2.1. Digit Trunks 2
11.2.2. Shifters, Deleters, and Adaptors 3
11.2.3. Load Units for Digit Trunks 5
11.2.4. Special Uses of Digit Trays Without Load Boxes 6
11.3. PROGRi^I TR/vNS^ISSION 7
11.3.1. Program Lines 7
11.3.2, Special Program Cables 8
11 #3. 3. Load Units for Program Trays 8
11,3,4, Special Program Lines Without Load Resistor 9
11.4. PULSE AMPLIFIER 9
11.5. SPECIAL INTER.CONNECTION OF UNITS 10
11.5.1, Connections to the Printer 10
11.5.2, The High-Speed Multiplier and Its Associated
Accumulators 10
11.5.3. The Divider and Square Rooter and Its
Associated Accumulators 11
11.5.4. Interconnection of Accumulators 11
11.6. PORTABLE CONTROL BOX H
Xlll
TABLE OF FIGU^S
1-1 Schematic Diagram of Program Sequence for Generating
2 3
n, n , n
chapter page
3-1 Duration in ijs-,
4-1 Set-Up Diagram Symbols for Accumulators
2 '^
4-2 Set-Up Diagram for Generating n, n , n-^
4-3 Use of Dummy Programs to Isolate Program Pulses
4-4 Magnitude Discrimination Program
5-1 Set-Up Diagrain Conventions for High-Speed Multiplier
6-1 Set-Up Diagram Conventions for Divider and Square Rooter VI
6-2 Set-Up Diagram for Computation of
(a-g) ^ ^
^ a ♦ 2_ ^i
2cL^ ^ cd VI - 47
I
.^
8
III
-
4
IV
-
25
IV
-
26
IV
-
28
IV
-
29
V
-
27
VI
«■>•
43
b
7-1 Use of Unmodified Function Table to Store Programming
Information
7-2 Set-Up Diagram Conventions for Function Table
7-3 Quadratic Lagrangian Interpolation - Set-Up Diagram
(a-e)
7-4 Storage of the G Function and Programjning Instructions
Regarding Use of the Tabulated Function
8-1 Set-Up Diagram Conventions for Constant Transmitter
8-2 Master Programmer Links for Evaluation of N,
8-3 Set-Up Diagram for Sequences 1 and 2,1
97I .Set-Up Diagram for Sequence 5 - Evaluation of N, (a-c)
(.a-c; *^
10-1 To stimulate Pi
10-2 Set-Up Diagram
VII
- 23
VII
- 25
VII
- 26
VII
- 35
VIII
- 35
VIII
- 38
VIII
- 39
IX
- 17
X
- 16
X
- 16
XIV
chapter ga^e
10-3 Use of Master Programmer to Delay a Program Pulse X - 20
10-4 Master Programmer Set-Up Diagram Conventions X - 21
10-5 Master Programmer Linlcs - Problem 1 X - 21
10-6 Set-Up Diagram - Problem 1 X - 23
10-7 Subsequence of Sequence 2 - Problem 2 X - 25
10-8 Master Programmer Links - Problem 2 X - 26
10-9 Set-Up Diagram for Tests of y*-c, and y^+Cj^. X - 30
11-1 Digit Trays Connected by Pulse Amplifier XI - 10
11-2 Bidirectional Communication in Pulse Amplifier
Connected Trays XI - 10
11-3 Isolation of Programs through the use of a Pulse
Amplifier XI - 10
XV
TABLE OF TABLES
chapter
pa^e
I
-
4
II
—
9
II
-
13
IV
-
13
IV
-
17
IV
-
26
V
-
6
V
-
8
V
.
9
1-1 Units of the ENIAC
2-1 Chronological Description of Initiating Sequence
2-2 Initial Clearing of the ENIAC
4-1 A and S Transmission
4-2 Reception Involving Delayed Carry Over
4-3 Set-Up Table for Generating n, rr , r?
5-1 Correction Terms for Negative ler and/or Icand
5-2 Multiplication of M 8 198 63O 4OO by P 2 800 000 000
5-3 Multiplication of M 8 198 63O 400 by M 2 800 000 000
5-4 Chronological Operation of High Speed Multiplier' s
Programming Circuits > V - 14
5-5 Partial Products Emmited by Multiplication
Tables for ler = 2 V - 21
5-6 Selection of Products by Icand 3elector& ^vhen
Icand M 8 198 63O 400 is multiplied by
First Digit of ler P 2 800 000 000 V - 22
6-1 Extraction of Square Roots by Divider and Square Rooter-
Period II
6-2 Division - Illustrative Problem
6-3 Square Rooting - Illustrative Problem
6-4 Division - Initial Sequence - Period I
6-5 Division - Period II - Basic Division Sequence and
Shift Sequence
6-6 Division - Period III - Round Off or No Round Off
VI
- 5
VI
- 6
VI
- 6
VI
- 30
VI
- 30
VI
- 30
XVI
6-7
6-8
6-9
6-10
6-11
6-12
6-13
Square Root - Period X
Square Root - Period II - Basic Square Root Sequence
and Shift Sequence
Square Root - Period III - Round Off or No Round Off
Division or Square Root - Period IV - Interlock or
No Interlock
Possible Placement of Radicand
Incorrect Placement of Radicand
Set-Up Table for Computation of
chapter
VI
VI
VI
3
^ a + 2l
i«l
+ cd
7-1
7-2
7-3
7-4
7-5
8-1
8-2
8-3
8-4
8-5
Chronological Operation of the Function Table
Function Output Terminal Leads and Associated Switches
Illustrations of the Use of Switches on Panel 2 of the
Function Table
Quadratic Lagrangian Interpolation Set-Up Table
Tabulation of Biquadratic Lagrangian Interpolation
Coefficients on the Portable Function Table
Reader Program Controls
Correspondence between Storage Relay Huba and Points
on Constant Selector Switches
Gates Controlled by Points on First Six Constant
Selector Switches
Activation of Constant Transmitter Storage Relays
Use of Digit Output Leads for Constant Selector
Svdtch Settings, L, R, or LR
VII
VIII
VIII
VIII
30
30
30
VI
- 30
VI
- 40
VI
- 40
VI
*
VII
- 10
VII
- lA
VII
- 17
vn
- .■5^-
32
10
VIII - 16
28
31
VIII - 32
XVll
chapter page
8-6 Simultaneous Stimulation of Two Constant Trans-
mitter Program Controls
8-7 Terms of N^
8-8 Computation to form the terms of N^^
8-9 Storage of Constants
8-10 Set- p Analysis for the Evaluation of the Nunibers N^
8-11 Set-Up Table (for Sequence 1)
8-12 Analysis of Multiplication Sequence
8-13 Set-Up Table (for Sequence 2,1)
(a»b)
8-14 Set-Up of Function Tables for Programming Trans-
mission of Constants
9-1 Chronological Operation of Punch
9-2 Operation of Numerical Circuits of Printer and Punch
9-3 Set-Up for Sequence 5 - Solution of Systems of
Equations by Determinants
10-1 Properties of Master Programmer Input
10-2 Set-Up for Stimulating Program Pi
10-3 Set-Up Analysis - Problem 1
10-4 Set-Up Analysis -Problem 2
10-5 Set-Up Table for Tests of y and y'
VIII
33
VIII
-
35
VIII
-
35
VIII
-
37
VIII
-
37
VIII
-
38
VIII
«p*
40
VIII
-
*
VIII
-
40
IX
^»
6
IX
-
12
IX
-
17
X
T
10
X
-
16
X
-
22
X
-
24
X
^
30
■5;-In an envelope attrxhcd to the back cover.
XVlll
PX DRAMNGS REFERRED TO IN
TECHNICAL DESCRIPTION OF ENIAC, PART I
Drawings bound with the text are given with a page reference. Those contained
in a separate folder are listed without a page reference. Drawings referred to,
but not included, in this report are marked with an asterisk. The last category
of drawings are a part of the complete file of drawings at the ENIAC location.
PX-1-302
1-2
1-303
II-2
1-304*
PX-2-12>^
PX-4-102
XI-1
4-103>^
4-104a
XI-3
4-104b-e-''^
4-109
XI-5
4-111^^^
4-114a-di^
4-115*
4-117*
4-119
4-301
XI-9
PX-5-105*
5-109-'^
5-110-'«-
5-121*
5-131*
5-134*
5-135*
5-136*
5-13'J^'^
5-301
IV^l
5-304
5-305
IV-1
PX-.6-302
V-1
6.303
V-1
6-304
V-1
6-303
6-309
V-1
6-311
V-23
PX-7-302
VII^l
7-303
VII-1
7-304
7-305
VII-1
PX-8-301
X-1
8-302
X-1
8-303
X-1
8-304
PX-9-302
II-l
9-303
III-l
9-304
III-l
9-305
II-l
9-306
1-3
9-307
PX-lO-301
VI-1
10-302
VI-1
10-304
10-307
VI-34
PX-11-116
11-119
11-302
VIII-1
11-303
VIII-1
11-304
VIII-1
11-305
VIII-16
11-305R1
VIII-19
11-305R2
VIII-20
11-305R3
VIII-20
11-305R4
VIII-21
11-306
VIII-1
11-307
11-308
VIII-25
11-309
PX-12-112
12-114*
12-301
IX-1
12-302
IX-1
12-303
IX-1
12-305
IX-8
12-305R1
IX-9
12-305R2
IX-10
12-305R3
IX-17
12-306
IX-1
12-307
I - 1
' I, INTRODUCTION
1,1. BRIEF DESCRIPTION OF THE ENIAC
1.1.1. What the ENIAC Does
The Electronic Numerical Integrator and Computer (ENIAC) is a high-
speed electronic computing machine -which operates on discrete variables. It is
capable of performing the arithmetic operations of addition, subtraction, multi-
plication, division, and square rooting on numbers (with sign indication) expressed
in decimal form. The ENIAC, furthermore, remembers numbers which it reads from
punched cards, or which are stored on the switches of its so called function
tables, or which are formed in the process of computation, and makes them avail-
able as needed. The ENIAC records its resu3.ts on punched cards from which tables
can be automatically printed. Finally, the ENIAC is a.utomatically sequenced,
i.e., once set-up (see Sections 1,1,4. and 1,4, and subsequent chapters) to
follow a routine consisting of operations in its repertoire, it carries out the
routine without further human .intervention. Y^en instructed in an appropriate
routine consisting of arithmetic operations, looking up numbers stored in
function tables, etc., the ENIAC c?.n carry out complex mathematical operations
such as interpolation and numerical integration and differentiation.
The speed of the ENIAC is at least 500 times as great as that of any
other existing computing machine. The fundamental signals used in the ENIAC
fire emtted by its oscillator at the rate of 100,000 per second. The interval
'-.etVi/een successive signals, 10 micro-seconds, is designated by the term pulse
time . The time unit in which the operation time for various parts of the ENIAC
is reckoned is the addition time. An addition time is 20 pulse times or 200
micro-seconds (1/5000 th of a second). An addition time is so named because it
1-2
is the time required to complete an addition. Other operations require an
integral number of addition times (see Table 1-1),
1,1.2. The Units of the ENIAC
The ENIAC proper consists of 40 panels arranged in U shape, 3
portable function tables, a card reader, and a card punch (see PX-l-"302). The
term unit of the ENIAC is used to refer to one or more panels and associated
devices (such as the portable function tables, for example) containing the
equipment for carrying out certain specific related operations.
The units of the ENIAC can be classified functionally into 4 categories:
arithmetic, memory, input and output, and governing. The arithmetic units include
20 accumulators (for addition and subtraction), 1 high-speed multiplier, and 1
combination divider and square rooter. There -.re two primary memory aspects in
the ENIAC: memory for numbers and memory for programming instructions. The
constant transmitter, 3 function tables, and the 20 accumulators provide numerical
memory. The constant transmitter with its associated card re^.der reads from
punched cards, numbers that are changed in the course of a computation and makes
these numbers available to the computer as needed. Numbers that remain constant
throughout a computation are stored on the switches of the constant transmitter
or of the portable function tables and emitted when needed. The accumulators,
not only function arithimetically, but also can be used to store numbers which
are computed in one part of a computation and required in other parts. All
units have progrc-im controls (see Sections 1,1.4. and 1.3.1.) which contribute
tc the programming memory in the following ways:
1) by recognizing the reception of a program input signal which
stimulates the unit to perform
t!^/^Vs Zo-O / I 3 4 5 6 7 a 9 /O ■// IE 13 14 IS /6 17 16 19 20
- ?90
f'cJL 5/r rcpp)
/ O P
i 3 P
i
i
IP
\ ZP
p
^
n n
fi
-ISO
n n
n
n
-1
n
290
fi
BOO
n
-ISO
_Jl
\30
^P -
I'P
\/?£j£r Pulses I
i fpPJ
FL^
'250
:.fi
— -^.so
-230
[
n
-tSO —
R
Jl
L
Moope 'School Of EleCTh/C^L LNG/NEEf=^iNG
C YCLfNG Unit
Pulses S Gj^tes
PX- 3-30(0
-O
4^U
'4E
34S
34-E ■
- 74 ^
-34.
■~'.3^^S
- 34S
O
h
1-3
2) by causing the programming circuits (see Section 1.3.) to
operate (as specified h'f the setting of program switches when
there are options regarding the operation to be performed)
and 3) on the completion of the operation, by emitting a program output
signal which, by means of program cable connections to program
lines (see Section 1,1.4.) is brought to other units to cause
them to operate. The program cable connections cind switch set-
tings are established before the coniputc.tion begins.
The kind of prograifining described in points 1, 2, and 3 above is
described as local prograjTiminfT; memory because it is taken ca-re of locally at each
unit for that unit. The master progranmer provides a certain amount of centralized
prograiiHiing memory by coordinating the local progra.mming of the other units.
The input devices for the EKIAC consist of the card reader and the
constant transmitter mentioned above in connection with numerical memory. The
printer and card punch record computed results.
The governing units of the ENIAC are the initiating unit and the cycling
unit. The initiating unit has controls for turning the power on and off, starting
a computation, initial clearing, and other special functions. The cycling unit
converts 100 kc sine waves emitted by its oscillator into a fundamental train of
signals repeated every addition time (i,e, repeated 5000 times per second).
These signals include various sequences of pulses and a gate. The term pulse
is used to refer to a voltage change (either positive or negative) from some
reference level and the restoration to the reference level which takes place
in a short time, between 2 and 5 micro-seconds. The term ^ate also refers to a
voltage change and the restoration to the reference level but differs from a
pulse in duration. In the ENIkC a gate lasts for at least 10 micro-seconds.
^ '<^^l
TABLE 1-1
UIIITS CP TliS ENIAC
Hi^ Speed
Mult ipl ier
Divider and
Squure Rooter
Function Table
(including an I
associated port-|
able function j
table ) I
Constant
Transmitter and
Reader
Printer and
Punch
Master
Programrirer
OPEIi^iTIONS
1, Stores a 10 digit signed number.
2. Receives a number and adds
it to its contents,
,^on r successive
3, Transmits its contents and/ or times (l< r^9).
the negative.
':?"r?;8'''?r:'g:^ i;'' j'.mw k^- <ij'i>.'.i»'^^-*vgsir«g3>-
iSS-W'-^i-.-r"^ .i^jr-.— ■ ■•>
Multiplies a signed multiplicand having as many
as 10 digits by a signed multiplier of p digits
(where 2 £ p< 10) ,
Finds a p (v/here p = 4, 7, 8, 9, 10) digit
quotient or square root for arguments with up
to 10 digits.
1, Each function table stores by means of switch
settings a total of 1248 variable digits and
208 signs in such a way that 12 digits ond 2
signs are associated with an argmnent bet\'veen
-2 and 101, In addition, 8 digits constant
throughout the range of the argument can be
remembered,
2» Function table selects and transmits the
furictional value (12 variable digits, 2 signs,
and 8 constant digits) car the negative of the
functional value associated v/ith a particular
value of the argument. The transmission may
be done r times (l$r:<9) in succession.
OPERATION Tlli:
(l addition time = 1/5000 of a second)
1, Continues to do so until instructed
to clear.
2.
3,
V^ r addition times.
p -f 4 addition times.
Approximately 13 p addition times
(also see p, VI (31)),
2, 4 + r addition times fca* looking up
the functional value and transmitting
it r times.
1, Constant transmitter stores 30 digits and 16
signs which tlie reader reads from punched cards
aiid stores 20 digits and 4 signs set up
manually on its switches.
2» Constant trananitter ©mits a signed 5 or 10
digit number.
\ 1. The reader scans a card and causes
j 80 digits and 16 signs punched on
the card to bo stored in the constant
I transmitter in approximately 1/2
I second,
2, 1 addition time.
C^/cling Unit
Initiating Unit
Ths printer receives information for 80 digits
and 16 signs from actsumulators and the master
programmer and causes this information to be
punched on cards fVom which it can be printed.
80 digits and 16 signs are punched on
a card in approximately 0.6 second.
Coordinates the local programming of the other
CIJLvC units.
Smits the fundamental train of pulses and the
gate upon vdiich other EIIL^G units operate and
v/hich, thus, keeps them in synchronism with one
another.
Has controls for turning power on and off,
starting the EIJIaC, clearing tlT^ EIIIAC, and
other special functions.
1 addition time.
i^iotamaam
In each addition time (also see
Cliapter III).
I
a.
INITIATING UNIT
o
Initiating
Pulflo
Button
This grogram
control emits a
program pulse whan
the button is pushed
Digit Gable
MASTER HtOOIiAMT-OSR
Emit a prog-
ram pulse on
each of 999
bocaaione and
then stop.
;< >^
Digit Trunk
ACGtMJLATOR 6
(used to generate n)
Receive
a
number
fransrait
twice in
succession
V
A
AOClMJLATOn 7
{used to generate n^)
Kecelve
a
number
Receive
twice in
succession
A
Y
GONSTAJIT THANSIflTTSn
-Program Control
^'
Trtmsmit the
number
BO^OOa 000 OOfc
Program Oabla
\
One of the 11 program lines
in a program trunk.
QRIKR OF OPEI^TIONS
lo When the initiating pulse button is pushed, accumulators 6 and 7 receive from the constant transmitter the digit Inin units place.
2. The master progranmer deteiminos Aether to continue or to terminate the computation,
3. Accumulator 6 transmits its oiontents twice and accumulator 7 receUves twice so that when this operation is caapleted, accumulator 6
holds the Ho, 1 and accumulator J holds the Ho« 3.
k. Accumulators 6 and 7 each receive 1 unit from the constant transmitter so that, as a resiat of tMs operation, accumulator 6 holds
the No. 2 aand accumulator 7 holds the No. **• , ,
5., 6., 7., Hepeat itens 2,, 3,, U., respectively, etc.
SCHEMATIC DIAORAII OF raOORAll SEQUENCE FOR (ffiNERATING n, n2^ for 1 i n ^ 1000
Figure 1-1
1-4
The nomenclature for and the temporal order of the cycling unit pulses and gate
are showi on PX-9-306,
Table 1-1 lists the units of the ENIaC, their operations, and
operation times,
1,1, 3« Representa.tion of Digits by Pulses
With a few exceptions digits are comniunicated from one unit of the
ENIAC to another in pulse form. Digit trays stacked above the front panels
running from accumulator 1 to the second panel of the constant transmitter are
used for this transmission. A digit tray has 11 wires and a ground. Each of
ten wires carries the pulses for one place of a 10 place decimal number. To
represent the digit n (where 0<n<9) in a particular decimal place, n pulses are
transmitted over the wire associated with that particular decimal place. The
11th wire is used for the transmission of sign information. No pulses are
transmitted for sign plus and 9 pulses for sign minus (see the discussion of
complements below). Pulses are transmitted over all 11 conductors simultaneously.
Each digit tray is 8 feet long and runs past 4 panels of the ENIAC,
A 12 point terminal at each end of a tray makes it possible to connect a number
of trays serially by means of jumper cables so as to form a digit trunk passing
as many units of the ENIAC as desired. Spaced at two foot intervals on the
digit trays are additional 12 point terminals. Units which are to communicate
with one another in the course of a computation have their digit input and/or
output terminals connected by means of digit cables to these 12 point terminals
on a digit trunk, A resistance load box is plugged into an unused terminal on
cither the first or last tray of a digit trunk. This makes it possible to con-
nect varying numbers of units in parallel into a digit trunk. At any given time,
only one 10 digit number with its sign may be transferred over a particular digit
I - 5
trunk. More than 1 unit may listen to this number. Through the use of more than
one digit trunk, several different numbers may be transferred simultaneously,
(also Section 1.1,5.).
The units of the ENIAC transmit numerical information by emitting
appropriate numbers of the 9 pulses or of the 1, 2, 2' and 4 pulses and the 1'
pulae (see PX-9-306) which they receive from the cycling unit. Addition is
performed in accumulators by means of 10 decade counters (see Section 1,2,2.),
one counter for each decimal place of a 10 digit number, and a binary counter
for sign plus (P) or minus (M) . These counters are advanced one step by each
pulse received. The decade counters and PM counter of an accumulator are so
interconnected that provision is made for carry over. Subtraction is performed
by adding the negative of the subtrahend to the minuend.
In order to avoid the necessity for cycling counters backwards, the
negative of a number is represented as a complement with respect to a power of
ten. Let us consider the decimal point to be located at the extreme right of
10
an accumulator. Then the complement with respect to 10 of the positive number
9 i
stored in an accumulator as P •»• ^ a . . 10 is formed by transmitting 9 pulses
'^ 10 9 i
for sign M and by transmitting the digit pulses for 10 - *£! ^j^ , lo ,
10 ^'0
Similarly, the complement with respect to 10 of the negative number stored
Q i
as M + i± bj^ , 10 is formed by transmitting no pulses for sign P and by trans-
10 9
mitting the digit pulses for 10 - ^-^ ti . 10"^, For example, the complement
lO 10
with respect to 10 of PO OOO 023 40? is M9 999 976 593 i the 10 complement
of M9 307 504 000 is PO 692 495 000, As will be shown in the chapter dealing
with the accumulator (Chapter IV), the mechanics of transmitting the digit pulses
for a complement with respect to 10 actually consist of transmitting first the
1-6
9 i
pulses for ^ (9-a^) • 10 and then of transmitting one more pulse in the
10 decade place. The terras 9-^j_ ^-re called nines complements.
If desired, operations may be performed on n digits where n ^£=-10. Here,
we consider the significant figures to be located as far to the left as possible
in the accumulator with the decimal point to the immediate right of the last
significant figure at the right. Then, the digits for a complement with respect
to 10^ are formed by emitting nines complements in all decade places and then by
emitting an additional pulse in the n decade place from the left.
Because the counters in an accumulator are so connected that there is
carry over not only from each decade counter to the one on its left but also
from the 10 decade counter to the binary counter for sign, the usual arithmetic
properties obtain when complements are used in addition end subtraction. In
this connection, it should be noted that even though, in the above discussion,
we implied that sign P indicates a positive number and sign M a negative number,
these signs may have another m.eaning. For example, if an accumulator holds
P9 999 999 999, the carry-over to the PM counter which results when a positive
number not in excess of lO-*-^ is added to this number, causes the accumulator to
register sign M. Hero the M indicates that the siom is off scale,
1.1.4. Programj-:dng by Means of Pulses. Switches and Cables
Before a computation can be performed on the ENIii.C, not only must the
digit input and output terminals of the units be connected into digit trunks
for the communication of numerical data, but also the units must be set up so
es to recognize when they are to operate and which particular operations are to
be performed. Program controls and program trays and cables are used to instruct
the ENIhC in the programming requirements for a particular computation.
1-7
Each unit of the ENIAC has one or more program controls. These
controls are either of the repeat or non-repeat tyi^e. Non-repeat program
controls have an input terminal for a program signal and a receiver (see below
and Section 1.2.4. )• Repeat controls have both an input and an output terminal
for a program signal and a transceiver (see below and Section 1,2,4.) or sane
logically equivalent device. Each program control on a unit which is capable
of more than one operation or which is capable of performing operations in a
variety of ways has a set of program switches.
Receivers and transceivers alike have the following properties;
1) they have two stable states which will be referred to as the normal and
abnormal states; 2) when a program input signal is received, they are set into
the abnormal statej 3) they are so connected (through the program switches,
if any) to the programming circuits (see Section 1.3») that, in the abnormal
state, they cause the programming circuits to function appropriately; and 4)
when the required routine has been completed, they are reset to the normal state
so that activity in the unit ceases, l/Vhen the set of instructions either set up
on the program switches of a repeat control or built into the programming circuits
have been completed, moreover, the transceiver of a repeat program control causes
a central programming pulse (CPP on PX-9--306) to be emitted as a program output
pulse from the program control's output terminal.
The program trays, like the digit trays arc 8 feet long, contain 11
wires and a ground, and have 12 point terminals at each end, so that as many
trays as desired can be jumper connected to form a program trunks As in the case
of digit trunks, too, a resistance load is plugged into an unused terminal at
one end of a program trunk. Each of the 11 lines running the length of a program
trunk is referred to as a program line. The program trays differ from the digit
I -
trays only in that at two foot intervals the program trays have a set of 11
t\Mo point program terminals (1 wire and a shield) instead of a 12 point digit
terminal. Input and output terminals of -jrcgram controls are connected to the
program lines by means of program cables.
The procedure for instructing the EKIhC in its routine, then, consists
of setting program switches on the units so that, when stimulated by a program
input pulse, the program controls will cause the units to carry out a set of
specific operations. The temporal order in which the operations are to follow
one another is determined by the manner in which program nulse input and output
terminals are connected to program lines, i^l program controls whose program
pulse input terminals are connected int'> the s.ajne program line start to operate
simultaneously v/hen that program line carries a prograjii signal. If one of the
program controls thus stimulated is a repeat program control and if its program
pulse output terminal is connected to a second program line all program controls
whose program input terminals are connected to this second program line start to
operate when the routine set up on the repeat program, control has been completed.
The schematic diagram of Figure 1-1 illustrates the method of setting
up a.n extremely simple computation. Each rectangle within the square that
symbolizes a unit of the ENIAC represents a program control vath program pulse
input terminal and output terminal and possibly program switches. The instructions
set up on the program switches of a program control are described inside the box
representing the program control.
1,1.5. Synchronized System
All units of the ENIAC operate in synchronism with one another, i.e.,
all units that start to operate at the same time complete their operations either
at the same instant or at times that differ by an integral number of addition
1-9
times. The phrase "complete an operation" covers not only finishing the numeri-
cal processes involved in the operation but also the emission of a program output
signal.
The basis of this synchronization is the fundamental train of pulses
and a gate emitted by the cycling unit and delivered to all units of the ENIAC
by means of a set of jumper connected trays ca.lled the synchronizing trunk.
These trays are physically the same as the digit trays. The central programming
pulse (CPP) emitted by the cycling unit in pulse time 17 of every addition tme
cycle plays a major role in such synchronization since the program output pulse
which a repeat program control emits upon the completion of a program results
from allowing a CPP to pass. The units of the ENIAC, moreover, have been so de-
signed that in order to complete their operations they require the pulses and
gate of either one addition time cycle 'or of an integral number of addition time
cycles.
Even though the electromechanical devices used with the ENIAC, the
reader and the card punch, do not ta.ke an absolutely definite number of addition
time cycles to complete their operations, these units have been integrated into
the synchronized system since they ha.ve been provided with program controls
which emit a CPP as a program output pulse. Units of the ENIAC can even operate
in parallel with the card reader since the reader does not emit a program
output pulse signifying the completion of reading until it has received as an
interlock pulse a program output pulse from some other unit of the ENIaC to
indicate that the sequence carried on in parallel with reading has been completed.
In this report, incidentally, we will follow the convention that an
addition time has its origin 3 pulse times after the CPP as shown on PX-9-306.
This means that we will talk about a program's being stimulated at the end of
I - 10
addition time i and being carried out in addition time i + 1 by means of the
cycling unit pulses and gate emitted during addition time i + 1,
Because the units of the ENIAC operate in synchronism vdth one another
and because multiple digit and program trunks have been provided, the operator
can schedule parallel operations when planning the set-up of a problem. For
example, the multiplier can be operating while several accumulators are performing
additions and subtractions and while the divider is finding a quotient, Naturedly,
the scheduling of parallel operations requires that the operator plan for the use
of separate digit trunks for the various operations and, in some cases, requires
that attention be given to the number of addition times needed for the operations,
1.2, ELECTRONIC ELaiENTS
The circuits of the ENIAC are designed around a relatively small number
of basic electronic elements. The following discussion, while wholly inadequate
to convey any real knowledge of vacuum tubes or their action, is intended to
enable the reader to obtain a formal acquaintance with some of the phenomena and
tenninology connected with the ENIAC,
The siniplest tube used is the triode, so called because it has 3
characteristic elements, namely the cathode (surface which gives off electrons),
the plate or anode (surface which receives electrons), and the grid (which con-
trols the current passing through the tube). In addition, there is a heater to
bring the cathode to the temperature required for it to emit electrons. Some-
times, 2 triodes are housed in one envelope. Vife shall refer to these as two
tubes. Other tubes used in the ENIAC are multigrid tubes, for example, the
pentode which has 3 grids.
I - 11
To say that a tubo is "on" or conducting means that with the usual
convention of sign, current is flowing from the plate to the cathode. This
implies that the plate is at a slightly higher voltage than the cathode, but
that this voltage drop is trifling compared to the drop when the tube is "off"
or non-conducting. Thus, if a tube is turned "off", i.e. changes from conducting
to non-conducting, the voltage of the plate is raised and that of the cathode is
lowered.. Hence the plate emits a positive signal and the cathode one that ie
negative. If the tube is turned on these signs are reversed. V/ithin appropriate
limits, a tube is conducting if its grid (or grids) is (or are) kept above a
certain voltage, non-conducting if below that voltage. Thus a tube is turned on
by applying a positive signal to its grid (or grids), turned off by a negative
signal ,
In all cases, vacuum tubes in the ENIAC circuits are used only as on-
off devices instead of as amplitude sensitive devices, i.e., the presence or
absence of a signal depends on whether a tube is conducting or not -conducting
and not on any measured magnitude of current and voltage. Furthermore, the
machine has been so designed that signals are not constantly being degenerated
but instead are regenerated from time to time out of the fundamental train of
pulses and a gate emitted by the cycling unit,
1,2.1, Single Tube Elements
1,2,1,1, Buffers and Cathode Followers
Buffers and cathode followers are normally non-conducting tubes with
r. single input and a single output. IfVhen a positive signal is applied to the
grid of a buffer, the output, taken off the plate side, is negative. In the
cathode follower, where the output is taken off the cathode, the application of
a positive signal to the grid results in the emission of a positive signal.
1-12
^Vhen the outputs of a number of buffers or cathode followers are con-
nected together to a conraon load resistor, the resulting circuit provides for
the logical "or" since when any one of the buffers or cathode followers receives
a positive signal, the circuit emits a negative or positive signal respectively,
1,2,1.2» Inverters
An inverter is a tube whose grid is normally at a positive potential so
that the tube is conducting, itien a negative signal, applied to the grid, drives
the tube to cut off, the output taken off the plate, is a positive signal, A
positive signal is necessary to operate a gate tube as ^lill be described in
Section 1,2,1,3.
1.2.1.3. Gate tubes
A gate tube is a multiple grid tube with two inputs and an output nor-
mally taken off the plate, A gate tube emits a negative signal when both of its
input grids are brought from a negative cut off voltage to a positive voltage.
Thus, a gate tube is used to note the coincidence of two positive signals and
hence corresponds to the logical "and",
A positive signal applied to one grid of a gate tube is said to "open
the gate", since when this happens a positive signal reaching the other grid
makes the tube conduct and hence emit a signal. The term "gate" is used in two
senses: In one it means a gate tube (as described above) and in the other, the
signal, lasting 10 ps or longer, which is used to open a gate tube (see Section
1.1.2.).
1.2,2, Multi-Tube Elements
1.2.2.1, Flip-Flops
The basic electronic memory device of the ENIAC is the flip-flop, A
flip-flop consists essentially of a pair of triodes so connected that at any
1-13
given time only one of the pair can be conducting, >Jhen a certain one of the
tubes is conducti::g (and the other is not), the flip-flop is said to be in the
normal state j \i^hen the other tube is conducting (and the first is not), the flip-
flop is in the abncnual state. A flip-flop has two inputs and two outputs, A
pulse received on one input (the set input), throws the flip-flop into the abnormal
state in which state it remains until restored to the normal state by a pulse re-
ceived at its second (or reset) input, Vi^hen the flip-flop is in the normal state,
one output is positive and the other negative. In the abnormal state, the polarity
of its outputs is reversed.
Corresponding to each flip-flop in the ENKC, there is a neon lamp. The
neon lamp is so connected to its corresponding flip-flop that, with the exception
of some neons in the divider and square rooter, the neon is lit when the flip-
flop is in the abnonaal state. Drawing PX-10-302 indicates when the neons in the
divider and square rooter are lit.
These neons provide one of the most important visual checks on the
operation of the ENIAC. In addition to the continuous mode of operation at the
100 kc rate, the ENIAC has 2 special modes of operation, 1 addition tinie and 1
pulse time operation, which permit the operator without disturbing the flip-flop
memory, to stop the ENIAC at some point to examine the neons and, thus, to
determine whether or not the proper sequence of events is taking place,
1.2.2.2, Counters
The counters of the ENIAC, in general, consist of a number of flip-
rrang
, jntftr
A
arranged in sequence and
flops interconnected so that the following characteristics result:
1) At any -ivon time, only one flip-flop can be in the abnormal state
and all others must be in the normal state.
1-14
2) The reception of a pulse at the input to the counter causes the
flip-flop which is in the abnormal state to be reset and causes
its successor to be set,
3) The counter can be cleared so that a specific stage comes up in
the abnormal state and all others in the normal state.
Each flip-flop of a counter is called a stage and the reception of a
pulse at a counter is said to advance the counter to the next stage. All counters
in the ENIAC are ring counters, i.e., the first and last stages are so connected
that if the counter is in its last stage and a pulse is received, the last stage
is reset and the first stage is flipped into the abnormal state.
In accumulators, a 10 stage (decade) ring counter is used for each
place of a 10 place number. Each stage of a decade counter corresponds to one
of the digits between 0 and 9 inclusive.
The sign of a number is handled by means of a FM counter which differs,
somewhat from the other ENIAC counters. The FM counter has 2 tubes, one for sign
P and for sign M. Each tube, here, is called a stage. The two tubes are so con-
nected that only one of them can be conducting at a given time. Each pulse
received cycles the PM counter 1 stage. Notice, that while the M counter uses
2 tubes as does a flip-flop, it differs from ^n ordinary flip-flop in that it
has but one input. The PM counter is also a ring counter.
Since each stage of a counter (other than the PM counter) is a flip-;
flop, one or both of its outputs are available for controlling other circuits.
n the decade counters rn.entioned above, for example, one set of such outputs
(.-j; ioh aye referred to as the static outputs) can be used to deliver to the
r-.-xrtcr irfornmtion about the number stored in a given accumulator. Ring
cvnnbers are also used in the prograjnming circuits of most ENIaC units. Here
tiK outputs of the various stages are taken to gates.
15
1»2,2,3* Standard Transmitters
To niceu th^:^ pov;e,-." aeeds resulting frora the large capac.,.tance associated
with the intorconnection cd/.-cuits (digit trays, program triys, digit cables, etc.)
and the high soeed with which pi'lses are transmitted in the EIIIAC, and also to
provide positiv'-^ output pulses (since positive pulses ai*e required to operate
gate tubes in the receiving baits), the pulse outputs of all units (except the
digit pulse output of the high-speed multiplier and the divider and square rooter)
a.re passed through standard transmitters, A transmitter consists essentially of
an inverter tube whose output is fed to the grids of 2 amplifying tubes which have
their plates connected in parallel. The cathodes of the amplifier tubes are con-
nected in parallel to ground through a resistor and the output of the transmitter
is taken off between cathode and ground. As previously mentioned, varying
numbers of output transmitters can be connected to the same program line or digit
trunk since a load resistor is not built into each transmitter but is instead
plugged into the trunk line.
The answer output circuits of the high-speed multiplier and of the
divider and square rooter consist of inverter tubes with built-in load resistance.
Therefore, the ansvi?er output terminals on these units are connected directly to
the appropriate digit input terminals through a cable without resietance load or
through a digit tray with no load box plugged into it. No other units may be
connected in parallel into such a digit tray,
1,2,2,4. Receivers and Transceivers
Receivers and transceivers are used in the ENIAC to note the reception
of a program pulse and to activate the programming circuits when a program pulse
is received. As mentioned earlier, receivers are found in non-repeat program con-
trols and transceivers in repeat program controls. In the divider and square rooter
1-16
and in the high speed multiplier, however, there are a few examples of receivers
which are not parts of program controls. Also, the reader, printer, and initiating
pulse program controls are exceptional repeat program controls in that they do
not contain transceivers.
To describe and illustrate the use of receivers and transceivers we
shall refer to the program controls of an accumulator in which these devices are
used in typical fashion (see drawing PX-5-304).
The receiver consists of an input buffer (66), a flip-flop (64, 65),
an inverter (the left hand tube numbered 62), a cathode follower (63), a buffer
(62), and a reset gate (61), kn input pulse received at the program pulse input
terminal associated with a receiver, passes through buffer 66 and sets the flip-
flop of the receiver. The normally positive output of the flip-flop passes through
the inverter and cathode follower and then through a pro^r^'jii switch which routes
it to a set of gates. Similarly, the normally negative output of the flip-flop,
through buffer 62, is routed through program switches to another set of gates.
Notice that before the reception of a program pulse, the outputs of the receiver
are such that the gates remain closed; when the receiver is set, its output signals
open the gates to which they are delivered and cause the unit to carry out the
routine specified on the associated program switches. The CPP, which occurs 20
pulse times after the program input pulse which sets the receiver, passes through
gate 61 (held open by the normally negative output of the flip-flop through buffer
62) and resets the receiver. Thus, a receiver is always reset one addition time
after it has been set. Notice that the same receiver must not be stimulated on
successive addition times since one addition time after a receiver is set it
attempts to reset itself,
A transceiver, like a receiver, has an input buffer (69), a flip-flop
1-17
(66, 67), an inverter (65), cathode follower (64), and a reset gate (68), The
transceiver, however, has several additional buffers (61), and (63), an extra
gate (62) a.nd inverter (65) and a standa.rd transmitter (70, 71, 72), The trans-
ceiver elements which resemble receiver elements function in pre«isely the same
fashion. The resetting of a transceiver, however, differs from that of a re~
ceiver. Transceivers usually operate in conjunction with a program ring counter
or, as in the accumulator case, with a repeater ring counter. In the illustrative
example being discussed here, one output of the transceiver is taken to gate K50.
When the transceiver is set, gate H5O is open so that a CPP is allowed to pass
through and cycle the repeater ring (64-72) each addition time that the trans-
ceiver remains in the abnormal state. Each point on the repeat switch (used to
specify the number of times in succession that en operation is to be repeated)
of an accumulator repeat program control is connected to one stage of this ring.
When the repeater ring reaches the stage specified on the repeat switch, gate 62
receives a positive signal from that stage of the ring. The coincidence of a
signal from the repeater ring and from the normally negative output of the flip-
flop causes gate 62 to emit a signal which is inverted into a positive signal by
inverter 65. The output of tube 65, through the buffers 63, goes on to stimulate
certain clearing actions in the accumulator, and delivered to gate 68, allows the
next CPP to pass through this gate. The output of gate 68 not only resets the
transceiver but also passes through the standard transmitter (70, 71, 72) to be
emitted from the program pulse output terminal of the program control. Notice
that a transceiver remains set throughout the number of addition times required
to complete the prograjn specified on its associated switches, is reset at the ond
of the addition time in whioh the program is completed and emits a program output
pulse when it is reset, ixt least one addition time should intervene between the
1-18
transmission of a program output pulse and the next stiiuulation of a repeat
program control in order to allow the control's transceiver to reset itself.
1.2.2.5. Plug-In Units
VJherevor possible the design of elements of the ENIaC has been stan-
dardized and these elements have been used repeatedly in various units. Further-
more, to increase the ease of testing and replacing faulty components, many of
these standardized elements have been designed as plug-in units.
The receivers and transceivers are of this nature. Each receiver
plug-in unit has two receivers, h transceiver plug-in unit has just one trans-
ceiver. Another type of plug-in unit is the accurmilator decade plug-in unit
which consists of a decade ring counter, a pulse standardizer for shaping pulse
input to the decade, carry over circuits, output transmitters, etc. In all,
there arc a total of 20 different types of plug-in units. These are enumerated on
PX-2-123 whure references are also made to detailed drawings of the plug- in units,
1.3. CUSSIFIChTIOK of ENKC CIRCUITS: Num.erical -nd Programming
The circuits of most ENIi'.C units can be conveniently described accord-
ing to 2 classifications, nujriorica.l and prograjxiing. The numerical circuits are
those which operote on the pulses or static signals which represent digits or
sign. For example, in yji accurmlator the decade and PM counters or in the printer
the tubes which are set up by the static outputs of counters whose information is
to be punched on a card are classified as nui'xierical circuits. The prograrrming
circuits are concerned with the following activities:
1) Recognizing when and how a unit is to function,
2) Stimulating the numerical circuits to operate appropriately,
3) Er.utting a program output pulse to signify completion of a progr.am.
1-19
In the case of certain units a further subdivision of the programming classifi-
cation into program controls (see Section 1.1.4.) and common programming circuits
is desirable. The program controls, then, are charged with activities 1 and 3
above and the common programming circuits with activity 2,
1.3.1. Program Controls
The accumulator, high speed multiplier, divider and square rooter, and
function table have multiple sets of program controls. These program controls
include not only a receiver or transceiver, program pulse input terminal and
possibly program pulse output terminal but also program switches for describing
the procedure to be followed when the program control is stimulated. In each of
these units, any one of the prograra controls, when stimulated by the reception of
a program input pulse, can activate the common prograjriming circuits. The buffers
and cathode followers in the receivers and transceivers of these program controls
serve to isolate one program control from the others. In the constant transmitter,
which has a total of 30 program controls each consisting of a transceiver, program
pulse input and output terminals, and a program switch, each group of six program
controls operates a set of programming circuits in common. In the remaining ENIAC
units the program controls and programming circuits are closely integrated with
one another.
If a unit has more than one program control, in general, only one
control should be operating at any given time so that inconsistent demands are
not made on the common programming circuits or the numerical circuits of the unit,
1.3.2, Common Programming Circuits
In the previous section it was pointed out that the stimulation of a
program control of a unit results in activating the unit's common programming
circuits. It should be pointed out that in a few cases the common programming
1-20
circuits of a unit can be entered without going through a program control.
For exanple, several accuniulr-.tors are used in conjunction with the high speed
multiplier. These accumulators receive components of the product as they are
emitted from the multiplier. Ordinarily, to stimulate reception of a number,
a program input pulse must be delivered to an accumulator prograrii control having
its program svdtch set to a receive setting. Then, the output of the receiver
or transceiver of the progrcim control activates the progrartiming circuits so that
reception takes place. The multiplier, however, has been designed so that it
contains receivers which are set when the associated product accur.iulators should
receive components of the product. These receivers in the multiplier are directly
connected to the common programming circuits of the associated accumulators so
that reception is stimulated when the raultipHer' s receivers are set even though
no program controls on the accimiulators are stimulated, Severa.1 euch examples
of direct entry into the common programming circuits of accumulators are to be
found in the chapters dealing with the high speed multipler and the divider and
square rooter.
1.4. PROGRMailNG THE ENIAC
In this portion of the Technical Manual for the ENIAC, Part I, much
emphasis will be given to the planning of computations to be performed,
li4»l» Preparatory Formulation of the Problem
Starting with the mathematical equations which describe a problem,
such as the total or partial differential equations for example, the operator
must first bre>ak the equations down into a form involving the arithmetic opers.tions
of which the ENIAC is capable. Another necessary preliminary step consists of
planning for the storage of numerical data. The initial conditions and other
1-21
constants basic to the computation will be given to the ENIAC by means of punched
cards and the setting of switches on the constant transmitted. Arbitrary functions
and other constants can be stored in the function tables. Numbers formed in the
course of a computation and required in subsequent pa.rts of a computation can be
stored in accumulators. Should the quantity of numbers to be stored for further
computation exceed the accumulator storage cape-city, such numbers can be punched
on cards by the printer unit and later can be inserted into the ENIAC again by
means of the card reader and constant transmitter,
1,4.2, Planning the Programs and Program Sequences
For each arithmetic operation in the computation, one or more of the
ENIAC s program controls will ha.ve to be set-up by the connection of program
cables and possibly the setting of progrsjn switches. For ex.araple, if the numbers
a and b are each stored in an accumulator and if a+b is to be formed in the
accumulator containing b, then the accumulator which stores a, must be instructed
to transmit and the one storing b, must be instructed to receive the transmitted
number ,
The instructions given to a single program control are referred to as
a program. It is possible for a number of progr'ims to be carried out in different
units simultaneously. In general, however, only one program at a time can be
performed in a given unit,
A unit carries out the program set up on one of its program controls
when a pulse is delivered to the program control' s program pulse input terminal,
i.e., when the program control is stimulated. If a nuniber of programs are to be
performed in parallel, all of the program controls involved must be stir.iulated
either by a pulse carried on the same prograin line or by pulses from different
progTi\m lines which are activated at the same time.
1-22
The operator ties individual programs together into a program sequence
in which one collection of programs is automatically stimulated upon the comple-
tion of another collection of programs by delivering the program output pulse of
the program control used for a program of the first collection to a given program
line and by picking up the stimulating pulse for all progrrims of the second
collection from that same program line (see Section 1,1.4.)
1.4.3, Programming on Higher Levels
Certain program sequences of a computation ma;/- have to be iterated a
number of times. The iteration of a program sequence into a program chedn is
accomplished through the use of the master programmer. This unit can also link
together a number of chains or chains and sequences into a new program sequence
which itself is to be iterated into a chain, etc.
The master programmer has a number of program controls each of which
has a single input for program pulses and multiple progrfiin pulse output terminals.
Each time a program input pulse is received, a pulse is emitted from one of the
output terminals. The circuits of each control cause a pulse to be emitted from
a given terminal a certain niamber of times which may be specified by the setting
of a switch or in some other way and then to be emitted from csnother output ter-
minal« Thus, the iteration of a program sequence into a chain can be accomplished
by delivering the final program pulse of the sequence to a master prograram.er
control and by picking up the initial pulse for the sequence from the program
line to which the appropriate master programmer output terminal is connected.
Another sequence or chain is linked to the first chain by picking up its initial
pulse from the program line to which a second output terminal of the master
programmer is connected, etc.
1-23
1,4.4« Special Linking of Pra/^ram Sequences by Magnitude Discriiaination
Not only can prograns be linked together sequentially as described
above in Sections 1,4.2, and 1.4.3 but, in addition, the ENIAC can be instructed
to choose one of severed, prograii sequences depending on the magnitude of some
number. This type of prograniming is referred to as magnitude discrimination.
In one form of magnitude discrimination, two numbers, a and b, are
compared. If a ,^b, one program sequence is followed and in the opposite case,
a second program sequence is stimulated. It is also possible to carry out more
extensive magnitude discrimina.tion programs in vjhich the choice of program de-
pends on a particular digit in some decimal place of a number.
Magnitude discrimination is accomplished by means of an accumulator
and the master programmer. In such programs which will be discussed in greater
detail in chapters IV and X, sign or digit pulses are used to stimulate program
controls «
1.5. EQUIPMENT ASSOCIATED VffTH THE EIMIAC
In addition to the 40 panels, the portable function tables, the card
reader and card punch which constitute the ENIAC proper, the ENIAC has certain
associated ventilating, power, and testing equipment,
1.5.1. Ventilating Equipment
The ENIAC s 18,000 vacuum tubes generate a considerable amount of heat.
An elaborate system of f?ms and blowers is used to drive off this heat. Each .
panel,, moreover, has a thermostat which prevents the temperature inside the
panel from exceeding 115 F by turning off the power to the ENIAC if this limit
is exceeded. The ventilating system uses 240 V, three phase unregulated power.
1-24
1.5.2, Power Equipment
III tp^iW— ■Mill 1 LllWlilli !■■ I^Wll I I I
In addition to the a-c power for the heaters of its tubes and for the
card reader and card punch, the ENIAC requires 78 different d-c voltages. These
requirements are met in the following way:
Two hundred forty volt, three phase, regulated a-c is taken to power
and auto-transformers which convert it into 110 V, 3 phase a-c. This power is
carried on 3 buses in a power trough located along the front and bottom of the
ENIAC panels. From this trough, the heaters and also the outlets below constant
transmitter panel 3 and printer panel 2 are supplied with a-c power as long as the
ENIAC s a-c power is turned on. The outlets below the other ENIAC panels are
always alive.
The 240 V, 3 phase, regulated a-c is also taken to gas rectifier tubes
in the ENIAC s 29 power supplies. The filaments of these tubes use 240 V, 3
phase, A-c, Through the use of bleeders the 78 d-c voltages are obtained. These
voltages are carried to the ENIAC units by means of the d-c cables in the power
trough mentioned above.
The power equipment is housed in 7 panels apart from the ENIAC and
electrolytic condensers for filtering the d-c from the rectifier circuits are
located in three condenser cabinets.
Only the control circuits for the power supplies are discussed at
any length in this report (see Chapter II). The ENIiiC I'lAlNTEN^NCE liaNUAL can be
consulted for further details.
1.5.3. Special Test Equipment
A number of special testing devices are used with the ENIAC, These
include a tube tester, a hi-pot test unit, a static tester, and a test table
with its own power supplies, synchronizing unit, variable oscillator, and
oscilloscope.
1-25
The test table and its associo.ted equipment are used to examine the
20 different types of plug-in units. The s;</nchronizing unit, variable oscillator,
and a device for varying d-c voltages make it possible to reproduce the operating
conditions found in the ENIAC or to generate certain test conditions. The equip-
ment associated with the test table is portable so that it can also bo used for
testing the ENIAC proper.
The static tester is essentially an ada-ptor which plugs into the d-c
cables so as to make possible measurements of the voltages on tube pins. The
hi-pot test unit is used to detect insulation faults in cables. The standard
tube tests can be made on the types of tubes used in the ENIAC by means of the
tube tester.
In addition to the above special testing devices, the standard electri-
cal measuring instruments are used for the ENIiiC. Certain meters have also been
built into the initiating unit (see Chapter II) and the cycling unit includes an
oscilloscope for rather rough examination of the fundamental train of signals.
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II - 1
II, INITInTING UNIT
The initiating unit of the ENIhC is the device which contains controls
for turning the power on and off, for initiating a corr.putation, for initial
clearing, and for selective clearing a group of accumulators, as well as program
controls for the reader and printer. Certain devices for testing the ENL-^C are
also located on the initiating unit ,
The following topics are discussed in this chapter: Section 2,1,
starting and stopping the ENIAC power and initial clearing; Section 2,2, reader
and printer program controls on the initiating unitj Section 2,3f initiating a
computation; Section 2,4, selective clear program controls; and Section 2,5>
testing features. The following drawings are referred to in this section;
Initiating Unit - Front View PX-9-305
Initiating Unit - Front Panel Pa-9-302
Cycling Unit and Initiating Unit
Block Diagram PX-9-307
Power System Block Diagram PX-1-303
A^G Power Distribution Rack PX-1-304
2.1. STARTING, STOPPING aND INITIAL CLEiJlING
Nearly all the characteristic functions of the ENIaC depend on d-c
power. This, however, is derived from 240 volt, 3 phase, a-c. The latter has
some immediate uses in addition to furnishing the d-c. There are in all five
principal uses for the a-c power. These are as follows:
1) for the heaters of the numerous tubes of the ENIAC units,
2) for the heaters of the rectifier tubes in the EMIaC's power
supplies which convert a-c into the different d-c voltages.
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3) for the plates of the rectifier tubes,
U) for the fans which dispel the great amount of heat generated
by the preceding
5) for the control circuits needed in starting and stopping the
ENIAC power, in furnishing protection to various circuits, and
in initial clearing »
The first four items referred to above are identified by the corres-
ponding numbers on PX-.I-3O3. The last item is noted there as control circuits
and is more explicitly dealt with on pX-9-307. The control circuits govern the
connection of the other items to the a-*c lines, cause d-c to be supplied to the
units of the ENIAC, and control the initial clearing of these units.
Program controls for these circuits are found on the initiating unit.
Other auxiliary program controls and elements of the control circuits are found
on the power distribution rack, the condenser cabinets, and the units of the
ENIAC themselves. In this section we shall discuss the events involved in
starting and stopping the ENIAC (Section 2.1,1.) and in initial clearing (Section
2.1.2.)
2.1,1, Starting and Stopping the ENIAC
In this discussion it is assumed that the main a-c safety switch is
closed* By a "safety switch" is meant one whose opening not merely cuts off
power, but actually opens all lines of the circuit controlled by the switch.
V/e also assume here that the 2 safety switches for the ENIAC heaters and those
for the fans and for the heaters and plates of the power supplies are all on,
YJlth the last 2 switches off, only the a-c circuits can operate; with any of
the others off, neither a-c nor d-c can,
l"/hen the start button on the initiating unit (see PX-9--302) is
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II - 3
depressed, the amber pilot light goes on immediately and the following sequence
of events takes place: the ENIAC heaters and the power supply heaters are
connected to the a~c and the ventilating system is turned on. One minute later,
after the heaters have had an opportunity to warm up, the plates of the power
supply tubes are connected to the a-c. Simultaneously, initial clearing, which
lasts for 10 seconds, begins. After the ENIAC has been initially cleared, the
green pilot light on the initiating unit goes on and the ENIAC is ready to
operate.
The heaters clock on the front of the initiating unit, which keeps
count of the number of hours that the power supply heaters are on, starts to
record as soon as the start button is pushed. On each of the remaining 39 panels
of the ENIAC, there is also a heaters clock and an on-off switch for the heaters,
IVhen the a-c is turned on, the heaters in a panel go on only if the switch for
that panel is in the "on" position. The associated heaters clock records the
number of hours that the heaters of the panel are turned on.
Before a more detailed discussion of the starting sequence is given,
the elements involved in various pha.ses of starting will be pointed out on the
schematic diagram of the a-c control circuits shown on PX-9-307. The elements
enclosed within the heavy lines are not in the initiating unit. The 28 under-
voltage release relays and their 14 associated pick-up relays (designated by M)
are located in the condenser cabinets. In the Moore School installation the
power supply heater fuse relays and the d-c fuse relays are in a cabinet beside
the d-c fuse cabinet and relays A, B, and, K are located in the machinery laboratory*
The remaining items, except for the door switches and thermostats which are in
the ENIAC panels, are on the power distribution rack in the ENIAC room (see
PX-I^304).
II - 4
Relays A and B connect the heaters of the ENIAC units to the 3 phase
a-c power. Relay D is the power supply heaters contactor, F, an adjustable
timer which has been set for 1 minute, provides for the delay between the turning
on of the power supply heaters and plates. When timer F has counted the specified
period of time, relay G is activated. This relay connects the plates of the
power supplies to the a-c so that the d-c is turned on when relay G is activated.
Timer «J which has been set for 10 seconds and relay H, the main initial clear
relay, are activated after the d-c is turned on. Relays 3 and h, auxiliary
initial clear relays, are each responsible for the emission of one of the
signals involved in initial clearing (see Section 2,1,2. )• Ten seconds after
timer J starts to count, relay K is activated and the initial clear period is
terminated, thus bringing the starting sequence to an end.
It can be seen on PX-9-307 that in addition to the start and stop
buttons on the initiating rniit which operate both the a-c and d-c circuits,
separate d-c start and stop buttons have been provided. Through the use of the
d-c stop button, only the d-c circuits (controlled by relay G), can be turned off,
leaving the a-c circuits \inaffected. V/ith the a-c power on, pushing the d-c start
button connects in the d-c circuits and causes initial clearing to take place.
Isolation of the d-c from the a-c circuits has been provided in order to make
possible leaving the heaters turned on even when the ENIriC is not to be operated
or when there is a failure (see the discussion of protective circuits below) in
the d-c circuits. This has been done because it is hoped that, by cutting down
the number of times that the heaters are turned on and off, tube life will be
lengthened.
It is to be noted that the operation selector switch on the cycling
unit must be set at continuous when the power is turned on. In Section 2.1.2.
II - 5
where initial clearing is discussed, it is pointed out that when the power is
first turned on, a number of flip-flops may come up in the abnormal state and
it is also remarked that the resetting of these often depends on the pulses
and gates emitted by the cycling unit. These pulses are not given out immediately
unless the ENIAC is in continuous operation. The danger of having these flip-
flops remain in the abnormal state is that, as a result, a number of tubes that
should be off most of the time and on only a short period of time (i.e. tubes
in circuits that have been designed for a lovj duty cycle) remain on for a long
time and thus cause damage to themselves and other elements.
Certain protective devices included in the control circuits are also
shown on PX-9-307. Of these the most important are relays C, Q, N, and L. The
action of these will be discussed in the following paragraphs. Their distinguish-
ing characteristics are as follows: under proper operating conditions C and N
are on; L and Q are off, C may be turned off by a thermostat or a door switch.
Since it is believed undesirable to turn off the heaters unless it is absolutely
necessary, C acts through a timer P which may be set between 5 and 15 ndnutes.
VJhen this time has elapsed and the trouble has not been remedied^ both a-c and
d-c circuits are turned off. The other three relays act without any delay but
affect only the d-c. Relay Q is turned on by the blowing of any heater fuse.
This cuts off the d*-c power supply including its heaters. Relay N is turned
off by phase in the plate supply or under-voltage in the output of a d-c power
supply. The effect is to turn on L. This is also accomplished by the d-c stop
button or the failure of a d-c fuse. When L is turned on or when there is any
please failure in the heaters, the plate supply to the rectifiers is cut off, but
the heaters are j.eft on. The distinction between N .and L is that there is a
provision for inhibiting the action of N during starting. These actions will
II - 6
now be discussed in more detail.
Relay C is a master relay which controls both a-c and d-c circuits.
This relay, which is activated when the a-c safety switch is closed, operates
in conjunction with the door switches (see below), thermostats, and timer P,
Found at the back of each ENIAC panel and at the front of the power supply and
condenser cabinets, is a door switch, IfVhen the cover of a panel or cabinet is
removed, the door switch on the panel opens, causing relay C to be deactivated.
If, however, the door switch shunt button on the initiating unit (see PX-9-302)
is held down while the cover is off, relay C is not deactivated. Relay C is
also deactivated when a thermostat opens as a result of the overheating of a
unit, \^en relay C is not activated contact C closes and timer P which is set
for 5 minutes starts to operate. First its clutch (CL) is thrown in, and next
the motor (M) is connected into the circuit through contact CL, . A warning lamp
above the power distribution rack (see PX-1-304) also lights. Necessary repairs
can be made on the machine during this 5 minute period, (which may be adjusted
to as much as 15 minutes if more repair time is required). If, at the end of
5 (or 15) minutes, the condition which caused relay C to be deactivated has
not been corrected, then contact P opens and relay ii is deactivated. This
turns off both the a-c and d-c circuits. The start button on the initiating
unit is used to turn the power on again after the fault has been corrected.
The door switches have been provided as a safety measure for both
personnel and the machine since the opening of a panel e^qjoses dangerous voltages
•^^Ht the pjTesent time, there is a permanent shunt for the door switches so that
removing a cover docs not cause relay C to be deactivated. The description in
•:-be teT± above applies to the intended method of operation of the door switches.
-?5h-Ti both the ember and green pilot lights are off, the start button on the
Iritiating unit must be used. If only the green pilot light is off, the power
nay be turned on through the use of the d-c start button.
II
(as much as I5OO volts in the case of the d-c) and also, by drawing air from
the ventilating system to the open panel, may cause another unit to overheat.
Relay Q protects the d-c circuits and the power supplies. When Q
is activated, contact Q, opens so that relay D is de-energized. This turns off
the power supply heaters and causes contact D to open. With contact D-j^ open,
F is de-energized so that contact F, opens and relay G, the d-c contactor is
deactivated. Relay Q is activated when a contact on one of the power supply
heater fuse relays closes. This latter event takes place if a pdwer supply
heater fuse blows. If the d~c is turned off because Q has been activated, the
d-c start button on the power distribution rack must be used to turn the power
on again.
The remaining protective devices shown on PX-9-307^ relays L and N
with their associated devices, control only the d-c circuits, leaving all heaters
turned on in case of a failure. If one of these circuits detects a failure and
turns the machine off, the power can be turned on again through the use of the
d-c start button. The main and power supply heater phase failure relays connected
in series with timer F detect faults in the three phase which goes to the heaters
of the ENIAC and of the power supplies. These phase failure relays are activated
so that the contacts shown on PX-9-307 are closed under proper operating conditions.
In the event of a phase failure, F is de -energized so that contact F^ opens and
relay G drops out. As soon as the fault is repaired, timer F is again activated
and, one minute later, contact F closes.
Relay L is the d-c cut-off relay, VJhen this relay is activated,
contact Ln opens so that relay G is de^ energized. This results in cutting off
the d-c power. With the a-c on (so that contact A^.'is closed), relay L can be
picked up through the closing of the d-c stop button, the activation of the d-c
II -
fuse relays when a d-c fuse blows, or the non-^activation of relay N (see the
discussion of relay N in the next paragraph) ,
Relay N operates in conjunction with the power supply phase failure
relays and the under-voltage release relays. The power supply phase failure
relays in this circuit detect faults in the tliree phase a-c which goes to the
plates of the power supply tubes. These relays are activated and their contacts
closed under proper operating conditions. There is an under-voltage release
relay for each power supply. During the starting sequence while initial clearing
takes place, relays M are activated. These relays provide the high voltage re«^
quired to pick up the under-voltage release relays. After the starting sequence
is completed, the under-volta.ge release relays remain activated and their contacts
are closed unless the voltage emitted by a d-c power supply drops below a speci-
fied level. During the initial clear period while the under-voltage release
relays are being picked up, contact K of relay K provides a circuit which shunts
the under-voltage release relays and the power supplies phase failure relays.
Thus, relay N is activated and contact N is open at all times unless a fault
is selected.
The starting sequence which takes place when the start button in the
initiating unit is pushed is described chronologically in Table 2-1. In some
cases, a contact is classified as both a pick up and hold contact for a circuit,
since the contact must close for the circuit to operate and since the circuit
continues to operate only so long as the contact remains closed. In other cases,
the pick up and holding functions are performed by separate contacts.
VJhen the stop button on the initiating unit is pushed, the ENIAC is
^"-Timer J should not be set for less than 10 seconds since this delay is required
when turning the d-c on to permit the under-voltage release relays to pick up
before the shunt across them is removed.
II - 9
TABLE 2-1
CHRONOLOGICAL DESCRIPTION OF STARTING SEQUENCE
Activated Relay or
Circuit Element
Pick Up Contact
(contact whose closing
causes circuit to operate)
Hold contacts
(contacts which must re-^
main closed for circuit
to continue to operate)]
A-auxiliary start relay
Start switch - closed when
start button is pushed
Stop switch - normally
closed
P - closed unless timer P
has been activated for
5 minutes."
B-, - closes immediately
after A is activated.
B-main start relay and
ENIAC heaters contact-
or.
A.
E-fans contactor
ii.
D-power supply heaters
contactor
E,
El
Q-, - closed unless Q is
activated."^'
Amber start pilot and
pvDwer supply heaters,
clock #
F-one minute timer
ii,
°1
Main and power supply
heaters phase failure
relays - closed unless
fault is detected,'
F| - closes after F has
counted out 1 minute
L-i - closed unless L is
activated ,^''
H-Main initial clear r J 1j
relay
J-10 sec* timer
M-under voltage release
pick-up relays
K-relay which termin-
ates initial clear
period.
Green ready pilot
G-,
Kl - closed until K is
activated.
J, - closes after timer
has counted 10
seconds.
*See discussion of protective devices included in Section 2,1.1.
h
Initial clear switch -
remains closed unless I,C.
button is pushed.
K,
II - 10
completely turned off. Relay A, then B, £, D, G, H, and K are de-energized,
VVhen only the &-c circuits are on, and the d-c start button is pushed,
the following events take place: Relay L is deactivated, and through contact F^
(closed pr-)vided that the a-c is on anr- there is no phase failure in the power
for the ENIAC and po^ver supply heaters) and L (closed when L is deactivated),
relay G is picked up. This turns the d-c on and then initial clearing follows
as indicated on Table 2-1,
V/hen the d-c stop button is pushed, relay L is activated. Since
contact L^ bhen opens, relay G drops out and the d-c is disconnected. Contact
G-j also opens, causing relay K to drop out,
V/ith regard to the matter of interrupting a compute.tion, it might be
pointed out that it is not necessaiy to push the stop button on the initiating
unit or the d-c stop button for this purpose. Even though the power is turned on,
a computation can be stopped in a number of different ways. If a program cable
which delivers a program output pulse to a prograia tray is removed, the computa-
tion in progress ceases with the program whose program output pulse is elLminated
in this way. If the card reader exhausts the cards in its magazine (see Section
8.3.) the computation is terminated with the program just before the one in
which reading would take place. A computation ceases, similarly, when the cards
in the magazine of the card punch are exhausted (see Section 9.1. )•
2.1.2. Initial Clearing
When the ENIAC is turned on, it is a matter of chance as to which
flip-flops in the various counters, both nimierical and program ring, or which
program flip-flops (in receivers, transceivers and common progreinming circuits)
will come up in the abnomal state. It is obvious thct a computation must start
with the nximerical and program rings in the clear position and with program
II - 11
flip-flops in the normal state in order that the correct answer may be obtained.
Furthermore, if a flip-flop in a transceiver or a program control flip-flop such
as the printer start flip-flop (see Section 9.1.) comes up in the abnormal state,
not only is the associated program commenced, but also, upon the completion of
the program, an output pulse is transmitted which, in turn, may stimulate another
program control, etc. Thus, it is also necessary before starting a computation
to break program chains or sequences which arc accidentally begun when the ENIAG
is turned on. Furthermore, it is convenient to be able to stop a computation at
a certain point (without turning the ENIAC power off), erase all data stored in
accumulators and the master programmer, and then start afresh.
The initi.-^J. clear circuits in the ENIAC provide for the contingencies
mentioned above. The initial clear circuits consist of the initial clear push
button on the initiating unit, relays H and K which were referred to in Section
2,1,1, and initial clear relays 3 and 4 (see PX-9-307). ^Vhen the ENIAC*s power
is turned on, initial clearing takes place automatically immediately after the
d-c goes on (see Section 2*1,1.), The initial clear push button is pushed when,
with the power already on, it is desired to clear the accumulators and the
master programmer. It is to be noted, that the operation selector switch on
the cycling unit must be set at continuous for initial clearing to take place.
Relay H is the main initial clear relay, yVhen activated, this relay causes
initial clearing to take place, Relaj?" K terminates the initial clear period.
Initial clear relay 4 is responsible for emitting the initial clear gate (ICG)
which, in general, clears the counters used for either numerical or programming
purposes. Initial clear relay 3 causes the master progra.mmer clear gate (MPC)
to be emitted. The MPC is used |n the master prograiTimer to break program sequences
(see the discussion in the latter part of this section,)
'i-', '.•:.' y>' ti^r
11-12
1/Vhen the start button on the initiating unit or the d-c start button
is pushed, relay K is not activated so that relay H and the ten second timer J
are picked up through contacts G and K . At the end of 10 seconds, contact J
14 -'■
on the timer closes. Through J,, relay K is picked up» From then on, relay K
holds through contact K^^ and the initial clear s'witch which is normally closed*
When the power has been on and the initial clear button is pushed,
relay K is d@^ energize d so tha^t K, closes. Since G-, renedns closed as long as
4 1
the d-c is on, relay H and timer J are then picked up through G, and K. •
Y^en rolay H picks up, contact H closes, thus activating relay 3,
Contact 3-1 then closes esid the MPG is emitted. As a result of the activation
of relay 3, contact 3-3, which is normally closed, opens, Nox^ with 3-3 closed,
there is a circuit which allows a small aiaount of current to flow through the
coil of relay 4 but not enough to pick this relay up, and very little passes
through the large resistor to the condenser, V/hile 3-3 is open, however, the
condenser is charged.
Ten seconds after relay H is activated, K is activated. Contact K.
opens and H is, thus, deactivated. This causes contact H^ to open and relay
3 to drop out. At this time, contact 3-3 closes. This allows the condenser to
discharge through the coil of relay 4. In this way, relay 4 is activated and
contact 4-1 is closed. With contact 4-1 closed, the initial clear gate is
emitted. Initial clear rolay 4 is restored to the normal state with contact 4«.l
again open in about 1/2 a second when the condenser has discharged.
As can be seen from the discussion above, the 10 second period (when
the green light is off and when timer J is operating) designated by the phrase
initial clear period, is actually devoted to the master programmer clear signal.
The initial clear gate comes on after the MPC gos:s off and lasts for about 1/2
o
PX-9-^QS
'/
T/iBLE 2-2 - IiailAL CLEiytlNG OP ENUO UillTS
TJNIT
Accumulator
Multiplier
iTas
MAHHSR OP INITIAL CLEAR IRQ OR RESETTING
Plip-flops in receivers and
transceivers.
Decade flip-flops
Repeater ring
Decade counters and PU counter
Plip-flops in transceivers
I i
Divider and
Sque.re
Rooter
Program ring
Reset flip-flops
L and R receivers
Ra-RS, Oa-D£, and ans\ver dis-
posal receivers
No provision for direct reset of receivers or transceivers. However, if a
P.P. comes up in the abnorrr.al state, the progran\ set up on the associated
av/'itchos is carried out and, in a maximuci of 9 add, times, the P.P. is
reset,
normally negative output of decade P,P, gates RP through gate 18 so that
a decade P,P. in abnormal state is reset,
CPP gated through Iv50 by ICO resets repeater ring.
CCG^ gated tlirough 1^4 by ICG clears counters,
Reset in maximum of 14 add, times (see Accumulutor),
If program ring is not in stage 1, OPP is gated through J»44, ICG holds
G»44 open so that output of J*44 is passed to prog, ring. Thus the ring
is cycled to stage 1. Vilien prog, ring is in stage 1, J '44 is closed so
that no other CPP are admitted to cycle the ring,
IJoriaally negative output of a reset ?•?. v/hich comes up in abnormal state
opens rT49 or L*50 so that a CPP is passed to reset the P.P.
ICG gates CPP tlirougii E'47 to reset these receivers.
Reset by CPP,
Plip-flops in transceivers
.\T PRESElfT, ICG gates a CPP through S50, The output of E50 gives rise to CL and GV pulses so that clearing
is accomplished as follows:
ITo provision for direct reset, since the reset signal fo©^ transceivers in
the divider comes fror.i the clear P.P. and tlie present method of init. cl,
does not ensure tliat the cle«r P.P, v/ill be set during init, cl. Since a
divider program may last longer tiion init, cl, finishing a program cannot
be depended on for resetting pro-am controls in this unit.
Ps'ocraia ring
Pulse souros flip-flop
D'y» -^-i* and -1 receivers
Profcram ring flip-flop
Iluiaerator Binary Ring
Denoainator flip-flop
Ansv/er Place Ring
Clear flip-floiv
Interlock flirv-flop
Punction
Table
Interlock coincidence flip-flop
Sac. n'y, s^, Nac, i\. Qa. +2,
—2 ansT/er disposal and argument
accumulator receivers ,
%. ^a. ^S
Cleared to stage A by CL* signal.
Reset by CL»,
Reset by CL\ ^
Reset by CL,
Cleared to stage ? by CL,
Reset by Olm*
Cleared to stage 1 by CL^
Reset by CL,
Reset by CL' gated through K48 by ICO.
NOT RSoLT by the present method.
Reset by CPP,
Reset by GP emitted after pulse source flip-flop is reset,
It is planned to modify the design of the divider in such a vmy that the interlock coincideiice P.P, v/ill
: be ^eliminated and also so that the transceivers will be reset during tlie init. cl, period,
PI ip-f lops in transceivers
Constant
Transmitter
Argument flip-flop and Add. and
Sub. flip-flops
Program ring
Units and tens argument counters
Plip-flops in transceivers
Reader
Start flip-flop
Printer
Iiiterlook flip-flop
Finish flip-flop
Syaclironi&ing flip-flop
Start flip-flop
Reset in a maximum of 13 add. times (see Accumulator).
Reset by OV^ gated througli C48 by ICO,
Cleared to stage -3 by CP? gated through B48 held open by ICO.
Cleared by CPP gated through A48 by ICG.
Reset in 1 add. tin© (see Accur;ml«.tor).
Reset by CPP gated tiirough 63 by ICG.
leset by CPP gated through 71 by ICG,
Finish P.P. is set by CPP gated through 71 by ICO, Then fiEe gated through
66 sets synchronizing P.P, Normally negative output of synclironizing P.P.
gates CPP through 69 so that: Pinishing and Synchronizing" flip-flops are
reset by the output of gate 69,
Under the present metiiod of
initial clearing, a card may
. be fed to the reader or punch
^ in the period betvreen tiie turto-
ing on of the pov/er and the
resetting of the start flip-flop.
]^aster
Pro/^ranmer
IS^C holds stepper output gates closed so that master progrtunmer caniiot emit a progrt-m output pulse,
Resetby CPP gated through 69 if P,P, is in abnormal state.
Stepper input flip-flops
Stepper Counters
}.te.ster programmer decade counters
Cleared to stage 1 by CPI gated through C47 by ICG.
Cleared to stage 0 by CPP gated through B44 by ICG.
•^
fN3
II - 13
a second. Both the MPC and ICG are carried to the other units of the ENIAC
in the d-c voltage cable.
At the time of writing of this report, the MPC is taken only to the
master programmer's stepper output gates (see Section 10.3.1.). The IvIPC, a
negative signal closes down these gates so that no program output pulse can be
emitted by the master prograjiuner while the MPC is on. Although a program
sequence may be initiated because the flip-flop of some transceiver comes up
in the abnormal state, it is impossible for a program sequence lasting 10 seconds
(of continuous operation) not to go, at some time in that period, to the master
programmer. Since the master programmer, however, cannot transmit a program output
pulse while the MPC is on, progrrsm sequences which have started accidentally are
broken here.
The way in which the initial clear gate is used in the units of the
ENIAC to prepare them for computation is shown on Table 2-2, The reader will
probably find it convenient to refer to this table in connection with Chs.pters
IV-X, The circuit elements referred to in Table 2-2 can be identified on the
block diagrams for the various units. The reader will notice tha,t in many cases
clearing depends on the carry clear gate and the centr':.l programming pulse emitted
by the cycling unit. It is for this reason, that the cycling unit must be in
continuous operation for initial clearing to be accomplished.
On Table 2-2, two difficulties inherent in the present method of
initially clearing the divider and square rooter are noted. One of these diffi-
culties, that the flip-flops in the transceivers may not be reset by the end of
the initial clearing period, arises from the fact that in the divider and square
rooter, as in the other units of the ENIAC, no special provision has been made
for directly resetting the transceivers. In other units of the ElttAC, this causes
II - 14
no difficulty. For, suppose th-at a transceiver in the high-speed multiplier
comes up in the abnormal sta.te ;yhen the power is turned on. The multiplier then
proceeds, during the time that the MPC is on, to carry out the program set-up
on the switches associated with that transceiver. In a maximum of 14 addition
times the program is completed and the transceiver is reset.
In the divider and square rooter, however, there is no upper limit
on the length of time required for a division program (division by zero, for
example, requires an infinite length of time). Therefore, if a division program
is started because a transceiver comes up in the abnormal state when the ENIAC
is turned on or because cj\ accidentally begun program sequence stimulates it,
there is no certainty that the program will be completed and the transceiver be
reset by the end of the initial clear period.
Plans have been m-:.de to revise this initial clearing difficulty by
causing the clear flip-flop in the divider and square rooter to be set during the
initial clear period. Since the clear flip-flop in the abnormal state causes
the CL and CL« signals to be emitted, any flip-flops now reset by CL and CL'
will also be reset by the modified method of initial clearing. The CL signal
also resets the cleaj- flip-flop. The normally negative output of the clear
flip-flop provides a reset signal for the divider and square rooter's transceivers.
Until the initial clearing process for the divider and square rooter
is modified, the operator can circumvent tlais first difficulty by setting the
operation switches on this unit at square root instead of divide and the inter-
lock switches at NI (no interlock). Since the m?cf.imm. time for a square rooting
program is 4OO addition tjjnes (less than a tenth of a second), an accidentally
begun square rooting program is certain to be completed by the end of the initial
clear period. The reason for setting the interlock switches on the program
II - 15
controls at NI is that, even though a program vvere corapleted, a program output
pulse would not bo emitted and the transceivers would not be reset unless the
interlock flip-flop also came up in the abnormal state or unless some program
sequence, accidentally started, provided for an interlock pulse.
The second difficulty, that no provision has been made for resetting
the interlock coincidence flip-flop, is also to be remedied. Plans have been
made for making a small modification in the divider and square rooter' s common
programming circiiits which will eliminate the need for this flip-flop. Until
this modification is made, the operator must pay particular attention to the
interlock coincidence flip-flop neon (see PX- 10-302) before starting a computation,
1/Vhen the interlock coincidence flip-flop is in the normal state, this neon is
off. If this flip-flop com.es up in the abnormal state at the end of initial
clearing, initial clearing should be repeated until this flip-flop does come
up in the normal state.
2.2. READER AI^ PRINTER PROGRAiM CONTROLS ON THE INITIATING UNIT
2,2,1. Reader Program Controls
Certain reader program controls are found on the initiating unit
(see PX-9~302 and 9-30?). These include the reader start flip-flop and program
pulse input terminal (Ri), the reader interlock flip-flop and interlock pulse
input terminal (Rl), the reader finish flip-flop, the reader synchronizing flip-
flop and program pulse output terminal (Ro), and associated gates, buffers, and
inverters. The reader start button is also on the initiating unit.
The reader start flip-flop is flipped into the abnomal state either
when Ri is pulsed or when, at the beginning of a computation (see Section 2,3.),
the reader start button is pushed. iVhen the start flip-flop is in the abnormal
II - 16
state, a start relay in the constant transmitter is activated so that the reader
is stimulated to read a card and ca.use information read from the card to be
stored in the constant transmitter, A little less than half way through the
card reading cycle (see Chapter VIII), a reset signol from the reader resets
the start flip-flop, so that, even though reading is not yet completed, the
start flip-flop is capable of again being flipped into the abnormal state (by
the reception of a pulse at Ri) to remember that reading is to take place again..
When residing is completed, the reader emits a finish signal which
causes the reader finish flip-flop to be flipped into the abnormal state. The
interlock flip-flop is flipped into the abnormal state when an interlock pulse
arrives at Rl or, at the start of a computation, when the reader is stimulated
to read by the reader start button. The reader interlock flip-flop makes it
possible to carry on a sequence of programs in parallel with reading and then
to stimulate the next program sequence when both reading and the parallel se-
quence have been completed since no program output pulse is emitted from terminal
Ro unless the interlock flip-flop is flipped into the abnorraal state (see below).
If a computetion does not call for a sequence in parallel with reading, the
operator can provide an interlock pulse by sending the pulse which goes to Ri
also to Rl,
The coincidence of signals from the interlock and finish flip-flops
causes gate 69 to emit a signal. The output of gate 69 gates a CPP tlTrough
gate 62 which then sets the reader synchronizing flip-flop. The CPP gated •
through 68 by the normally negative output of the s^mchj-onizing flip-flop gates
a CPP through 68 and, thus, provides a reader program output pulse which is
emitted from terminal Ro, The reason that the synchronizing flip-flop and gate
68 are used after gate 62 is to ensure a program output pulse of the proper
II - 17
shape and in synchronisn with other program pulses.
Neons correlated, with the flip-flops mentioned above are shown on
PX-.9-305. Program controls for the reader in addition to those on the initiating
unit are discussed in Chapter VIII «
2.2.2, Printer Program Controls
The printer program controls on the initiating unit include the printer
start flip-flop a,nd progr?m pulse input terminal, the printer finish flip-flop,
the printer synchronizing flip-flop and program pulse output terminal, and asso-
ciated gates, buffers, and inverters. Noons correlated with the flip-flops
appear on PX-9-305.
A program input pulse received at Pi flips the printer start flip-
flop into the abnormal state. This causes a start relay in the punch to be
activated so that the tubes in the printer are set up for the data to be printed
and so that a card punching cycle is initiated (see Chapter IX). About 1/4
way through the card punching cycle, the ounch emits a finish signal which re-
sets the start flip-flop and sets the printer finish flip-flop. The output of
the finish flip-flop in the abnormal state gates a CPP through gate 66. The
output of 66 sets the orinter s3n:ichroni2ing flip-flop whose output gates a CPP
through gate 69. The output of gate 69 is transmitted from PO as a program
output pulse.
The printer program controls are discussed in greater detail in
Chapter IX.
2.3, INITIATING PULSE FOR A COMPUTATION: Reader Start Button and Initiating
Pulse Button,
Once the starting sequence is completed (amber and green pilot lights
are on), the KNIAC is ready to begin computing. To stimulate the computation to
II - 18
begin, however, a prograjn pulse must be delivered to the input terminals of the
program controls on which are set up the programs thst begin in the first addition
time of the computation. Two altornativo methods exist for stimulating the be-
ginning of a computation.
If the first event of a computation consists of the reading of a card,
the computation can be stai-ted by pushing the reader start button on the initiating
unit (see Section 2.2,1.). ^'^hen reading is completed, then, a program output
pulse is emitted from terminal Ro. This pulse can be used to stimulate the
programs of the comoutation which immediately follow reading. As was noted in
Section 2.2.1, pushing the reader start button also results in setting the reader
interlock flip-flop so that no interlock pulse need be jirovided for a reading
initiated by the reader start button.
The terminal marked R on PX-9-302 parallels the reader start switch
s
and is used for remote control (see Section 2,2,1,).
The second procedure for initiating a computation is to connect the
terminal marked lo (see PX-9-302) to the sG.me program lino as the input terminals
of the program controls used for the first programs of the computation, V/hen the
initiating pulse button is pushed, the initiating pulse input flip-flop (see
PX-9-307) is set. Its output allows a CPP to oass through gs-te 66 and set the
synchronizing flip-flop « The output of the synchronizing flip-flop gates a CPP
through gate 69 which resets the input and synchronizing flip-flops and causes
a pr-jgram pulse to be emitted from terminal Iq, Neons correla.ted with the flip-
flops mentioned above are shown on PX-9-305 .
The initiating pulse buttcm has a second important use in comiection
with testing the EWIAC, One of the chief techniques fur localizing errors in
eHhc3r the machine or the sot-up of the machine is to operate the ENIAC in the
II - 19
one addition time mode or in the one pulse time raode. Here, the pulses for one
addition time or 1 pulse time at a time respectively are given out in sequence
every time the 1 pulse ~ 1 addit.lon tine button on the cycling unit is pushed
(see Chapter III). In this way, there is an opportunity to observe the numerical
and programming neons. Frequently, it is more convenient to proceed through a
portion of the computation vdth the EKIAC ODeratint^ in its normal or continuous
mode and then to switch to 1 addi.tion time or 1 pulse time operation than it is
to progress through the entire computation non-continuously. This may be
arranged by disconnecting the program cable which delivers the pulse used to
initiate the programs which are to be examined non-continuously. V/e call this
point where the program cable is removed a break point, VJhen the initiating
pulse button is pushed, the computation begins and progresses to the break point,
VJith the necessary switch made in the cycling unit (see Chapter III), computation
in the non- continuous mode can be stimulated by delivering the initiating pulse
from terminal I to the program line from which the program cable was removed ♦
The reader will notice that after the initiating pulse button is pushed, two
addition time cycles, one in which a CPP passes through gate 66 and one in
which a CPP passes through gate 69, are required before the initiating pulse is
delivered.
The emission of the initiating pulse may also be stimulated by remote
control. The terminal marked I^ on PX--9-302 is used to parallel the initiating
pulse switch with a switch which may be carried anywhere around the ENIAC room
and which is connected to I via a program line which ho.s no load box.
■>-Aldc see the discussion of the portable control box in vSection 11, 6 »
II - 20
2.4. SELECTIVE CLEAR CONTROLS
There are 6 selective clear program controls on the initiating unit.
Each control consists of a transceiver with a program pulse input (Ci) and out-
put (Co) terminal on the front panel. The six selective clear transceiver out-
puts are connected in parallel to a line of the synchronizing trunk, ViJhen a
selective clear transceiver is stimulated, its flip-flop emits a signal called
the selective clear gate (SCG), One addition time later, the transceiver is
reset by a CPP and a program output pulse is emitted. Neons associated with the
selective clear program controls are shown on PX-9-3J^,
The selective clear gate is delivered by the synchronizing trunk to
the 20 accumulators. When the SCG is given out, any accumulator whose selective
clear switch is set at SC clears in accordance with the setting of its significant
figures switch (see Section 4.2,3,), Notice that selective clearing lasts but
one addition time and clears only the decade and PM counters of accumulators.
The selective clear feature provides a convenient means of clearing the group
of accumulators which store data for the printer (see Chapter IX) after printing
takes place (see the illustrative problem discussed in Sections 8,7 and 9.5.) •
2.5. DEVICES FOR TESTING THE ENIAC
Located on the initiating unit (see PX-9-302) are the following
devices for testing the ENIAC: d-c voltage meter and associated voltage selector
switches, d-c voltage hum oscilloscope, and a-c voltage meter and voltage se-
l"^r.t or .switch.
The d-c voltage meter together with the two d-c voltage selector
switches provide a means of examining any of the ENIAC* s 78 d-c voltages. The
II - 21
d-c voltage chart below the selector switches indicates which voltage is
measured as a result of the combination of settings on the switches.
The a-c voltage meter and switch are used to measure the three
phases of one of the two bus systems supplying 110 volt a-c to the filament
transformers of the various units. Further details concerning the use of the
testing devices mentioned above as well as others not located at the initiating
unit are to be found in the ENIAC IIAIMTENANCE MANUAL.
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Ill - 1
III CYCLING UNIT
The cycling unit of the ,ENIii.C is the device whiah provides pulses
and a gate for the other units to operate -m and which, thus, keeps the units
operating in csynchronism with one another.
Normally a quarts crystal oscillator eniits 100 kc sine waves which
are converted into pulses spaced at a 10 p,s interval by a pulse stanriardizer .
The fundamental time unit for the ENIiX, a pulse time, is thus 10 ps» The
output of the pulse standardizer f^oes to the so called on beat circuit which
contains another pulse standardizer and tubes for power amplification. The
on beat circuit emits pulses (through one of its 3 outputs) to the off be:-;t
circuit. The off beat circuit shapes, amplifies and delays the pulses which
it receives. One output of the off beat circuit, delayed 1.25 las after the
on beat pulses^is taken t.) a 20 ustar^e rinp counter (neons correlated with
the stages of the ring are shown on PX-9~304) which controls certain gates
and flip-flops. The off beat pulses, delayed 2.5 )is after the on beat pulses,
are taken to a gate which is controlled by a flip-flop, in turn, controlled by
the ring. Other gates associated with the ring pass on beat pulses. The ring
with its associated flip-flops and gates is responsible for producing a pattern
of pulses repeated every 20 pulse times (or every addition time). The gate
and each of the 9 different kinds of pulses (see PX-9-306) emitted every
a.ddition time are each carried on one of the 11 leads of the synchronizing
trunk (see Chapter II for the use of the 11th lead). The various units of
the ENI^iC arc connected into the s.^^chironizing trunk so that they can pick
up the pulses *needed for their operati:;n.
The pulses generated by the cyclin •; unit or pulses from some external
source can be viewed on the screen of an oscillosc^'pe built into the cycling
unit.
This chapter will cover the following topics: sources of pulses and
gates. Sec. 3,lj methods of operation of the cycling unit and ENL.C, Sec. 3.2}
III - 2
cycling unit oscilloscope. Sec. 3.3» Reference will be made to the following
drawings:
Front Panel of the Cycling Unit PX-9-303
Front View of the Cycling Unit PX-9-304
Block Diagram of the Cycling Unit
and Initiating Unit PX-9-307
Cycling Unit Pulses and Gates PX-9-306
3.1. PULSES AND GATES AIID THEIR SOURCES
3.1.1. The Pulses and Gates
The nine different kinds of pulses and the gate emitted by the
cycling unit every 200 ]xs are shown on PX-9-306, The lOP are classified as
off beat pulsesj all other pulses as on beat. Each of the lOP, 9P, 2P, 2«P,
4P, the IP, 1' P and CPP are reughly the same in shape and alike in duration
(namely, 2 p,s)e They differ fron one another in the line of the synchronizing
trunk over which they are transmitted, the part of the addition time cycle in
which they are emitted, and the purposes for which they are used in the ENIAC.
The 9P, the I'P, thb 1, 2, 2*, and 4P are commonly used as digit
pulses. An accumulator transmits the number stored in it or the complement of
the number stored in it by gating appropriate numbers of the 2? over the various
lines of the digit output. In the transmission of complements from an
accumulator, the I'P is gated and allowed to pass over the lead which carries
the extreme right hand significant figure being stored in the accumulator to
make a tens instead of nines complement. The 1, 2, 2' , and 4 pulses are used
particularly where information stored in static form is converted into pulse
form, e.g. in the high speed multiplier, the function table, the divider-square-
rooter, and the constant transmitter. By suitable combinations of the 1, 2, 2',
and 4 pulses any number between 1 and 9 can be formed. The lOP are used only
in accumulators. They serve to cycle each counter around back to the position
^BS
Ill - 3
it starts from when the transmission of a number and/or its complement from
an accumulator takes pl'.ce (see Sec, 4.3.1).
The carry clear ^^ate (which lasts from pulse time 11 to ly) is used
to cause the clearing of accumulators which, at the operator's option, may or
may not take place after transmission from an accumulator (see Sec. 4.2,3.).
The carry clear gate also allows a carry over pulse to pass from a decade
counter to the decade counter imiediately to the left if carry over takes place
in the reception of a number by an accumulator (see Sec, 4.3.2), Carry over
can take place in two ways: delayed or direct. In delayed carry over, the first
reset pulse passed throuf^h a gate (which is controlled by a flip-flop that
remembers that carry over is to take place) is f^ated by the carry clear gate
so that it c<an reach the next decade. The second reset pulse resets this flip-
flop. Direct carry over takes care of carry overs which result from carry
over. In this latter form, the pulse wliich necessitates carry over (and not
the reset pulse, as above) is the one which the carry clear gate allows to
pass to the next decade counter. The reset pulse is emitted twice, once
during the emission of the carry clear gate for delayed carry v^ver and once
after the carry clear gate to reset carry over flip-flops which may be set
first
after delayed carry over takes place. The* reset pulse is also used to reset
a flip-flop (the same one used for carry over in reception) which is set in
the process of transmitting from an accumulator.
The principal uses of the central pro/.T^jJ^ pulse (emitted at pulse
time 17) are the provision of the program pulses needed to stimulate program
controls and the resetting of the receivers and transceivers in these program
controls,
3.1.2, Sources of the Pulses ond Gates
H block diagram of the circuits of the cycling unit which are involved
in generating the pulses and gates emitted by this unit appears on the left
hand half of PX-9-307,
^^^
III - 4
The oscillator (61, 63) eniits 100 KG sine waves which the pulse
standardizer (K, L26) converts into pulses spaced at 10 iis intervals.
In continuous oper -.tion (see Sec. 3.2.) each puJ.se from the oscil-
lator and pulse standardizer circuit is delivered to the on beat circuit, ^t.
special pulse standardizer in this circuit (tubes 61 and 62 and thel.p,s delay
line) produces rectangular pulses 2 Us broad. The on beat circuit has 3 out-
puts. One of the outputs is brought to a terrainal labelled on beat pulse
output terminal (see PX-9~304). FDr every pulse received by the on beat
circuit, a pulse in phase with the 9P is emitted from this terminal. These
pulses are used in the test equipment of the ENIi.C (see ENIAC MAINTENANCE
l^L'iNU.'-iL) . .another output of the on beat circuit delivers pulses to gates
associated with various stages of the cycling unit ring and the third output
delivers pulses to the off boat circuit.
Off beat pulse
Pulse to cycle ring i
On beat pulse
u.;;
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1
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Duration in vi-s
Figure 3-1
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f -
The off beat circuit routes these pulses through a 2.5 ^3 delay line.
This delay line is tapped at ho.lf its length, for the pulses which cycle the
ring counter. The pulses delayed the full 2.5 ]is, called the off beat pulses,
are delivered to gate L30 (sea Fig. 3-1 for a chronological comparison of the
beat and off beat pulses and the pulses which cycle the ring)*
on
Ill - 5
The off beat pulses pass throup;h L30 to produce the lOP as long as
gcite L30 is held open by the lOP flip-flop (L29) IQ tne abnormal state. This
flip-flop is flipped into the abnormal state v^hen the rinf' counter is in stari;e
zero and remains in this state until reset by a signal from gate ii30 (which is
controlled by sta.i-o 10 of the ring). The lOP neon correlated with this flip-
flop is shown on PX-9-304.
Stage 1 of the ring controls gate K30. The on beat pulse passed
through gate K30 gives rise to the IP and the first of the 9P. Stage 2 of
the ring cmtrols gate J30, The on beat pulse passed through gate J30 gives
rise to the first of the 2P and the second of the 9P, etc. In this way, the
1, 2, 2', and l^P, and the I'P are generated in the chronological order sh©wn
on PX-.9-3O6, •
V/hon the cycling unit ring roaches stage 11, ■ gate B27 opens to
pass an on beat pulse. This signal sets the carry clear gate flip-flop,
E27 (see PX-9-304 for the associated neon). This flip-flop remains in the
abnormal state for the next 7 pulse times, being reset by an on beat pulse
gated through gate H27 which is controlled by stage 18 of the ring. The signal
from the carry clear gate flip-flop in the abnormal state produces the CCG.
liVhile the carry clear gate is on, an -^n beat pulse gated through
gate C27 (which is controlled by stage I3) produces a reset pulse. The
second reset pulse is produced when the ring is in stage 19.
A signal from stage 17 of the ring gates an on beat pulse through
gate 27 to produce a CPP.
All of the cycling unit pulses and gates shown on PX-9-306 are
passed through cycling unit transmitters (61-70, 21-30, or 3-12) for power
amplification before transmission from the cycling unit.
It is expected that most of the time the ENIAC's oscillator circuit
with its 100 kilocycle ra,te vvill be used in the cycling unit. If for any
reason it is desired to operate the ENIi^C at some other rate, a different
B^B
B
Ill - 6
oscillat or can be pluggod in and used to supply pulses to the on beat circuit.
Wien the oscillator switch (sec PX-9-304) is set at Ext, and an external oscil-
lator is plugged into the external oscillator input terminal at the right of
this switch, the fundamental pulses for the cycling unit are derived from the
external oscillator. Y^en the cycling unit's oscillat )r supplies the fundnnon-
tal pulses, the oscillator switch is set at Int. It is to be noted that the
time constants for the ENIAC s circuits have been desif^ned f^r a frequency of
been
100 KG and certain safety factors havey>^ncludcd on this basis. If a higher
frequency is used, these safety factors will be lost so that the reliability
of the ENI.-C will be decreased,
3.2. AffiTHODS OF OPER..TION
The cyclinf^ unit can be set up so that the ENL\C opero-tes in one of
3 modes:
1) continuous operatic^n at the fundamental frequency of the
oscillcitor used.
2) one addition time operation in which the cyclin^^ unit supplies
the pulses for only one additirm time cycle at the oscillator
rate with a wait of any len^-^th desired by the operator between
addition times.
3) one pulse tine operation in which the cycling unit supplies the
pulses of the addition tiine cycle one at a time with a wait of
any lenr^th desired by the operator between pulses.
Continuous operation is the natural method of operation of the ENI.^X.
One addition time or me pulse time operation is used for testing and checking
purposes. One addition time operation is particularly useful in checking a
setvup that is put on the EMKC. Before actually running through a complete
computati(m continuously, the operator can cause the ENL-.C to progress through
one cycle of the computation addition tine by addition time. By observing the
neon bulbs in the various units, he can then check to see that the units are
Ill - 7
operating properly and that switch settings and cable connections have bf^en
made correctly te carry out the contemplated set-up. To test whether cr not
a particular unit is functioning properly, 1 addition time, or, for finer
discrimination, one pulse time operation can be used.
The cycling unit controls which are used for the various modes of
operation are the operation selector switch and the 1 pulse time-1 addi.tion
time push button (see PX-9-303) . Vi[hen the operation selector switch is set
at Cont,, the cycling unit emits the pulses and gates continuously, 1/Vhen
this switch is set at 1 Add, the pulses and gates for 1 complete addition time
cycle are given out every time the IP-IA button is pushed, Vfith the switch
set at 1 Pulse, the pulses or gates of the addition time cycle are given out
in chronological sequence, one each time the IP-IA button is pushed. It might
be mentioned that all three modes of operation are possible whether the ENIAC s
oscillator or an external oscillator is used to supply the fundamental pulses.
Continuous or non-continuous operation is accomplished by allowing all
pulses or only certain pulses from the oscillator circuit to reach the on beat
circuit (and then the off beat circuit, and the ring with its associated gates).
The continuous relay, the 1 addition time relay, gates L 28 and L 27 and the
1 pulse - 1 addition time push button (see PX-9-307) are used for this purpose.
It might be pointed out that gate L 27 is connected to the norn^illy positive out-
put of stags zero of the ring* Thus L 27 is closed vvhen the ring is in stage
zero and open at all other times.
In continuous operation, the requirements are that the circuit con-
taining gates L 27 and L 28 shall pass all of the pulses from the oscillator
and that accidentally pushing the 1 pulse - 1 addition time push button shall
have no effect. The requirements are met in the following way: with the
Ill - 8
operation switch set at continuous (as shown on PX-9-307) the continuous relay
is activated so that contacts 1 and 3 are closed and the 1 addition time relay
is not activated so that contact 6 is closed. Now with contact 1 closed, the
cathode of tube 70 (at the left) floats and the tube is, therefore, inoperative.
Since this tube is not conducting, a positive voltage is applied to gate L 28,
The circuit through contact 3 delivers to the pulse standardizer K-L 26 and then
to gate L 28 the oscillator pulses which then pass through gate L 28,
When the operation switch is set at IP or U respectively, only the
pulse which results from pushing the 1 pulse - 1 addition push button or only
20 oscillator pulses immediately following the pushing of the button are to
reach the on beat circuit. Let us, therefore, consider the circuit containing
the 1 pulse - 1 addition push button. Tubes 68 are normally on and tubes 69
constitute a flip-flop with but one stable state (a non-standard flip-flop for
the ENIAC). The normally positive output of this flip-flop is taken to tube 70
and the normally negative output is used to reset the flip-flop immediately after
it is set, When the push button is pushed, tubes 68 go off and the flip-flop is
set momentarily; otherwise, this flip-flop remains in the normal state.
When the operation switch is set at 1^, neither the continuous nor
the 1 addition time relay is activated so that contacts 6, 4, and 2 are closed.
The circuit through contact 2 connects the cathode of tube 70 (at the left) to
-40V so that, with the flip-flop (69) in the normal state, tube 70 is on. The
negative output of this tube holds L 28 closed. Only wheh the push button is
pushed is tube 70 turned off so as to open gate L 28, The positive pulse from
tube 70 (at the left) also passes through the other tube of the same number and,
through contacts 6 and 4, is delivered to the pulse standardizer and, finally,
gate L 28,
Ill - 9
In 1 addition time operation, contacts ^, U, and 2 are closed.
The circuit through contact 2, as described above, causes gate L 28 to be opened
momentarily when the 1 pulse - 1 addition time button is pushed. The circuit
through contacts 5 and 4 delivers the oscillator's pulses to the pulse standard-
izer and the gates L 2? and L 28. The first oscillator pulse passes through
gate L 28, This pulse results, finally, in cycling the ring from stage zero
to stage 1 so that the subsequent 19 pulses from the oscillator pass through
gate L 27, Vflien the ring reaches stage zero again, L 27 is closed and L 28
does not open again unless the 1 pulse - 1 addition button is pushed. In case
the cycling unit has been running in the 1 pulse time mode and is switched into
the one addition time mode in the nidst of an addition time cycle, the pulses
and gates for the remainder of the addition time are given out immediately
(since gate L 27 is open), whether or not the 1 pulse - 1 addition button is
pushed.
Controls are provided which enable the operator to control the method
of operation of the cycling unit when he is standing near some unit different
from the cycling unit. The PA, Ik, and Cont. input terminals (shown on
PX-9-303) make this possible. Portable push buttons may be used in connection
with these terminals by plugging them into program lines (with no load box)
which are in turn connected to each of the terminals PA, lA, and Cont,
A push button connected to terminal PA parallels the 1 pulse - 1 add
addition time push button. Portable push buttons connected to the lA or Cont,
terminals can be used only when the operation selector switch is set at 1
Pulse, since, with either of the other settings, the mode of operation circuits
are locked so that they cannot be entered except from the operation selector
switch. Closing the button connected to terminal lA causes the 1 addition
time relay to be activated^ closing the button connected to the Cont, terminal
causes the continuous relay to be activated.
Ill - 10
A more convenient nethod of operating the 1 pulse time - 1 addition
time push button and the operation selector switch from any place in the ENIAC
room is provided by the portable control box. This box, which parallels certain
controls found on both the initiating unit and the cycling unit, is discussed
in Section 11,6,
3.3. THE CYCLING UNIT OSCILLOSCOPE
An oscilloscope whose screen is shown on PX-9~303 is built into
the cycling unit. The oscilloscope input switch with its 12 positions makes
it possible to view any of the groups of cycling unit pulses or gates, the
selective clear gate, or any external signal brought to the cycling unit
through terminal Ext. below the switch.
It might be noted that the main purpose of the oscilloscope is to
make possible verification of the presence of the pulses and to provide a
rough check on their amplitudes, V^en viewed on the screen, the cycling \m±t
pulses and gates should be approximately an inch high as indicated by the line
on the oscilloscope screen. Because of their reflection in the lines of the
sjnnchronizing. trunk, the cycling unit pulses and gates seen on the oscillo-
scope screen do not have the symmetrical square shape shov/n on the chart below
the screen.
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ACCUMULATCt^
FRONT PANEL .
PX-S-3C1R
X
IV - 1
IV ACCMULATOR
The accumulator serves as a memory and arithmetic unit. Each
accumulator can store and operate on a number having as many as 10 digits
with its sign indication. Two accumulators can be interconnected by special
plugging of their inter connect or terminals so that they can store and operate
on a signed number with as many as 20 digits. Programming memory is provided
by the transceivers of the accumulator's 8 repeat program controls. Repeat
switches included in the repeat program controls make it possible for an
accumulator to remember that it is to transmit a program output pulse 1 to 9
addition times after receiving a program input pulse. In addition to 8 repeat
prograjii controls, the accumulator has 4 non-repeat program controls which have
receivers and can, therefore, receive but not transmit a program pulse.
Because an accumulator is capable of receiving a number or of
transmitting the number and/or the complement of the number stored in it, an
accumulator is capable of perforrai.ng the operations of addition or subtraction.
Repeat program controls on the ENIAC make it possible for the accumulator to
receive or transmit repetitively from one to nine times when a given repeat
program control is stimulated. Each accumulator has 5 digit input channels
through any one of which it can receive a 10 digit signed number. Mechanical
shifters plugged into these input terminals make it possible to receive the
incoming number shifted to the right or left. Thus, the accumulator, through
repeated addition, can carry out the multiplication of a number by a constant
having one or more digits.
The ability to do addition and subtraction and the presence of
transceiver units in the accumulator also make it possible for the ENIAC to
compare the magnitudes of two numbers in accumulators and, on the basis of
this discrirainc-tion, choose which of 2 alternative program courses is to be
followed.
The accumulator can clear its contents to zero in all decades or can
IV - 2
clear so that zero remains in all decades but one and a five remains in that
one (clear to 5), The ability to clear to 5 in a given decade combined vdth
the possibility of plugging a deleter into an accumulator' s digit output
terminal or terminals makes it possible to use the accumulator to round off
numerical results.
The static outputs of various stages of the 10 decade counters and
the binary PLI counter of an accumulator can be connected to other units such
as the high speed multiplier or printer so that these units can receive in-
formation about the number stored in a given accumulctor statically, (see
Sec. 4.3.3.).
The following topics regarding the accumulrtor vdll be discussed
in this chapter: Sec. 4,1, program controls; Sec, 4.2, common programming
circuits; Sec. 4.3, numerical circuits; Sec, 4.4? ^se of accumulators for
fewer or more than 10 digit computations; and Sec. 4.5, problems illustrating
the use of accumulators. Reference will be made to the following diagrams:
Accuraulc.tor Front View PX-5-305
Accumulator Front Panel PX-5-301
Accumulator Block Diagram PX-5-304
4.0. GENERAL SUJEIaRY OF THE ivCCUl-IUUTOR
Each accumulator has 12 program controls (see PX-5-301). Four of
these are non-repeat program, controls; eight are repoat,. Each of the 12 pro-
gram controls has an operation switch for specifying the operation (receive,
transmit, or neither) which the accumulator is to perform and a clear-correct
switch. In addition, each non-repeat control has a receiver with a program
pulse input terminal; each repeat progrsm control has a transceiver with
progrJira pulse input and output terrd.nals and a repeat switch. Neons associated
with the 4 receivers and 8 transceivers are shown on PX-5-305.
The 12 program controls operate common progr-imming circuits (see
PX-5~304), the receive circuits, the transmit circuits, the clear circuits
aa.:JS5>gs.fia5a
IV - 3
(including the significant figures s\vitch and selective clear awitch), and a
circuit which enables the accumulator to pick up the 1>P, The repeat switches
of the 8 repeat program controls also operate in conjunction with the 9 stage
repeater ring circuit. The repeater neons (see PX-5-305) are correlated
with the stages of the repeater ring»
The programming circuits common to all 12 program controls operate
the accumulator's numerical circuits (see PX-5-304) . The accumulator's
numerical circuits consist of 10 decade plug in units and a Pl/I-clear plug
in unit. Each decade plug in unit consists of a decade (10 stage ring)
counter, a decade flip-flop (16, I7), a stage nine gate (lA)j reset pulse
gate (I8), carry over gp.tes (19 and 20), A and S output gates (2l and 22.
respectively) and transmitters, a pulse standardizer and several inverter
tubes. Each decade counter stores 1 digit of si number and plays a part in
the reception or transmission of one digit of the total of 10 digits that the
accumulator can handle. The decade flip-flop has 2 purposes: (l) In recep-
tion it remembers if carry over is to tske placej (2) in transmission it
controls the A and S output gates. Gates I4, 18, 19, and 20 participate in
the carry over process. Gate 18, moreover, controls the resetting of the
decade flip-flop. The decades are numbered from right to left so that units
decade counts as decade 1 and the lO'^ decade, as decade 10, There is a neon
bulb associated with each stage of a decade counter and with the decade flip-
flop (see PX-5-305 )«
The P^f-clear unit contains a binary ring (PM) counter, A and S out-
put gates and transmitters, a pulse standardizer, and amplifier tubes for the
clear signal. There is also a special transmitter for the I'P used when the
accumulator transmits subtractively. The PM counter has stage P for positive
numbers, and stage M for negative numbers (which are treated as complements
in the ENIAC). It should be noted that pulse input to the PM counter can come
not only from the Hi lead of a digit input terminal, but also can result from
■«■
IV - 4
carry over from the 10th decade. This latter fact makes possible th« correct
addition or subtraction of signed numbers. Neons correlated with the stages
P and M of the PM counter are shown on PX-5-305«
VJhen storing the number +2 345 098 7^5, the accumulator's face
will have the appearance shown on PX-5-305 (a) where a darkened circle denotes
a lit neon bulb, and the corresponding stages of the various counters will be
in the abnormal state.
The negative of a number is represented intheENIAC by the complement
10'"'
of the number with respect to 10 . An accumulator stores the number
-2 345 098 765 in the form M+(10 -2 345 098 765) or M+(7 654 901 235). ^Vhen
an accuiaulator is storing -2 345 098 7^5 ^ the digit neons appear as in Px-5-'305
( -/H\-
b) and the corresponding stages of the counters are in the abnormal state.
The decade countecs and PM counter transmit their digit output through
either or both of 2 terminals, the A (add) and S (subtract) output terminals.
The number stored in an accumulator is emitted over the A terminal^ the com-
plement, over the S terminal. The counters can receive their inputs from any
one of 5 input terminals identified by the letters a, 3, y, S, e. The decade
counters and the HL counter of an accumulator receive or transmit the infor-
mation f*r all 10 digits and sign simultaneously (the transmission of the
pulses for each digit is, however, serial) ,
4.1. PROGRi\JvI CONTROLS AND THE SIGNIFICANT FIGURES AND SELECTIVE CLEAR SIVITCHES
As stated earlier, each accumulator has 12 program controls: four
non-repeat controls (consisting of receiver with program pulse input terminal,
operation switch and clear-correct switch) and 8 repeat controls (consisting
of transceiver with program pulse input and output terminals, operation switch,
clear-correct switch, and repeat switch) , In this section the possible settings
* Also see Sec. 4.1.4.
■K-w-When two accumulators are interconnected to form one 20 decade accumulator,
complements are taken with respect to 10^0,
IV - 5
and uses of program control sviitches \sill bo described. The significant
figures switch and selective clear switch which are more properly classified
as part of an s.ccumulator' s common prograjnming circuits are also described
here. The switches are shown on PX-5-301. Neons correlated with the 12 pro-
gram controls are shown on PX-5-305.
4.1.1. The Operation Switch
The operation switch has 9 positions: a, p, y, 8, e, 0, k, S, AS.
If the operation switch of a stimulated program control is set at one of the
settings a, 3, y, S, or e, the accumulator receives the pulses representing
any number transmitted over the digit tray to which the corresponding digit
input terminal is connected. Obviously, if that input terminal is not con-
nected to a digit tr^y or is connected to a tray not carrying pulses at the
time the control is stimulated, the accumulator receives no pulses. This
point will be referred to in Sec, 4.1.2, in connection with the clear-correct
switch.
If the operation switch is set at A, S, or AS, the accumulator
transmits its contents, the cori^lement of its contents, or both respectively
when the control is stimulated.
The setting 0 instructs the accumulator to neither receive nor
transmit. This setting is useful on non-repeat or repeat control operation
switches when it is desired to clear an accumulator without receiving or
transmitting (see Sec. 4.1.2,), ^/hen set on the operation switch of a repeat
program control, the setting 0 provides a means of obtaining a program output
pulse delayed from 1 to 9 addition times without, however, disturbing the
contents of the accumulator, (See the discussion of dummy programs in
Sec. 4.5.).
4.1.2, The Clear-Correct Switch
The clear-correct switch can be set at either C or 0* The accumu-
lator*:.s interpretation of the setting C depends on the setting of the associated
IV - 6
operation switch.
If a stimulated program control's operation switch is set at one
of the transmit settings (A, S, or AS) or is set at 0, the accumulator clears
either to zero in ell decades or to zero in all decades except one in which
it clears to 5, The setting of the significant figures switch (see Sec, 4.1.4)
determines whether clearing is to zero or 5 and, if to 5, in which decade
the 5 appear?^.
With thi operation switch set to a receive setting a, p, y, 8, or &,
the sotting C of the clear-correct switch gives the instruction "pick up the
I'P from the s^mchrom zing trunk and put it in the first decade". If there
are no digit pulses coming to the digit input terminal when the control set
up in this way is stimulated, the accumulator simply picks up the I'P. If
there are actually pulses coming to the digit input terrainal, these are first
received and then, when the cycling unit emits the I'P, this pulse also is
picked up and put into the first decade, A "receive ~ C" program in which
digits are received and the I'P is picked up is, however, not possible when
the digits are being transmitted as a complement from another unit in such a
way that the I'P from the digit tray also arrives in units place. (See
Sec. 4.3.1.)
There are at least three occasion^ when the "receive -C" setting
of a program control proves useful. If a given accumulator is being used to
store the independent variable, the accumulator can be progrtunmed to pick up
the I'P whenever it is desired to increase the value of the independent
variable by one (see the illustrative problem of Chapter VIII ) . In some
problem set-ups, an accumulator may receive from the S output terminal of
the product, quotient, or two root accumulator, a complement with respect to
9 in all decades instead of a 10"^^ complement (see Chapters V and VI and
Sec, 4»3.1.). Also, an accumulator may receive a number transmitted as a
complement by a second accumulator and shifted to the right enroute so that
IV - 7
the original I'P needed to make a tens complement (see Sec, 4.3.1.) is lost.
The missing pulse, in either case, can be picked up through a "receive ~C"
program,
4.1.3. Repeat Switch
The repeat switch (which is found only oti repeat program controls)
can be set to any number between one and nine inclusive. The accumulator
carries out whatever operation is set on the associated operation switch as
many times as is specified by the setting of the repeat switch.- Each
repetition requires one addition time so that if the repeat switch of a
control is set at t (l^-'r-^), r addition times must be allowed for the pro-
gram eet up on that control. The transceiver of a repeat program control
emits a program output pulse at the end of r addition times.
It is to be noted that if the clear switch of a repeat program
control is set at C in connection with an 0 or transmit setting of the
operation switch, clearing of the accumulator takes place but once, at the
end of the r^-^ addition time. The setting C in connection with a receive
eetting of the operation switch of a repeat program control causes the accumu-
lator to pick up the I'P in each of r addition times.
If the number a is stored in one accumulator and the number b in
another accumuleitor, a ♦ rb (where l^'r ^) may be formed in the first accu-
mulator through the use of a repeat program control on each accumulator. The
operation switch of the control on the first accumulator should be set at a
receive eetting and the repeat switch, at r. The operation switch of the
second accumulator's control should be set at A (ifp+rb is to be formed) or
at S (if a-rb is to be formed) and the correlated repeat switch, at R>r.
(see Problem 1, Sec, 4.5.)
In a similar fashion, it is possible to form a ••» b '^ r. 10 ^"'^ ,
In this case where the coefficient of b has more than one digit, shifters
(see Sees. 4,5 and 11.^) are used to effect multiplication by powers of ID,
IV a
Notice that if the coefficient of b has p digits, p program controls will
usually have to be used on the receiving accumulo.tor but fewer than p in.B.y
suffice on the transmitting accumulator. For ex'jnple, 234b may be formed
in an accumulator through* the use of one program control (set-up to transmit
additively 9 times) on the transmitting accumulator. Three progrem controls
must be used on the receiving accumulator: one set up to receive, say on a,
4 times; another set up to receive on 3, 3 times; a third set up to receive
omy, twice, A shifter which shifts numbrical data 1 place to the left should
be used at the ^ input terminal and one which shifts numbers two places to the
left, at the y input terminal of the receiving accumulator, as s.n example of
the circumstances under which fewer than p program controls suffice on the
transmitting accumulator, consider the c^se of farming 998fe, This cm be
done by programming the aceumuL'-'tor which stores b to transmit subtractively
twice end then edditively once and by progrr^mming the receiving accumulctor to
receive twice thru an input terminal without a shifter and once thru an input
terminal with a shifter thnt displaces data 3 places to the left (i.e. form
998b as lo\ - 2b),
4.1.4. The Significant Figures Switch
The significant figures switch is g part of the common programming
circuits which function when the accumulator tro.nsmits subtractively or when
the accumulator clears. The significant figures switch has eleven positions,
0, 1, .,., 10, These numbers refer to the number of significant figures,
counted toward the right from the PM counter, to be retained in the accumulator.
If the significf^nt figures switch on an accumul-tor is set at s
st
(0<s^lO), when clearing takes place, decade 10-s (i.e. the s+1 decade
from the left) clears to five and all other decades to zero. When a single
accumulator is used, this means that the accumulator is cleared to zero in
all decades if its significant figures switch is set at 10. If two accumu-
i i
IV - 9
lators (see Sea. 4.4.2.) are interconnected to form a 20 decade accumulator,
the setting s*10 on the left hand accumulct or causes it to clear to zero in
all decades; the right hand accumulator then clears in accordance with the
setting of its significant figures switah. For example, if 11 significant
figures are to be stored in the 11 left hand decades of a 20 decade accumu-
lator, the significant figures switches of the left and right hand accumulators
respectively are set at 10 and 1,
The setting of the significant figures switch also determines the
decade place into which, the I'P is put when .an accumulator transmits subtrac-
tively. Vath the significant figures switch of an accumulator set at s, the
I'P is transmitted over the lead for decade place 11-s, i.e., the s^^ decade
place from the left. If the significant figures switch of an accumulator is
set at 0, this means thf.'t the I'P is not transmitted when subtractive trans-
mission takes place. It is to be noted th-t the I'P is picked up and put into
^n±ts decade of an accumulator (which, in the case of 2 interconnected accumu-
latorgj^mean the 20th decade from the left) when a "receive-C" program control
is stimulated regardless of the setting of the significant figures switch.
Notice, that as far as rounding off a nurabor in an accumulator is
concerned, the setting of the significant figures switch provides only for
getting the correct s digits from the left. The significant figures switch
setting has nothing to do with deleting the non-significant digits at the
rights The operator provides for the deletion of non-significant figures
by placing a deleter at the output"^' terminal or terroihals of the accumulator
storing s significant figures (see Sees. 4.5 and 11.2). V\/hen printing of an
s significant figure result is to take place from an accumulator and the non-
significant figures at the right have net been deleted, deletion can be
The deleters constructed at present can be used only at digit output
terminals. Special deleters, however, can be constructed for use at
digit input terminals.
IV - 10
provided for in the set up of the IBM punch plug board (see Sec, 9,4 for an
illustration) ,
/♦..1,5. The Selective Clear Switch
The selective clear switch has two positions, SC and 0, When the
selective clear signal is transmitted from the initiating unit (see Chapter II),
all accumulators whose selective clear switches are set at SC clear; those
accumulators whose selective clear switches are set at 0 do not clear.
4.2, COmiON PROGRMCwIING CIRCUITS
4,2,1. The Receive Circuits
Vifhen the receiver or transceiver of a program control whose operation
switch is set at a receive setting (a, 3, y, 5, or e) is stimulated, a signal
from the normally positive output of the flip-flop is delivered (after passing
thru an inverter and a buffer) by way of one deck of the operation switch to the
receive circuj,ts of the accumulators. The receive circuits include gates A
through E 47, buffer tubes (A-C 48, A, C. E, G, and J 46, and A-D 49), and the
5 sets of receive gates A-L 41, ..•, A-L 45 for the digit input terminals a
through e respectively.
The signal from the deck of the operation switch (referred to above)
applied to the set of receive gates corresponding to the setting of the switch,
opens the 11 receive gates for that digit input channel,. Simultaneously, then,
the digit pulses for the 10 decade places and the Phi place are received in the
accumulator c The pulsec for each place are routed to the appropriate counter
with each pulse received at a counter cycling it one stage.
The signal applied to one of the gates A-E 47 allows the carry
clear gate to enter the accumulator and play its role in the carry over process
(see Sec. 4.3.1.).
4.2.2, The Transmit Circuits
If a stimulated program control is set up for transmission (operation
switch set at A, S, or AS), a signal from the normally positive output of the
flip-flop opens one of the gates F, G, or H47 so that the 10 P are admitted
IV - 11
to each of the decados of ihe cxcumulr^tor . The role played by the 10 P in
transniission is described in Sec, 4.3. 1. The signal from the flip-flop olso
opens gate F49 (if S), J^9 (if a) or gates G c.nd H49 (if AS) so th..t the 9P
can pass to the A and/ or S output gates of the 10 decades 'nd the PM unit.
In S or .tS transmission, moreover, gate M42 or M41 is opened to pcss the I'P.
The I'P passing through deck 3 of the significant figures switch is routed to
the lead of the S output terxiiinal specified by the setting of the significant
figures switch. The mrmner in v\'hich the A and S gates are controlled so that
the correct nurAber of digit pulses (or 9P) rivo emitted over each decade place
leed is described in Sec, 4.3.1.
4.2.3. The :Clear Circuits
The clear circuits include gote 1144, decks 1, 2, Ki, and 2k of the
significant figures switch and the clear tubs in the PM unit.
If en accumulator is stimulated to transmit and clear, a signal from
buffer 62 of receivers or buffer 63 of transcoivers'is applied to
gate M44 so thot the carry clear gate (CCG) is passed to the PM-Clear unit.
The clear signal from the Rvl tubes goes directly to the upper connections of
stages 1, 2, 3, 4, 6, 7, 8 and 9 in all dec-des causing these stages to be
flipped into the normal state, V/ith the significant figures switch set at s,
the signal from the clear tubv^s is routed through deck 2A to the upper lead
of the zero stage in decade 10-s and tl:irough deck 1 to the upper connection
to stage 5 in all decades except decade 10-s. Decks Li and 2 of the signifi-
cant figures switch are return circuits from the flip-flops. Thus, stage
zero is left in the abnonial state in all decades except decade 10-s in which
stage 5 is left in the abnormal state.
Notice that gate ivI44 caji be opened to pass the CCG either by the
initial clear gate (see Chapter II) or by the selective clear gate (fjrovided
that the accumulator's selective clear switch is set at SC), as well as by
• -"Jr- — - -^ ■^
JV - 12
the flip-flop mentioned above,
4*2.4, Circuit for Admitting the I'P to Units Decade
A signal from the nornally negative output of a transceiver's
flip-flop, through a buffer and then passing through the clear correct switch
and one of the receive points on the operation switch reaches gates E49 and ?50
after pressing through the inverter G50. These gates, when opened> allow the
I'P to pass through to units dec adij of the accumulator.
4.2.5. Repeater Ring Common to Repeat Pr<jgr£'m Controls
The eight repeat program controls on an accumulator operate the
9 stage repeater ring circuit in common. A signal from the normally negative
output of the flip-flop of such controls end then through buffer 61 opens
gate fl50 so thct a CPP can roach the repeater ring to cycle it one stage per
addition time. IVhen the ring reaches stage t, the output signal from this
stage, passing through point r on the repeat switch, causes gate 62 in the
transceiver to emit a signal. The signal from 62 opens gate 68 which passes
a CPP. The resulting pulse resets the trcinsceiver' s flip-flop and passes
through the transmitter as a progr-m output pulse. The signal from gc-.te 62
also opens gate K50 so that a CPP passing through it clears the repeater ring
back to st-;ge 1 at the same time as the transceiver is emitting a progrcsjn
output pulse.
4.3. rWMERICAL CIRCUITS
4;. 3 . 1 . Operation of the nur:\erical circuits in transraitting -a number and/oj?
its Complement.
When an accumulator is stimulated to transmit its contents and/or
the complement of its contents, the lOP are routed simultaneously to each of
the 10 decade ring counters of the accumulator. Each of the lOP cycles the
to
counter one stage. Thus, if the stage corresponding^? is in the abnormal
state before any of the lOP is received, after receiving one pulse, the stage
TABIi 4-1
A and S TRANSJvilSoION
Accumulator stores P 0 000 000 00? - Significant figures switch is set at 10
F*ulse Time
i
9P emi
tted over A leads
10 987 654 321
9P emitted over S leads , /xS result of receiving
Pm 10 987 654 321 ' lOP ace. registers
Canment
j 0-17
1
1
Program input pulse is
received.
18
19
1-0
p 1 111 111 ns
1
1 1 111 111 111
P 2 222 222 229
2
1 1 111 111 111
P 3 333 333 33o'"'
---Indicates that decade
flip flop is in abnormal
state.
3
0
0 000 000 001
1 1 111 111 lie
P 4 444 444 441"^
k
0
0 000 000 001
1 1 111 111 lie
P 5 555 555 552-"-
5
0
0 000 000 001
1 1 111 ill lie
P 6 666 666 663--'
•
6
L 0
0 000 000 001
1 1 111 111 110
P 7 777 777 774^-
7
0
0 000 000 001
1 1 111 111 110
P 8 888 888 885-
8
0
0 000 000 001
1 1 111 111 no
P 9 999 999 996-
9
0
0 000 000 001
1 1 111 in no
p 0 000 000 007
10
0 0 000 000 001
I'P is 3mitted over the
lead for units decade
because s = 10.
11
, .. . .,_ „ . ,...-. .... .... . .... .
. 12
13
Reset pulse resets an
decade fnp-flops.
U
'
15
— ,K
16
17
Program output pulse
is transmitted if repeat control is used. Receiver (of
transceiver (of non-repeat control) is reset.
non-repeat control) or
IV - 14
corresponding to 8 is in the abnormal stato, and stage 7 not. After receiving
10 pulses, the stage corresponding to 7 is in the abnorm':l stat»Q again (See
Table 4-1),
Meanwhile the accumulator changes the 9P into digit pulses in
the following, vn ay: Let d be the di.git stored in a given decade counter
before the reception of any of the lOP. Then aa the lOP are received, 9-d of
the 9P pass through gate 2'2 to be emitted over a lead of the subtract output
terminal. That one ^^f the lOP which cycles the decade counter from stage 9
to zero,, passes through gate I4 and sets the decade flip-flop. With the
decade flip-flop in the abnormal state gate 2 2 is closed and 21 open so that
the subsequent d pulses of the 9P group are passed over the corresponding decade
place lead of the add output terminal. The first of the RP resets the decade
flip-flop.
So far in this discussion mention has been made of transmitting
through the subtract output terminal the complement of a number stored in an
in
accumulator with respect to 9 999 999 999. Complements with respect to 10
are provided by the accumulator's transmitting over the subtract output lead
corresponding to decade s from the left (where s is the number of significant
figures stored in the accuraulator), the I'P,
The transmission of sign indication is accomplished in a somewhat
different manner. The S and A gates, I6 and I5 respectively, of the PM unit
are controlled by stages P and M respectively of the PM counter, V^lhen a
positive number is stored in an accumulator which is transmitting, a positive
voltage from stage M holds gate 16 open so th; t the 9P ^re emitted over the
PM lead of the subtract output terminal; no pulses are transmitted over the
PM lead of the add output terminal since gate IJ is closed. If the sign of
the stored number is M, gate I6 remains closed and 15 is opened so that no
PM pulses are transmitted through the subtract output terminal, while 9 pulses
i
'<c. -
IV - 1«
are transmitted through the add oatput terrninal.
4.3.2. Oporation of the Nuriericol Circuits in Receiving a Number
The digit pulsus received through the 11 input gates (see Sec.
4.2,1.) are routed simultaneously to the PM count-,r and the ten decade
counters. Each pulse a decade counter receives cycles it one stage. The
T^r . . sign
m counter receives zero. pulses for a positive number and 9 for a negative .•
number. Each pulse received by the PM counter cycles it one stage so that
the reception of an even number of pulses leaves the PM counter unchanged
while the reception of an odd niomber of pulses has the effect of cycling
the PM counter to the opposite stage.
If a given counter stores the digit d before reception and p
(9-d<p^lO) digit pulses are received, carry over takes place from that
counter to the next one at the left (whether the PM or a decade counter).
So called delayed carry over takes care of such carry-overs which result
from incoming digit pulses. If a given counter, c, is in st=ige 9 and there
is a carry over from the counter c-1, then, it is also necessary for carry
over to take place from counter c to counter c+1. Carry overs which result
from carry overs in this way are effected by a direct carry over process,
vVhen a given counter is cycled to st ge 9, a signal from this
stage opens gate 14 so that the next pulse received by the decsde (whether
digit or carry pulse) not only cycles the counter bc-ck to stage zero but
also passes through gate 14 and sets the decade flip-flop (16, 1?). In
delayed carry over, the decade flip-flop continues to remember that a carry
over must take place but no further action is taken while the digit pulses
(the 9P and the l»P)are b^ing received. The signal from the normally negative
output of the decade flip-flop opens gate 18 so thct the reset pulse is passed
(in pulse time 13 of the addition time cycle). This pulse resets the decade
IV - 16
flip-flop and also goes to gate 20v Now, in receive programs, the receive
programming circuits allow the carr3^ clear gate to reach and open gate 20, so
that the pulse from gate 18 passes through to the next decade at the left.
The need for direct carry over arises after the first reset pulse
is emitted by the cycling unit (since it is this reset pulse which gives rise
to the need for direct carry over) so that carry over resulting from carry over
must be treated differently. The carry pulse which passes through gate 14 goes
to gate 19. Since the carry clear gate ramains on for 7 pulse times, gate 19
is held open to pass this pulse to the next decade at the left. The carry
clear gate, as a matter of fact remains on long enough for a carry pulse to
proceed from units decade to the Hd counter of 2 interconnected accomulators
(with a safety factor). Notice, that even in direct carry over, the decade
flip-flop is flipped into the abnormal state. The 2nd reset pulse, which is
emitted after the carry clear gate goes off, resets the flip-flop in this case
(see PX-9.-306)
A number may be received in an accumulator so that a digit appearing
in the i decade of the transmitting unit is received in the i decade of the
receiving unit by connecting the digit output terminal of the transmitting unit
to some digit trunk by the standard cable for that purpose, and then connecting
the same digit trunk to one of the 5 digit input terminals of the receiving
accumulator by a standard cable. However, if it is desired to receive a nimiber
transmitted from " decade i of the transmitting unit in decade i + k of the
receiving accumulator (where k may be either positive or negative), the number
must be jDassed through a shifter enroute from the transmitting to the receiving
unit. It is usually most convenient to plug ordinary shifters into a digit
input terminal of the receiving unit, A number may be shifted to the left
IV - 17
TABLE 4-2
RECEPTION INVOLVING DELATED CARRY OVER
Accumulator Stores M 9 832 104 70? and Receives P 0 000 000 004
Pulse Time |
Accumulator Receives
m 10 987 654 321
1 Aceuraulator Stores
{ After Receiving
1 m 10 987 654 321
Comment
\ 0-17
! Program input pulse
I received-
-18
-19
1-0
0
0 000 000 001
M 9 832 104 708
! 1
0
0 000 000 001
M 9 832 104 709
1
i 2
0
0 000 000 001
M 9 832 104 700
-'^Decade flip-flop in
abnormal state.
3
0
0 000 000 001
1
j M 9 832 104 701"^
i
' 4
5
!
i
1
!
1 6
*
' 7
.
1
8 i
'■ " ■■
t
9 i
10
11
12
-— T- --- •• •
— " ' 1
■
1:3
0
0 000 000 01 n
M Q 832 lOL 71.1
Reset pulse resets
decade flip-flop and
causes carry pulse, :
14
1
1
15
>
i
16
1
17
Program output pulsel
emitted if repeat |
control is used, and^
progreun control is [
reset.
IV - IS
either by an ordinary shifter plugged into a digit input terminal or by a
special shifter plugged into a digit output terminal. A number may be shifted
to the rxi±t only through an ordinary shifter plugged into a digit input term-
inal (see Sec. 11.2).
Table 4-2 illustrates the way in which an accumulator receives a
number and also the delayed carry over process.
Ai3.3. Static Communication Between an Accumulator cmd another ENIAC Unit
The high-speed multiplier receives its arguments and the printer
data to be printed in static form from accumulators. The divider and square
rooter also receives information about the signs of the arguments statically.
The term static is used to distinguish this kind of communication between an
accumulator and another unit from the usual dynsjnic transmission in which an
accumulator transmits d pulses for the digit d and 0 or 9 pulses for sign P
or M respectively,
A unit which receives the static outputs of an accumulator has an
array of vacuum tubes' corresponding to the flip-flops of the counters in an
accumulc^tor. For example, the ier selectors in the high-speed multiplier
(see Sec. 5.3) which receive the multiplier from the multiplier accumulator
statically consist . of a 10 by 10 array of vacuum tubes. Each of the tubes
in a column of the array corresponds to one of the flip-flops in a decade
counter of an accumulator; each column in the array, to a decade counter in
an accumulator. Two standard 55 conductor cables (carried in the static
cable trough which runs along the tops of the ENIAC units) are used to deliver
the static outputs of the accumulator which stores the multiplier to the ier
selectors. The normally negative output of the flip-flop representing digit d
*rwo double triodes in one envelope are referred to here as 2 tubes.
IV - 19
in decade counter c is connected by one of the leads in these cables to the
corresponding tube in the ier selectors. Thus, 100 of the 110 leads are used.
An additional lead in one of the cables goes from the flip-flop for stage M
in the accumulator's FM counter to a tube in the high-speed multiplier which
represents sign M of the multiplier. In this way, when flip-flop d of counter
c is in the abnormal state (because that counter stores the number d) the tube
in row d and column c of the ier selectors is turned on. The other tubes in
column c of the ier selectors do not go on,
Similar connections are made to tubes in the printer from the counters
of accumulators which store data for printing (see Sec, 9.4). In some cases data
is printed from only 5 decades and the PM of ,an accumulator so that only 1 cable
connects such an accumulator to corresponding tubes in the printer. The master
programmer also has decade counters which are siiiiilar in some respects to the
decade counters of an accumulator (see Sec, 10,2.). These, too, can be connected
statically to the printer.
In the case of the divider and square rooter only sign indication
is communicated statically from the o.ccumulators which store the numerator (or
radicand) and denominator.
The length of time required for the inform'jtion stored in an accumu-
lator to be communicated in static form to another unit depends on the length
of the leads from the accumulator to the unit. Approximately an addition time
is required to turn on the tubes in the high-speed multiplier and in the
divider and square rooter because the accumulators stvatically connected to
these units are nesx them, A somewhat longer time is required in the case of
the printer.
IV - 20
4.4. USE OF ACCULIUL-aTORS FOR FEVffiR TH..N OR MORE THAN TEN DIGITS
4.4.1. Use of an Accumulator to Store Two Numbers
In some problems it may be desirable to put emphasis on the number
of different numbers which can be stored in accumulators so that they will be
readily available for computations rather than on the number of significant
figures carried in the computation, V/hile the accumulator has been designed
to handle 10 digit nurobers, it is possible to store in an accuniulator two
numbers with the sa^ne sign if their combined number of digits is 10 or fewer
or with different signs if their combined number of digits is fewer than 10.
In the first case the PM counter is used for the common sign. In the second
case, one of the decade counters is used as a PM counter for the purpose of
registering sign indication for one of the numbers with stage 0 representing
sign P and stage 9, sign M.
11/hen the numbers are transmitted to other units for computational
purposes, they can be isolated from one another by the use of special deleters,
adaptors, and/or shifters. It is to be noted, however, that if subtractive
transmission takes place from im accumulator storing two numbers, only one of
the numbers will be a correct tens complement since the other will lack the I'P
needed to make such a complement,
An example involving the use of an accumulator to store two different
numbers simultaneously is given in the illustrative problem of Sec. 8,?,
4.4.2. Ifvtj3rcj3nne_ction of Two Accumulators to Form a Twenty Decade accumulator
Another option available to the operator is whether an accumulator
is to be used alone as a 10 decade accumulator with 12 program controls or as
20
a,>^decade accumulator with controls for 24 programs. This option results from
the fact that certain of the accumulator's circuits have been left open at the
IV - 21
accumulator's inter connect or terminals (indicated on PX-5-304 by the
symbol 1 _J Lh— — ) . The circuits so trv^ated include the receive, transmit,
clear, and pick up the l^P circuits, and the input to units decade and the
carry over input to the PM counter from decade 10, By special connections
of the accumulator's inter connect or terminals (I,. I I and I on
H' ^2* %' ^2
PX-^5-301), these circuits are closed in one way to make the accumulator
function as a 10 decade c ccumulator and in a different way to interconnect
two a.ccumulators so that they form a 20 decade accumulator.
If a single accumulator is used as a 10 decade accumulator, the
following interconnections must be made:
(a) vertical interconnect or cable must be plugged from
inter connector terminal I to I
Ll L2
(b) load box must be placed at inter connect or terminal I ,
^1
If two accumulators U and U' (where U is assumed to be the left
hand accumulator) are to be used as a 20 decade accumulator, the required
interconnections are:
(a) vertical inter connect or cable from I^ to I
^1 ^2
(b) horizontal inter connect or cables from In to I't and
^1 ^1
from I_ to I'.
R2 1^2
(c) load box at I'p I
1
The significant figures switch of the left hand accumulator should
be set to 10 and in the right hand accumulator to s' where 0 ^ s' "^ 10 if
10 + s' significant figures .-re desired. If fewer tha.n 10 significant figures
are desired, the left hand switch is set to this number and the right hand
IV - 22
switch to 10.
For a given program only 1 program control is used. In reception,
each accumulator receives its ten digits over one of its 5 digit input terminals.
If the standard jumper cable for interconnecting accumulators is used, each
accumulator receives its 10 digits through the digit input terminal on its
front panel bearing the sajTie designation (a-e) as the setting of the operation
switch used to program the reception. Each accumulator transmits its digit
output through its ovm digit output terminals. In the transmission of
complements the 1' pulse is emitted over the decade place lead of the last
significant figure being retained. The 20 decade accuPAulator clears to zero
in all decades except possibly one ^.vhere clearing is to ''j , Clearing is to
zero in all decades if both s and s' are 10. In"receive -C'programs, the 1'
pulse is put into the 20th decade from the left*
More than 2 accumulators should not be interconnected with one
another as described abovi since the carry clear gate does not last long
enough to provide safely for direct carry over across more than 20 decadesj
nor are the progry^^^Bu??irs designed to operate more than 2 accumulators.
4.5. ILLUSTR.;Tr/E PROBUaiS
Matters relevant to setting up accumulators for certain specific
purposes will be discussed in the following pages. Sec. 4.5.1. illustrates
the set-up for a very simple computation involving only accuiriulators.
•Sec. 4.5.2. treats of the use of dummy programs, and Sec. 4.5.3. deals with
the use of accumulators for magnitude discrimination programs. Examples of
the use of accumulators in conjunction with other ENIkC units are found at
the end of Chapters VI - IX.
The examples will be described with the aid of set-up tables and
i
4
A
IV - 23
set-up diagrams. The set-up table is designed to give a comprehensive plan
of the computation showing the programs the units will perform and their
numerical contents at various addition times in the computation. The set-
up diagrams show the cable connections which must be made between the units
and program or digit trays to carry out the computations and also indicate
the settings of switches which are parts of the common progre.mining circuits.
The eet~up tables are given with addition times as the independent
variable. A double column is devoted to each unit. In the left h&nd half the
program is de^cvxheAi in the right hand half, the contents of the ur.it as a
result of the program are shown. For accumulator programs, symbols appear on
three levels, e.g.
1-8 Q' ®
A c 1 of;. 0 0 1
1-9 1-10 1-11
The symbols have the following interpretations:
(1) (T) at the upper right of the first level indicates that the
progr?m is set-up on program control i
(2) j-k designates a program pulse with j representing the tray and
k the line in the tray on which the prograjn oulse is carried,
u progr^jii input pulse which occurs, say, at pulse time 1? (CPP
time) of addition time 0, is written at the left on the first
level of the addition time 1 Uro, .A program input pulse which
is derived from a digit pulse so that it occurs, not at CPP time,
but at some other tine in the addition time cycle, let us say
pulse time 5 of addition time 1, is written at the left of the
third level on the line corresponding to addition time 1. A
program output pulse is always written at the right of level
Vertical
Interoonnootor
Cable
Clear-correct
STfltch set at 0
Clear-correct
switch set at C -
oc
X?
y
^
e
A
5
'^
OT^
/
;mt]~i3T3"d~d
ora
X
era
o o o o
Q-#O#O«O0O#O«O'#O
Program output pulse terminal
Significant
Figures Switch
Setting
Load BQOC
Selective clear
switch setting!
(^for SC
r^for 0
Operation Sv/itch
Setting
Be peat Switch
Setting
Add. time when
program control
operates
Program input pulse terninal
*A shifter, deleter, or adaptor plugged Into a digit terminal is described in
the digit terminal box as folloivsi
A shifter wdiich shifts nuiaerical data k places to the left or right
respectively by the symbol +k or -k,
^'^ deleter v/hich eliminates tlie digits carried on certain decade places
leads by the letter d f ollmyed by the numbers of the decade place
leads deleted*
^ adaptor by the letter a, A description of the adaptor appears in a
convenient place on the diagram*
Pig. 4-1
SET-UP DL\QR.U: SYMBOLS FOR ACCUMULATOR
IV - 24
three. An arrow ending on the addition time line in which
the program is completed and program output pulse is trans-
mitted intervenes between level 2 nnd level 3 for progr-:ans
lasting more than one addition time. In such cases, the
progr.?m output pulse is written at the right of the arrow
tip on the line for the addition time at the end of which
tho^ program is completed and the program output pulse is
transmitted,
(3) The symbols in the second level represent the settings of
the opei^ation, clei.r-correct, and repeat switches reading
from left to right ♦
Thus, the illustrative group of symbols above at the left, has
the following meajiing: A program pulse (derived from a CPP) which is picked
up from line 8 in program tray 1 stimulates program control 5 to cause the
accumulator to transmit additive ly one time and then to clear. Upon completion
of the program, a program output pulse is emitted to line 9 in program tray 1.
On some occasions, as noted above, digit pulses will be used in lieu
of program pulses, a progr^am in which such a digit pulse is generated might
be written as in the sample below,
2-3 ®
' 1^-^(3) to|
2-4
This group of symbols describes the following program: The program pulse
delivered to the progr-^i input terminal of control 8 causes the accumulator
to transmit additively once without clearing. The digit pulses carried on
the add output lead for decade place 3 are delivered to line 5 of program tray 1.
IV - 25
The program output pulse from control 8 is carried on line 4 of program tray 2,
The symbol ,~~.^>— - in the contents column is used to indicate that
an accunul itor is cleared. It is always written on the line corresponding to
the addition time at the end of which clearing takes place.
The conventions on the set-up figures for accumulators are described
in Figure 4-1.
4.5.1. Computation in .accumulators
The computation described here consists of generating n, n'^, i^.nd n-^
respectively in accumulators 6, 7y ^^nd 8, It is desired to terminate the
computation when n^ = 9 000 000 000.
The basic computation which is repeated until the limit specified on
n^ is reached is arrived at inductively. Assuming that n, n-^, and n3 are stored
in accuTxiulators 6, J, and 8 respectively we can proceed to (n+l)3 and (n+l)2
by adding 3n^, 3n, and then 1 to n^ and by adding 2n and then 1 to n^ (see
Table 4-3).
To terminate the computation at the desired point we make use of the
fact that the complement of 9 in a decade place other than that of the extreme
right hand significant figure is zero. Now, we stimulate repetition of the
computing cycle each time by the program output pulse of a dummy program con-
trol whose progrc-un input pulse is d£jrived from the digit pulse or pulses on
the subtract output lead for decade 10 of accumulator 8. As long as the digit
in the 10th decade is different from 9, this control receives and therefore,
transmits a program output pulse which stimulates the iteration, I'Vhen 9 appears
in the 10th decade, this dummy program control receives and, therefore, emits
no program output pulse so that the computation is terminated.
The question as to why the S digit output of the 10th decade is
n ■ O I ■ If
MmmA
AQCUHUUTDt
gffl
rr
«.
c
n
MM
■a
ic
D
on
0 a o »
<[
/
5^
immmtmrn^
, >-j;7/j; r^ /-J
DCD
McumuroB
M>t 7
wronra
tfx
E
c\
ct
r<*y<
cc
Idfl
MM
- o q O
\mmm\
HEDCB
MCUnUUTOC
QCJUC
5
srcr
(?t
<?(
c<
^3
T*
MM
c
q
• •;. r- o
fs •<?
fn «n VM^^O^C
.-^ >^
jm
AccuHuuroe
D
n
-*—
"rr'T'T'n
C
cr
D
0
c
• ^> *> ♦
/-3-«^ Sf/Oj
!
Fig. 4»S
Set-up Dlar^raa for FrolLl©a of Ck^w^ating n« a^. and n es long as n <9 000 Q<X) 000
TABLE 4-3
SET-UP Ti.BLE FOR Gjil^ERATING n, n^, n^
Computation is terminated when n3 y 9 000 000 000
IV - 26
i
Initial
Sequence
Basic
Computing
Sequence
Repeated
' as long as
I 9 000000000
N/'
IV - 27
delivered to a program control which docs nothing but tri^nsmit a prograjn
output pulse instead of being delivered to one of the controls used for com-
puting nay be raised at this point. The answer lies in the fact that the
digit pulses do not begin to pouS" out of the S output terminal until pulse
tine 1 in the addition time ere Is , This would mean that a computing program
initiated by a digit pulse would start after at least one of the lOP and one
of the 9P had been emitted by the cycling unit. Since these pulses play a
vital role in computing progr3ns, such progrr^sis must be initiated before the
digit pulses are emitted. For this reason digit pulses may be used to initiate
computing progrsns only under certain restricted conditions. Instead digit
pulses should bcj converted into a true program pulse through the use of a
dummy program (see Sec. 4.5.2.) and the computing prograra can then be initiated
by the program pulse which results from the dumiiLy program,
4.5.2, Dummy Programs
ii durmy program is defined as one in which the operation and clear-
correct switches are set at 0 and the repeat switch at r where l<-r^9. Dummy
programs are always set-up on repeat progr^oii controls. The dummy program has
at least 3 important functions: 1) conversion of digit pulses into program
pulses, 2) delay of a program pulse, and 3) isolation of progrrms from one
another ,
The discussion in Sec. 4.5.1. regarding use 1) may be eummarized as
follows: To ensure thc-t units receive all of the pulses needed for arithmetic
operations, computational programs must usually be initiated by program pulses
occuring at the time of the CPP, 1/Vhere the stimulation of subsequent programs
depends on digit pulses, the digit pulses should be converted into a program
pulse by being brought to a dummy program control. The prograra output pulse
I
Program pulse available to
stimulate transmission of
argiMents and first muiti->
plication program.
Ul
1
Dummy
Prograjn
U9
\
To stimulate
transmise ion
of lurgumonts
Dunaay
Program
1-3
To stimulate
nnltiplier pro.
gram control (J)
Program pulse available to
stimulate transmission of
arguments and secoM multi-
plication prograB.
».l
Dusmiy
Program
Ducany
Progyam
^2
To stimulate
transmission
of arguments
1.3
t
To stimulate
multiplier pro-
gram control d)
Pig, 4U3
USE OP DUMMY PROGRAMS TO ISOLATE PROGRAM PULSES
^
-J
IV - 28
from the dummy program control can then be used to stimulate computing programs.
The need for the second contribution (delay) of dummy programs becomes
apparent in setting up a fairly complicated problem in which a number of programs
are carried out in parallel. As an example of this need, the reader is referred
to the illustrative problem of Sec, 8.7.
Suppose that at some point in a computation one program pulse is
available to stimulate a multiplier program control and also to stimulate the
transmission of the arguments for the multiplication program. Let us suppose
further that the same multiplier progrojn control is to be stimulated at some
later time but that the arguments for the multiplication program, this time,
are to be obtained in a different way. Obviously, the program p\^se that stimu-
lates transmission of the arguments must be isolated from the pulse that stimulates
the multiplier program control for, otherwise, the units which transmit the
arguments for the first multiplication cannot be suppressed from transmitting
when the second multiplication program takes place.
The desired isolation can be provided for through the use of dummy
programs in the manner suggested in Figure 4-3, The lines which carry program
pulses have been labelled with program tray and line numbers for illustrative
purposes,
4.5.3« Magnitude Discrimination Programs
As mentioned in the opening paragraphs of this chapter, the ENIAC
is capable of discriminating between program sequences by examining the
magnitude of some numerical result. In this section one possible method of
carrying out such a magnitude discrimination program, in an accumulator is
discussed.
Let us assume that the critical quantity upon v\/hose magnitude the
choice of subsequent programs depends is ^ so that when x <i^ b, program P-j is
pnlse to
initiate
diBcriraiiiiit ion
pro ;rtui
i '. . .
.
'
'
A S
Accumulator whicli
stores »«b
Tre.ns..it
AS
1
_ 1
'/'
\
(i'l: load);
t
Oamny
U^
Progrtu.i |iulse
to st iraulute
Pg (x>b)
V
^^
tors aro usod
to connect
these lef.ds to
pro.;rarii linos
Duru:iy
Pro,r;raiv. I'ulse
to stitulate
^l (x<b)
M.\GNITUDS DISCRIiaNATIOH PROGRAM
^
«N
IV - 29
to be stimulated and that when x ^ b, program P2 is to be stimulated. The
magnitude discrimination progrfim is possible because 9 digit pulses are trans-
mitted for sign indication M and none for sign indication P.
Let us form the quantity x-b in some accumulator. Then, using a
special adapter, connect the BI lead of the A output terminal of this accumu-
lator to the program pulse input terminal of one dummy program control and the
BI lead of the S output terminal to the program pulse input teniiinal of a second
dummy program control as indicated on the schematic diagram of Figure 4-4.
Obvioualy when x<b, a positive number is emitted over the S terminal
and a negative over the h terminal so that only dummy program control 1 is
stimulated to emit a program pulse. Similarly, when x > b, the number emitted
over the A terminal is positive and that over the S terminal, negative so that
only dummy program control 2 is stimulated to emit a program pulse.
Even though both the number zero and its complement are represented
in the ENIAC by P 0 000 000 000, the case x = b (or x - b = 0) can still be
treated in the same way as x > b (or x - b > 0). For recall, when a positive
number is transmitted from an accumulator, the k output gate of the PM counter
remains closed and the S gate opens to allow the 9P to pass to the m lead of
the S output terminal.^' These 9P received at the program pulse input terminal
of dummy program control 2 cause the omission of a program output pulse to
stimulate Pp.
^(•Notice that when an accumulator which stores zero transmits subtractively to a
second accumulator, this second accumulator receives, at first, M 9 999 999 999.
Later, in the pulse time of the 1»P, the transmitting accumulator emits this
pulse so that the receiving accumulator then stores P 0 000 000 000 after
direct carry over proceeding from units decade to the PM counter has taken
place.
IV - 30
In a problem in which accumulators are not urgently needed for
storage or computational purposes, this set-up of a nagnitude discrimination
program is satisfactory. However, in general, this method has the disadvantage
that no numerical programs other than one magnitude discrimination program can
bo carried out in an accumulator so set up, since both digit output terminals
of the accumulator are completely associated with the magnitude discrimination
program. The same magnitude discrimination can be effected without completely
tying up either digit output terminal of an accumulator if the master programmer
is used, A magnitude discrimination program involving the master prograia is
described in Sec. 10.6.2. of the master programmer chapter.
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NI^H SPeE» MULTIPLIER
FRONT PAMtl NO.J
V HIGH-SPEED MULTIPLIER
The high-speed multiplier finds the product of a ci^jned multiplicc'ri'l
with as many as 10 digits by a signed multiplier of p digits (p <^10) in p-^k
addition tines. This high-speed is possible because proviiicts are obtained
through the use of a multiplication table rather than by repeated addition.
Not only does the high-speed multiplier find products, but it also
has facilities for controlling certain programming features in accumulators
associated with it: l) It can instruct the argument accumulators to receive
and clear or not clear at the end of the multiplication) 2) It can signal
the final product accumulator to dispose of the product; 3) It delivers to
associated accumulators prograjining signals used in the multiplication process.
The following topics will be discussed in this chapter: Sec. 5.1^
program controls; Sec. 5.2, common programming circuits; Sec. 5.3, numerical
circuits; Sec, 5.4> Interrelation of high-speed multiplier and associated
accumulators; Sec. 5.5> illustrative problem set-ups. Reference will be made
to the following diagrams:
Front View PX-6-309
Front Panels PX-6-302, 303, and 304
Block Diagran PX-6-308
Interconnection of
High-Speed Multi-
plier with Associ-
ated Accumulators PX-6-311
5.0. GENERjiL SUIvGditRY
The high-speed multiplier operates in conjunction with 4 or,
possibly, 6 accumulators. Two accumulators, the ier (multiplier) and icand
'r^'
^g""*** - ■■'^^■^}i^^
V - 2
(multiplicand) accumulators, store the arguments. The accumulators used for
this purpose have the static outputs of their counters connected to the
multiplier. Also, the PM-clear unit is statically connected to the multiplier
so that these accumulators can be cleared by a signal from the multiplier at
the end of a multiplication program and so that the high-speed multiplier may
take proper cognizance of the signs. If products having 8 or fewer significant
figures are required, two accumulators are used for storing the products which
the multiplier emits in pulse form through the digit output terminals on
panel 3. These accumulators are referred to as the LHPP (left hand partial
products) and RHP? (right hand partial products) accumulators. vVhere products
of more than 8 significant figures are desired, a pair of interconnected accumu-
lators may be used as the LHPP accumulator and another pair as the RHPP accumu-
lator. The role of the LHPP and RHPP accumulators vdll be discussed in greater
detail below. Either the LHPP or RHPP accumulator may be used as the final
product (FP) accumulator.
The high-speed multiplier has 24 program controls (8 on each of its
3 panels) on which can be set up 24 essentially different multiplication pro-
grajns. In a problem in which there are more than 24 basic multiplications,
each multipUer control can be used on a number of different occasions with
the aid of the master programmer or sequences of dummy programs.
Each program control consists of a transceiver with program pulse
input and output terminals, multiplier and multiplicand accumulator receive
switches, multipUer and multiplicand accumulator clear switches, a significant
figures switch, a multiplier places switch, and a product disposal switch. The
argument accumulator receive switches enable the operator to specify the digit
input terminals through which the ier and icand accumulators shall receive their
V - 3
arguncnts for -i given progrrui/ The significant figuros switch setting
determines into which decode place of the LHPP five round off pulses 'ire trans-
mitt ed for a given progrcT.!, The sottin.- of the places switch determines how
nany of the nultiplicr's digits are used for thu progr:-'n ond, therefore, how
long the nultiplica-tion takes (see below and Sec. 5.2,). Instructions for the
transmission of the product from the finf^l product -' ccur.iul;-tor can be set up
on the ^mswer dispoS';;l svatch.
The 24 progr-'.o controls operate the comjnon prograixiing circuits
which include h. 14 st-ge program ring with associated gates, inverters and
buffers, the icr accumulator ;,nd ic.nd accumulator receive circuits with
progrfTi pulse output tormin-ls Ra-Rb and Da-De on front pi.nul 1, argument
accumulator clear circuits, th... oroduct disposal circuit with program pulse
output ternin;.as ,., S, ..., ASC on front p^^nel 3, ^nd thu o.rgunent accumulator
clear circuits.
The progrviin ring with its .issociatcd tubes clocks the progress of
multiplication programs. Gates ..'47 '^-nd ..'46 which ; dmit the I'P .:ind 4? arc
the round off gates. Gates B'~K'46 opervte in conjunction with the places
switch to terminate the program when the specified number of pl;:ices of the
ier have been used and, in conjunction with gate F'48, to clear the ring to
st'jge 13 at this time. The progrK-m rinn, ultiraately, also controls a circuit
for correcting products if either or both of the .-'rgur.ents are negative (see
discussion below), the 1 -^nd r receiver circuits which emit static si^'-nals
to program the o-rtial products accumul':'tors to receive, the circuit vjhich
emits the F pulse to stimulate the collection of the partial products in the
final product accum.ul-: tor, and the reset circuits for the program controls.
« #
* #
V - 4
The outputs of stages 3 through 12, by mec;ns of the buffer tubes
B'-iL' 42, control the high-speed multiplier's numeric3.1 circuits so that
multiplication by each digit of the ier takes place successively.
The numerical circuits consist of the multiplier selector gates,
the multiplication table, the coding gates which pass the 1, 2, 2' , and 4P?
the multiplicand selector gates and the shifters. The multiplication table
stores the products of numbers between 1 and 9 by nurabors between 0 and 9
by means of a resistance ma,trix. The table actually consists of 2 tables,
the tens and units tables, used for storing the tens and units digits of
these products respectively. For cxajnple, the multiplication table remembers
the product of 4 x 9 by storing 3 in the tens table and 6 in the units table.
The ier selector tubes are set up by the static outputs of the
ier accumulator counters. Each column in this array of tubes is dedicated
to 1 decade place of the ier; each row, to one of the digits between 0 and 9.
When the program ring signals for multiplication by the ier digit in a partic-
ular decade place, the activated ier selector gate for that decade place emits
a signal to the multiplication tables.
Static signals for the oroducts of all digits between 1 and 9 by
the particular ier digit are emitted from the multiplication table and converted
into pulse form at the coding gates. The products from the tens and units
tables respectively then go to the left and right hand sets of multiplicand
selector gates. These gates are set up by the static outputs of the icand
accumulator so that only the products appropriate to the digits of the icand
are allowed to pass.
These partial products then go to the loft and right hand shifters.
Each set of shifters consists of a 10 by 10 array of gates. The gates on each
V - 5
row are controlled by one stage of the program ring and the outputs of the
gates are connected diagonally so that products s.re shifted successively one
place to the right as multiplication by the ier digits progresses from left
to right* The products are emitted from the 4 digit output terminals on panel
3 of the high-speed multiplier with those from the tens table being emitted
by the terminals LH partial products ^accumulators I and II and those from the
units table, by the terminals RH product accumulators I and II. The terminals
identified by II and I respectively take care of the digits for decade places
loO - 109 and lO^^ - 10^9,
Notice, that the high-speed multiplier transmits only the digits of
the product but not the sign. For positive arguments, this results immediately
in the correct signed product. If either or both of the arguments are negative,
cert'ain correction terms are needed to produce the correct signed products.
From Table 5-1 in which the correction terms for the various cases are tabulated,
i"t can be seen that whenever an argument is negative, the product obtained from
the multiplication tables must be corrected by 10 times the complement of
the other argument. In the case where both arguments are negative, moreover,
the sign of the product must be corrected. The progroiaming circuits (see
Sec, 5.2,) provide for the last correction by causing the I'P to be transmitted
over the PlI lead of the digit output terminal RH product accumulator I, The
programming circuits provide for the other corrections by causing the emission
of progrcim output pulses at the RS and/ or DS output terminals. The operator
must interconnect the multiplier with its associated accumulators so that
these pulses stimulate the corrections to take place (see PX-6-311 and Sec,
5.4.).
TABLE 5-1
CORRECTION TERIvlS FOR NEG.vTIVE lER r.ND/OR IGiilD.
R and D represent the absolute values of the ier and icand respectively.
Case 1
Ier positive -,
Icand negative ■
_ . — —
Case 2
Ier negative
Icand positive |
C.>se 3
Ier and Icand both
negative
ier 1
5-
P + (R) ■
M + (10^^ - R) \
U + (10^0 _ R)
>
icand
j
1
li + (lOlC - D) !
P -^ (D)
M + (10^^ - D)
Product obtained from
multiplication tables
1
P
f (10^^ R - RD) '
P + (10-^^ D - RD)
= M + (RD - 10-^^R -10-^^D)
Coricci/Xon tern needed
M
. 10^° (10^° - fl)
M + 10^0 (10^0 ^ J))
iv: + [P +,10^^(R)1 +[P+10^^(D)j
Correct signtd product
M + (10^^ ^ RD)
li + (10^^ - RD)
P + (RD)
1
V - 7
To summarize th'3 discussion of the previous pages, multiplication
of a 10 or fev\;er digit icand by a p digit ier required p + 4 addition times.
These addition times ara asod for the following purpososi
1, reception of a ■ gun.ento
2. settiiig up of t. elector tuber and round off in LHPP accumulator
3A
. \ obtainin.p- jn.e r.'-.rtial products (jcand)x (l digit of the ier)
. ? successively for i-h^^ p dibits of ibe ior
1 p+2.y
p+3. correcting rroducts in case either one or both of the arguments
are negati/o.
p+4. collecting the partial products so as to form the final product
and clearing of the argument accumulators.
Tables 5-2 and 5-3 offer examples illustrating the operation of the high-speed
multiplier. Although either the LHPP or RHPP accuraulator can be used for form-
ing the final product, we assume here, as in PX-6-311, that the RHPP accumulator
is used for this purpose,
5.1. PROGRAIvl CONTROLS
Each of the high-speed multiplier's 24 program controls consists
of a transceiver with program pulse input and output terminals, argument
accumulator receive switches and clear switches, a significant figures switch,
a places switch, and a product disposal switch. Neons correlated with the
transceivers are shown on PX-6-309.
5.1.1, The Multiplier and Multiplicand ^accumulator Receive Switches
Each of the argument accumulator receive switches has the positions
a, 3, y, 5, e, and 0, Associated with the points a-e on the switch for the ier
accumulators are the progrr.m pulse output terminals Ra-Re and, for the icand
Ti-.BTJC 5-2
MULTIPLIC..TION OF M 8 198 630 400 by P 2 800 000 000
Description of Program; liul-^inl/ Icand by 2 places of the ier
Round a.nswcr off to 8 places
Cleo.T' io^^ and iccnd accurnui&tors after mult ir)li cation
Trcindmi'o product from fina.L product accumulator
AddTl Ier accumulator Tlcond rccuL-alator
Time
stores
stores
j '" LHP? .■.ccumulator'Tiy
Receives ;
j RHP? and ?P .-.ccwaulator (I) j
Stores after j ' Receives j Stores after :
I ! receiving I ! receiving \
m 10 987 654 321 f Ra 10 98? 554 321 ! P,l 10 98? 654 321 1 RI 10 98? 654 321 | EA 10 98? 654 321| Pa 10 98? 654 321!
P 2 800 OCO 000
i ^
k I. J ».
I ■ !. :.,■■
7 }
M 8 198 630 400
LI 8 198 630 400
0 000 oc€ 050 I p 0 000 000 050
1 oil 300 000 i P 110011 100 050 i 0 628 626 080 j P 0 628 626 080 |
1 1 *
0 60? 6L2 030
M 7 200 OCO 000
P 1 618 742 080 ! 0 04B 2IS 402 | P 0 676 874 482!
LI 8 818 742 080 I
^^"^'^^^■•^''^ —^^.-^-1 ■ I M 8 818 742 080
Program output pulse and product disposal signal are erdtted.
M 9 495 616 562
Product is transmitted fron product accumulator.
t
Tii-BLE 5-3
Multiplication of M 8 198 630 400 by M 2 800 000 000
Description of Program: Multiply icand by 3 pi ices of ier
Do not round answer off
Clear ier and icand accumulators
Retain product in final product accumulator
Add ,
Tiifle
^ 10 987 654 321
Ier accumulator j Icand accumulator! LHPP i^-ccumulator (I)
stores I stores | Receives : Stores after
! i
receiving
2 SCO 000 000
PM 10 987 654 321
m 10 987 654 321 I Ri 10 987 654 321
\i 8 198 630 400
RHPP -nd FP .vcc^omulator (I)
Receives ' Stores after
1 receiving
PLi 10 987 654 321 I PLI 10 987 654 321
1 Gil 100 000 ; P 1 Oil 100 000
0 607 642 030 ; PI 618 742 030
0 000 OQO GJO i P 1 618 742 030
0 628 626 080 ! P 0 628 626 080
0 048 248 402 i p 0 676 874 482
0 GOO 000 000 i P 0 676 874 482
_ AV^._^-QOO 000 OOP ! M 0 676 874 482
P 7 200 000 OOP ' P 8 818 742 030 | PI 801 369 6C0 j 11 2 478 244 082
P 8 818 742 Q30 ! P 1 296 986 112
Program output pulse is transmitted
<
I
V - 10
accunulator, Da-De, If one of these switches is set at a receive point, a
program pulse received on a program input terminal is ratronoPitted tlircuj^'h*
the corresponding terminal Ea-Re or Da-De when the program control of which
the switch is a part is stimulated. The operator sets up program controls
on argument accumulators so that a pulse transmitted in this way will cau-se
reception to take place as specified (see PX-6'-311 fnd Sec. 5.4. )•
The argument eccumulator receive switches have been provided in order
to simplify the prograjnming of multiplications. Once the connections between
some or all of the terminals Ra-Re, Da-De and the argument accumulators ai*e
made and switches have been set up accordingly on the argument accumulators,
the operator does not need to provide the argument accumulators with a
separate program pulse to stimulate them to receive whenever a multiplication
is to take place. The one program pulse which stimulates the performance of
the multiplication also stimulates the receptioh of the arguments provided that
they can both be received during the first addition time of the multiplicat-ion.
If an argument accumulator receive switch is set at 0, no pulse
to stimulate reception of the corresponding argument is transmitted. The
setting 0 is used for multiplication programs in which the argument is held
over from the previous program (see Sec, 5*1.2.) or in programs in which it
is desirable to stimulate the argument accumulator independently to receive
its argument.
^"If , -for example, both the ier p.nd icand ar© received directly from the constant"
transmitter, the argument accumulators cannot both receive their arguments in
the same addition time because the constant transmitter transmits but one
number in an addition time.
V - 11
5.1.2. Multiplier ajid Multiplicand xiccumulctor Clear Si/vitches
Clear circuits in the high-speed multiplier are connected to the
PM-clear units of the ier and icand accumulators. If an arguraent accumulator
clecir switch is set at C, the high-speed multiplier's clear circuits emit a
clear signal tov/ards the end of addition time p+4 which causes the correspond-
ing argument accumulator to clear. In prcgrcima for which a clear switch is
set at 0, no clear signal is transmitted to the corresponding accumulator,
5.1.3. The Significant Figures Switch
The setting of the significajit figures switch determines to which
decade place of the LHPP accuraulator 5 pulses for round off are transmitted.
If this switch is set at 2<st9, the five round off pulses are sent to decade
10-s of LHPP accumulator I, For s=10, the round off pulses are sent to decade
10 of LHPP accumulat;)r II." No round off pu].ses are emitted in a program for
which the significant figures switch is set at "off".
The significant figui^es switch provides greater flexibility in the
round off options for the 2^ programs thaji would be possible if the only round
off control available were the significant figures switch on the final product
accumulator. If, however, the round off requirements on all multiplication
programs are the sane, the significant figures switches of the multiplier
program controls can be set at off and the significant figures switch on the
final product accumulator can be set appropriately.
Notice that the setting of the significant fi^-^res switch of a
multiplier program control does not cause the final product accuiTiulator to
10
emit the I'P (needed for a complement with respect to 10 ) when the product
is disposed of subtractively, V'/hether or not this pulse is put in, and the
•j;-Unless 2 pairs of interconnected accumulators are used to receive the partial
products, the round off pulses emitted for s=10 are lost.
V - 12
decade in which it is put, depend en the setting of the significant figures
switch on the final product accumulator (see Sec, 4»1.4.). If a product
is disposed of subtract ively in such a way that the I'P is not transmitted
by the final product accumulator, the I'P can be put in at the receiving
accumulator (see Sec, 4*1.2,),
5.1.4. Places Switches
If the places switch of a program control is set at p (where '»:
2 ^ p<. 10), the high-speed multiplier multiplies the entire icand by the p
left hand digits of the ier whenever this program control is used. Such a
program lasts p+4 addition times end a program output pulse is emitted by the
transceiver p+4 addition times after the reception of the program input pulse,
5.1.5. Product Disposal Switch
The points .^, AS, .,., aSC on the product disposal switch together
with the program pulse output terminals A, S, ..,, hSQ at the left of panel 3
of the high-speed multiplier make it possible for this unit to direct the
transmission of the product from the final product accumulator.
At the end of addition time p+4 when the high-speed multiplier
program control emits a program output pulse, a pulse is also emitted from
the terminal a, S, .,., or ^.SC corresponding to the point at which the product
disposal switch is set. The product disposal program pulse output terminals
which are used should be connected to program pulse input terminals on the
final product accumulator (see PX-6-311) . If a product disposal switch of
a given program control is set at 0, the high-speed multiplier does not emit
a product disposal pulse when this program control is used.
The program switches oi\ the final product accumulator ma.y, but
need not necessarily, be set so as to correspond to the labelling of the
V-13
product disposal terminal frora which the stimulating pulse comes. For example,
if in a given program it is c^onvenient to dispose of some product subtractively
twice, a,nd then clear and, moreover, no multiplication progrtim requires ASC
disposal, then the ASC output terminal can be connected to a repeat program
control on the final product accumulator set up for subtractive transmission
repeated 2 times with clearing. Notice thrt with such a set-up the point
ASC on the product disposal switch no longer has the meaning transmit .k and
S simultaneously and clear but, rather, the meaning established by the set
up of the program control on the final product accumulator.
In a course like the previously described one care must be exercised
to prevent conflicting programs. Since during the first two addition times of
a multiplication program, the RHPP accumulator has a completely non-active role,
product disposal lasting 2 addition times is possible (with the RHPP accumu-
lator used as the J*? accumulator) even though a new multiplication program
is initiated when the product disposal signal is emitted. If the product
is disposed of repetitively r times (where r > 2), the next multiplication
program must be initiated no sooner than P-2 addition times following the
product disposal signal. It might also be mentioned at this point that
repetitive reception of an argument cannot be accomplished through the use
of the terminals Ra-Re or Da-De since the argiunents must be received no later
than the end of addition time 1 of a program in order to allow sufficient
time for the selectors to sot up,
5.2. COIvDION PROCrRiJ..!I[ING CIRCUITS
5.2.1, Argument itccumulator Recoivo Circuits
A program input pulse delivered to a program control is routed
c
PX-6^402
1
TABlii; 5-4
CHROIJOLOGIGAL OPERATION OP HIGH SPEED MULTIPLIER'S PROGIL^l^aUG CIRCUITS
Note J It is assma©d her© that ten-decade accumulators are used for the partial products.
Add, Time
for 2 digit
multiplier
^nd of
: Add.
time 0
6
Stage of
Ring
Counter
14
EVSIIT
In High Speed Multiplier's programming
circuits
1) Program input pulse is received and re-
traiismitted to ler and/ or icond accumulatora
1) Ring cycles to stage 2 at CPP time.
1) IP passed byiB'47| sets 1 and r receivers.
2)
■*3)
I'P gated tlirougli |a53 ^^ *? tlirough |a*46
are delivered to round off gates.
Ring cycles to stage 3.
In associated accumul«*tors
1) See addition time 1,*
^er and icand accumulators receive
arguments.
1) LHPP and RHPP accumulators' "receive
on a* circuits are activated.
2) LHPP accumulator receives five round-
off pulses.
t
I 1)
2)
3) Ring cycles to stage 4,
Signal from stage 3 opens ier selector K
gates so that multiplier tables are entered
v/ith first from the left ier digit.
Signal from stage 3 opens A* shifter gates.
1) Signal from stage 4 opens ier selector J
gates and shifter B" gates.
2) Signal frorri |B*46| gates a I'P through Il^i.
3) Signal from p'^ei gates CPP through [BMSI to
j initiate RS and Y)Z corrections if R and/or
! D are negative.
I 4) Signal frorA |B* 46 (gates CPP through IBUs] to
provide reset signal for 1 and r receivers.
Signal from 1B'46| allows CPP to pttss through
5" 43 to clear ring to stage 13,
and 2) LHPP accumulator receives tens
digits of "icand x first ier digit" in
decade places 10 through 1, RHPP
accumulator receives units digits of
"icand x first ier digit" in decade
places 9 through 1,
1)
2)
3)
i
\ 4)
5)
\\) Signal from sta^e 13 allo\7s CPP to pass
I through [M9l and |F50| to the reset flip-
I flops for program controls 1»8 and 17-24,
i^^ rriS'^^ ^°*^ stage 13 gates a CPP throu^
\ I A" 471 so that P pulse is emitted
LHPP accumulator receives tens digits
of seccaid P.P. in decade places 9
tiirougli 1, RHPP accumulator receives
units digits of second P.P. in decade
places 8 through 1,
PH counter of RHPP accumulator receives
I'P if both ier and icand are negative.
See addition time 5,* ^
LHPP and RHPP accumulator*' H»eceiv©
on a* circuits cease to be activated.
'^^RS and/ or li5 corrections are made
(see addition time 4),
2) See addition time 6,'*^^^
3) rin-r cysles to stage 14,
|1) Signal from stage 14 goes to reset gates
j of program controls 9-16 to reset these
I controls. All other program controls are
reset by signals frojn reset flip-flops,
Icand and ier accumulator oleai* signals
j are emitted,
13) Program output pulse and product disposal
I signal are emitted,
|4) Ring cycles to stage 1,
I
|2)
^**LHPP and RHPP are combined.
2) Argument accumulators clear.
Product is transmitted from final
product accumulator.
V— 14
immediately through buffers (61 and 62 on program control 1, for exionple) to
the argument receive switches for that control. Each receive point on these
switches connects to one of 5 output circuits consisting of buffer, inverter,
standard transmitter, and program pulse output terminal (Ra-Re or Da-De on
front panel l). The prograx.i output pulse transmitted in this way is taken
to a prograjii control on the argument accumulator to stimulate reception of
the argument (see Sec, 5.4.) •
5.2.2, Program Ring and iissociated Circuits
When a high-speed multiplier program control is stimulated, the
signal derived ultimately from the normally negative output of the flip-flop
holds gate F'44 open so that a CPP is admitted to cycle the program ring one
stage per addition time. The effect of signals from various stages of the
ring on the round of:^ partial product receiver, complement correction, final
product collection (F pulse), and program control reset circuits are discussed
in this section. Menti )n is also made of the effect of signals from the ring
on the numerical circuits which are discussed in greater detail in Sec. 5.3.
Table 5-4 summarizes the chronological operation of the programming circuits
for the case of a 2 place multiplier.
The progran ring is in stage 1 when a progr5m input pulse is re-
ceived by some program control at the end of, let us say, addition time zero.
During addition time 1, the argument accumulators receive their arguments
(see Sec, 5.2,1.) and, at the end of addition time 1, the ring cycles to
stage 2.
A signal from stage 2 opens gate B'47. The IP passed through this
gate sets the 1 and r receivers early in addition time 2. These receivers
V - 15
are not reset until the end of addition time p+2 (see discussion below). As
long as these receivers are set, a static signal is delivered to the 1 and r
terminals on front panel 3, These signals, brought to inter connect or terminals
on the left and right hand partial products accumulators (see Sec. 5.4.)>
stimulate the reception, through the a input terminal, of the round off pulses
(see discussion immediately following), the partial oroducts emitted during
the succeeding p addition times, and the I'P to correct the sign of the
product when both the ier and icand are negative. Since the 1 and r signals
are brought directly into the "receive on a" programming circuits of the product
accumulators, no program controls need be set up to program the reception of the
partial products.
The signal from stage 2 of the ring also opens gates A* 47 and A' 46
so that the I'P and A-P are passed. These five pulses, used for round off of
the product, are delivered to the gates A"--H" and K" 45, Each of these gates
is connected to a point on the significant figui:'es switches as indicated on
PX~6-308, The normally positive output of the activated program control's
flip-flop through inverter 65, buffer 64, and point s on the significant
figures switch, opens one of these gates so that the round off pulses are
emitted over the lead for decade place 10-s of the left hand partial products
digit output terminal I or over the lead for decade place 10 of the left hand
partial products digit output terminal II »
In addition time 3, a signal from stage 3 through B'42 and inverter
LI is applied to the ier selector g^tes for the 10th decade place, K 2-11, and
through inverter B« 4I, to the shifter gates A" 30-21 and 10-1. In this way,
multiplication by the first digit of the ier takes place with the products
being emitted on the leads for decades 10-1 of the digit output terminal LHPP
V - 16
accumulator I and on the leads for decades 9-1 of the digit output terminal
RHPP accumulator I, and for decide 10 of RHPP accumulator II, Similarly, in
addition times 4^ 5, ..., p-*-2, the ring causes multiplication by successive
digits of the ier and the eid-ssion of the products shifted over one place to
the right each time.
The places gates numbered B'-K'46 emit a signal on the coincidence
of a signal from the normally negative output of the flip-flop (and buffer 61 )
passing through point p on the places switch and a signal from stage p+2 of
the ring. The signal emitted by one of these gates terminates the multipli-
cations by successive ier digits, causes complement correction to taice place,
and resets the 1 and r receivers.
The phase of the multiplication progr^n in which the tables are
used is terminated as follows: A CPP passed through gate F'48 at the end
of addition time p+2 clears the ring to stage 13, ...t the same time, a CPP
passed through gate E'47 resets the 1 and r receivers.
During addition time p+2, the signal from one of the places gates
allows a I'P to pass through gate L"47 and a CPP, through gate B"46, A static
output signal from stage H of the ier accumulator' s Pli counter holds §ate B"47
open so that gate B"47 pasoes the output of gate B"46 to the BS output terminal
on panel 3. Similarly, if the icand is negative, the output of gate B"46
passes through gate C"47 to the ES terminal. The gates L"47, 45, and 43 are
so arranged in series that the 1»P is allowed to reach the M lead of terminal
RHPP accumulator I only if both the ier and icand are negative. This latter
pulse is received in the right hand partial product accumulator because the
r receiver is not reset until the end of addition time p+2 after this pulse
V - 17
has been emitted. With the associated accumulators set up as shown on PX-6-311>
the pulses transmitted from terminals RS s.nd DS stimulate the carrying out of
the complement corrections (shown on table 5-3.) during addition tira^ p+3.
At the end of addition time p+3, a CPP passes through gate a"47
which is held open by a signal from stage 13 of the ring. This pulse, trans-
mitted through terminal F on panel 3, is used to stimulate the collection of
the partial products into the final product (see PX-6-311 and Sec, 5.4.)»
At the end jf addition time p+4, the activated program control is
reset and a program output pulse is transmitted. This resetting is aecomplished
in one way for program controls (9'-l6) on panel 2 and in a slightly different
way for program controls (1-8 and 17-24) on the first and third panels.
The signal from stage 14, early in addition time p+4, is brought
directly to gate 62 of transceivers on the second panel. This gate, controlled
by the normally negcitive output of the flip-flop, then emits a signal which
passes through inverter 6*? and opens gate 68. The CPP passed through gate 68
at the end of addition time p+4 resets the flip-flop and is transmitted as a
program, output pulse.
Gate 62 of a transceiver on the first or third pa.nel also gets a
reset signa.1 early in addition time p+4. This signal, however, is derived
from one of the reset flip-flops (E, F 49 on panel 1 or L", K" 49 on panel 3).
A signal from stage 13 opens gates D49 and K"50 to allow a CPP to pass and,
thus, set the reset flip-flops on panels 1 and 3 respectively. The normally
negative output of these flip-flops is then brought to gate 62 in the associ-
ated transceivers. Neons correlated with the reset flip-flops are shown on
PX-6-309.
i
V - 18
5.2.3. iir/^uinent Accumulcitor Clear Circuits
The reset signal, whether from stage 1/j. or from the reset flip-flope
(see discussion iranediatcly above), causes gate 62 of the stimulated transceiver
to emit a signal early in addition time p+U» This signal, through inverter 65
and buffer 63, passes through the ier and/of icand accumulator clear switches
to one or two of the argument accumulator clear gates B, D, F, and H30. The
a,rgument accumulator clear gates are so connected to points on the clear
switches that gate H30 is opened if only the ier accumulator is to be cleared,
gates D30 and F30 if both argument accumulators are to be cleared, and gate
B30 if only the icand accumulator is to be cleared. Towards the end of addition
time p+A., the carry clear gate (CCG) passes through the opened clear gate
(or gates) to the PM-clerar unit of the accumulator (or accumulators) to
cause the clearing of the argument accumulators as specified by the settings
of the argument accumulator clear switches,
5.2.4. Product Disposal Circuits
There are 6 product disposal circuits A, S, ,,,, ASC each consisting
of a progr?im pulse output termin-.l on panel 3, a transmitter, a gate D", E'%
.,., or J"47 and, a buffer D", E", ..,, or J"46. Each -)f these circuits is
connected t> the corresponding point A, hS, ..., /iSC on the product disposal
switch.
The signal emitted by gate 62 of the stimulated progrBjn control
when the reset signal arrives, passes through inverter 65, buffer 63 and the
product disposal switch to the buffer of the appropriate product disposal
circuity Thus, the gate in such a circuit is held open to pass a CPP at the
end of Bddition time p+4. This pulse, emitted from one of terminals a, S,
..,, ASC at th':; end of addition time p+4, is used by the operator to stimulate
V - 19
disposnl of the product (see Sees. 5. 1.5. £-nd 5,4.) which tekes place during
addition time p+5.
5.3. NW^IERICAL CIRCUITS
The numerical circuits of the high-speed multiplier consist of
the ier selector ^ates, the tens and units multiplication tables, the coding
gates, the left and right hand icand selector gates, the left and right hand
shifters, and the 4 digit output terminals, LH partial products accumulators
I and II and RH product accumulators I and II on panel 3 (see PX-6-308).
The ier selectors consist of a 10 by 10 array of gates. The ier
selector gate in ro^ i (i = 0 to 9 from bottom to top) and column j ( j = 10
to 1 from left to right) receives, ^s :ne input, the static output of stage i
in decade counter j of the ior accui:iulator and, as its second input, a signal
from stage I3-3 of the multiplier ring. The output signal from a gate in
ro-w i activates row i of the multiplication tables.
In the tens table there are eight groups of vertical conductors
corresponding to icand digits 2 to 9 and in the units table, 9 groups of
vertical conductors corresponding to icand digits 1 to 9. The basic products
are remembered by means of a pattern of connections between the horizontal
conductors (from the ier selectors) and the vertical conductors (to the
coding gates). Each of the vertical conductors is labelled so as to indicate
the pulses (1, 2, 2', or 4) which are brought to the coding gate to which it
is connected. No conductor is needed for icand equal to one in the tens
table since the tens digit of any one digit ier by icand equal to one is zero.
Now, a signal from a gate in rovv i of the selectors is delivered
through the connections between row i of the tables c.md the vertical conductors
V - 20
to the ccdin.f^ gates. Since the .^utnut of the ier selector gate is negative
the signals from the multiplication tables have an inhibitory effect on the
coding gates to which they are delivered. Notice that for ier equal to zero,
all coding gates are turned off. The 1, 2, 2', or 4P s-re allowed to pass
through only the coding gates which receive no signal from the multiplication
tables.
Suppose, for example, that the digit in the tenth decade place of
the ier is 2, Then during addition time 3, the tube K9 emits a signal. The
digit pulses passed by the coding gates as a result are shown in Table 5-5.
The pulses passed by the coding gates associated v.ith the tens and
units multiplication tables are brought through buffers and inverters to the
left and right hand icand selector gates respectively. The left hand selectors
consist of a 10 by 8 array of gates with the tubes in row i (i = 2 to 9 from
bottom to top) corresponding to digit i of the icand and the tubes in column j
(o = 10 to 1 from left to right) to decade place j of the icand. Similarly,
the right hand icand selectors consist of a 10 by 9 array of gates with each
of the 9 rows corresponding to a digit of the icand between 1 and 9. The
static outputs of the icand accumulator's decade counters provide one input
for the icand selector gates. The second innut for the icfj.nd selector gates
on row i c ■•nsists of the pulses passed by the coding gates associated with
icand i. Out of the collection of products transmitted by the coding, gates,
the icand selector gates select the products needed for the particular icand
set up in them. For example, when the icand M 8 198 630 400 is multiplied
by the first digit of the ier P 2 800 000 000 (see the illustrotive problem
of table 5-2), the product pulses passed by icand select, .)r f-ates are shown
V - 21
TivBLE 5-5
Pi^RTIivL PRODUCTS Q.IITTED BY THE LiULTIPLIC.TION LxBLES FOR lER = 2
i Codint'; Gates which receive j
Icand I si/^nals from multiplication
tables
V - 22
in Table 5-6.
Correspondinp; to each set of icarid select >r gates is a set of shifters,
■fcach set of shifters onsists .^f a 10 by 10 amy of gates. The pulses for
the partial Droduct "ier-'difat by icand digit in decade plac^ j" are routed
through buffers and inverters to the shifter gates in column j ( j=10 to 1
from left to right). The second input for the gates in row i (i= 3 to 12)
comes from stage i of the program ring. The '..iutputs of the shifters are con-
nected diagonr?lly to the leads of the digit outout terminals, LH partial products
accumulators I and II and RH product accumulotors I and II, in such a way that
the partial products are emitted one decade Dlo.ce further to the right as
multiplication by successive ier digits takes place. The partial products
for icand by first ier digit are emitted over the leads for decade places
10-1 of the left hand partial products accumulator I, decade places 9-1 of
right hand partial products accumulator I, and decade pli.ce 10 of right hand ■
partial products accumulator II,
Notice that the pulses for the partial products are emitted from in-
verter tubes instead of standard transmitters. For this reason, the digit
output terminals on panel 3 must be connected to input terminals on the partial
products accumuL'-tors by means of digit trays or cables to which no other units
are connected in parallel. No loe-d boxes are used on these dit"it trays (see
Sec. 5.4.)*
5.4. INTERRELATION OF TliE HIGH-SPEED MULTIPLIER aND ITS kSSOCI..TED i;CCUlvIULi.TORS
5,4.1, Interconnections for Numerical and Pro.'^ramming Data
The 10 decade counters of the ier accumulator (9) are connected statical-
ly to the ier selector gates. Similarly, the decade counters of the icand
V - 2ZP
Ti.BLE 5-6
SELECTION OF PRODUCTS BY ICaND SELECTORS iJHEN ICaND M 8 198 63O 400
IS MULTIPLIED BY FIRST DIGIT OF lER P 2 800 000 000
Decade
Place
Left Hand Icand
Selector Gate
Pulses
Passed
Right Hand Icand
Selector Gate
Pulses
Passed
10
L'22
1
L'2
6
9
0
K'9
2
8
J' 21
1
JU
8
7
H'22
1
H'2
6
6
G'24
1
G'4
2
5
F'27
0
F'7
6
4
0
0
3
D'26
0
D'6
8
2
0
^ 0
1
• 1
0
0
These ThaysTo be Used OnuTo
Carry The Prrti«l Products
And Fot^ No Other Purpose
rHiDDDDDDDi
^<1
Rcc
^3
n
'? 9 9 9
Q* o« o« o«o*o« o« o*
r^DDDDDDUa
^-^
1 1
flee.
*10
kawp Rcc.
o o
1-
0
9 9 9 9
9» o» o» o»o» o»o» o#
H I QH -
PflNEL^
fffff fffff
5 PEED MULTI P
PftNEL*2
I ER
r"
dD~ dB
(Mo Load Boxes Ar€ To Be
U5EO On These Lin £5
PftNEL^J
r-oD D D D D D DD
'-Q
UFT HAND PflRTiflL PRODUCrflccT
Ace
^9] O O O
fl 1(3 I I
D
9000
o«o« o« o«o«o*o«o«
a
oDD DDDDDD
LEFT HOHP PflnriflL PRODUCT AccH
flee
♦12
lF?ODiQir Proooc
Are Touno
13
See PX"5-13lTi!
r-1]UU □[][][] Do
05
flee
*13
0 \0\Pi Is
D
0 o p o
o • 9» o» O»O»0»0»O»
flpD DDDDDO
wgyHftNoTJiWTiflL gnrtfli PRODUCT ficcir
D
flee
If ?0 DiciItPropuctu
Are fouNO. U
Note- Horizontal Lines Above The Umits Ite^fiESENT DiairTRRYs.
The Dotted Lines Represemt Tr«y5 Wmkh Need Be Used
Only When 20 Diqit Products Are Pound.
MOORE SCHOOL^ELECTRICflL ENQINEEI^INCi
UNIVERSITY ^''PENNSLVflNlfl
Interconwectiow Of HiaH-5 peed Multiplier With
fisSOCIflTEO flcCUMULftTORS'^ PX'"6"31I
V - 23
accumulator (lO) are connected to both sets of icand selector (._^atGS. Stage M
of the ier accumulator is statically connected to gc'tes B"47 and L"45 fJ-)^^'-
stage li of the icand accuraulotor, to ;-;',tes C"47 and L"43 of the complement
correction circuit (see Sec. 5.2.2.). Fifty leads in each of 4 55-conductor
cables ere used for the static outputs of the 20 decade counters involved, i-^n
nddiiional lead in each .'f 2 of the cables carries minus si;:n data. These
cables ere brouf^ht from accumulators 9 and 10 to the selector gates in the
high speed multiplier by vvay of the static cable trouf!;h which runs along the
top of the ENI.\C panels.
Only accuiTiulators 9 and 10 which are next to the hif-h-speed multiplier
since
can be used as the ier and icand accumulators only one addition time, the 2nd,
is allowed ^ith a safety factor included) for the set-up of the arguments in the
selectors. If lonr.er static leads were used to deliver the arguments to the
selectors, mor'o time than has been provided would be needed to set up the
argUTiients. as a matter of fact not even the ier and icand accumulators can
be interchan -.-on since the time constants h'lve been me-.sured on the basis that
the further accumulator (9) is connected to the ier selectors on panel 1 and
the nearer accumulator (10), to the icand selectors on panel 2 of the high-
speed multiplier.
The outputs of gates B, D, F, and H50 in the clear circuits (see
Sec, 5.2.2.) are also connected to the PH clear units of the argument accumu-
lators,
ii.ll the other connections between the multiplier and its associated
accumulators for numerical and prof-^ramning purooses are made through digit or
progr.am trays or cables. These are shown on PX-6-311.
V - 24
5.4.1.1, Propirarnminfi Connections for "Receive Argument" Instructions
The terminals Ra-Rs are connected to program pulse input terminals on
the ier accumulator. The program switches associated with these terminals are
set up appropriately. Similarly terminals Da-De are connected to program pulse
input terminals on the icand accumulator* Although PX-6-311 shows all of the Ha-Aie
Ra-He and Da-De terminals connected, it is> of course, necessary to make connec-
tions only for the terminals which are used*
5.4.1.2, Connections for Partial Product. Reception
The signals emitted through the 1 and r terminals on panel 3 of the
high-speed multiplier during addition times 2 through p*2, are delivered to
the "receive an a" programming circuits of the partial products accumulators
by means of cables (see PX-5-l^l) running from the 1 and r terminals tO inter-
connector terminals on the LHPP and RHPP accumulators respectively. The digit
output terminals on panel 3 of the high-speed multiplier are connected to the
a input terminals of the partial products accumulators. If products with 8 or
fewer significant figures are required) the dotted digit connections may be
omitted.
To repeat the statement made in Sec. 5,2.2, no Other units can be
connected in parallel to the tr^ys used to carry the partial products and no
load box should be Used on these trays*
5.4.1.3, Connections for Complement Correction
The S output terminals of the ier and icand accumulators are con-
nected to the 3 input terminals of LHPP Accumulator I and RHPP AccuAu'lator I
respectively for the purpose of delivering to these accumulators the correction
terms required if either or both of the arguments are negative (see Table 5-1).
V - 25
with these digit connections, the following program connections must be made:
1) from terminal RS on panel 3 to a control on the ier accumulator
set up for subtractive transmission and to a control on the LHPP
accumulator set up for reception on J3.
2) from terminal DS on panel 3 to a control on the icand accumulator
set up for subtractive transmission and to a control on the RHFP
accumulator set up for reception on 3.
A second method of making the couiplemcnt correction connections is
possible. The S output terminals of the ier and icand accumulators may be con-
nected to the p input terminals of RHPP accumulvator I and lilPP accumulator I
respectively. In this case the progr'am connections are as follows:
1) from terminal RS to the ier accumulator and to the RHPP accumulator
2) from terminal DS to the icand accumulator and to the LHPP accumu-
lator.
5,4.1.4» Connections for Final Product Collection
PX-6-311 shows the partial product accumulators set-up so that the
RHP? accumulator also serves as the final product accumulator. The A output
terminal of the LHPP accumulator is connected to the 3 input terminal of the
RHPP accumulator and the F terminal on panel 3 is connected to a control on
the LHPP set up for reception on 3. Since the RHPP accuiaulator is free for
two addition times at the beginning of multiplication programs and the LHPP
accumulator is free for only one addition time (see Sec, 5 •1.5.)? there is a
slight advantage in using the RHPP accumulator as the final product accumulator
if repetitive disposal of the product is contemplated. Otherwise, by suitable
digit tray and programming connections, the LHPP accumulator can just as well
be made to serve as the final product accumulator. Notice that it is not neces-
sary to use a shifter at the 3 input terminal of the FP accumulator in collecting
V - 26
the partial products in one accumulator because the high-speed multiplier's
shifters align the partial products so that they can be combined properly*
5. A.. 1.5. Prograjiiming Connections For Product Disposal Instructions
PX-6-311 shows several of th^^ a, S, ,,,, ASC terminals on panel 3
connected to prof^rojn controls on the final product accumulator vvhich are set-
up for transmission. As mentioned earlier in Sec. 5.1..5., the meanings toicen
on by the points k, S, .,., ASC on the product disposal switch depend entirely
on the set up of the program controls on the final product, accumulator to which
the terminals A, S, ,,,, ASC are connected,
5,4.2. Position of Decimal Point in Product Accumulator
The position of the decimal point of the product ean easily be deduced
from the description of the way in which the shifters route the partial products
(see Sec. 5.3.). If r, d, and f respectively represent the number of decade
places that the decimal points of the ier, icand, and final product are removed
from the FU place in their respective accui'aulators (r, d, and f are positive or
negative according as they -re counted toward the right or left of the PM counter),
then
f = r -»■ d
This formuls is illustrated in the table below.
ier
r 1
icand
d
product
f
PI. 000 000 000
1
■
P 1. 000 000 000
1
P 0 1.00 000 000
2
P 0 03.0 000 000
3
P. 4 000 000 000
0
P 0 PI, 2 000 000
3
P 0 03.0 000 000
3
10~^(P,4 000 000 000
-2
P 0. 012 000 000
1
V - 2?
5.5. ILLUSTRATIVE PROBLMS
Programs set up on the high^-apeed multiplier are described in the
high-speed multiplier column of set-up tables as follows:
1) On the first level, i-j, at the left, represents che line from
which the progriim input pulse comes end <L)., at the right, the
program control
2) On the second level, the first pair of symbols (a, ..., g, or 0
followed by C or O) represents the settings of the ier accumu-
la,tor receive and clear switchesj the second piir of symbols
represents the settings of the icand accumulc'.tor receive and
clear switches; the third symbol (.i, ,.i, .;SC, or 0) the setting
of the product disposal switch* A specird meaning assigned to
one of the points on the product disposal switch is indicated
by an asterisk end an explanatory note at the top of the high-
speed multiplier column,
3) On the third level, the first symbol (2, ..., 10, or off) specifies
the significant figures switch setting^ the second symbol, the
places switch setting.
4) On the fourth level, located on the addition time line in which
the progrim is completed, the symbol ra-n designates the program
output pulse.
Thus, the following symbols
1-3 ®
aC j30 A
off, 8
^ 5-6
V - 28
describe a program set up on high-speed multiplier control 4. The program
input pulse comes from line 3 of progro.m tray 1, The ier accumulator receives
its argument through its a input terminal and the icand accumulator receives
the icand through its 3 input terminal. The ier accumulator is, and the icand
accumulator is not cleared at the end of the program. The product is trans-
mitted additively from the final product accumulator. The product is not
rounded off and 8 multiplier places arc used. The program output pulse is
transmitted to line 5-6, If the progrojn input pulse 1-3 were received, say,
at the end of addition time 6, all the above symbols except the arrov^ and the
program output pulse would appear on the addition time 7 line. The arrow
would run from the line for addition time 7 to the line for addition time 18,
The program output pulse symbol would appear on line 18,
No symbols are written in the columns for accumulators associated
with the high-speed multiplier when these accumulators carry out programs
(receiving the arguments, for example) stimulated by the high-speed multiplier.
The set-up diagr.-ims, however, indicate the semi-permanent connections miide
between the high-speed multiplier and these accumulators.
For the symbols used on the set-up diagr:jns see Fig. 5-1 below,
5.5.1. One Program Control Devoted to Each Multiplication
The problem of Sec. 7.5.1. which describos the way in which the ENIAC
can be set up to perform quadratic Lagrangian interpolation illustrates one
method of using the program controls on the high-speed multiplier. Here it is
assumed that the interpolc^tion is carried out as part of a computation which
does not come anywhere near exhausting the program control facilities of the
high-speed multiplier. Since sufficient program controls are available, one
control is devoted to each multiplication program.
w
/°^-&^'fa/
ler ^tOG'inula.tor Cleejr
3t* itch set at 0
loend AccunulLitor Clear
3\/ltch S6t at G
"Product Disposal
3-.7itcli "ettinc
-_dd, tines in -.vhich
pr 02;rai:i oontrol is used
> • o*o« o«o*o«o*e*|
/?o^ ••-/?<£
DoC'-'DS
JL_L
LHPP I
LHPP II
k
IQ
n
fZ
/J
14
/i"
/^
6
c
0
0
(j
0
00
o
<')
o
0
o
o|o
i
l_ . 1 _
_
i
1. _
!
■
,. ,1 , ..J
/2.jej9^2J^2_23Z±
C!0'0|0]0'OiblO
o
my
o
u
UTO
9* o« e* o* e«
«• o* o*
o • o • e • o • e • o •{ e;«
RIIPP I
RHPP II
/isc
05
F
Program Output Pulse Terminal
Prograni Input Puis© Torrainal
ler ABCunulator Receiva
&"/itch Setting
loand iu5cumulo.tor Recei-v©
Switch Setting
Significant Figures
Sv/ltch Settiag
Places Sv;itch Setting
The terminals on a^saciatsd aocLunulutors to \7}iich teruinuls Ro-Rc:, Da-De,. .'^.wC, R3, DS, an
are connected eo-e ii^rkod T-dth a corrc s-pondiiig syrnbol.
3ET-UP DLiGRA].: GOIJVHIT lOJIS PQR HIGIi-SP2:£D MULTIPLIHR
V - 29
The stimulating puls(3s for tho various multiplication programs are
derived directly from the main programming sequence .and the multiplier's
prograiii output pulses go back to the main programming sequence (see Table 7-4) <>
5.5,2. One Progrein Control Used Repeatedly
The computation discussed in section 6,5 which consists of forming
X = - i_i t- cd
illustrates the repeated use of a given high-speed multiplier program control,
2
In this computation, the three pairs of multiplications to form the terms x.
3
and then x. , vdiile they involve different arguments, can be handled by one pair
of multiplier controls. Here again the pulses which stimulate the multiplication
programs as well as tho ones which stimulate transi:iission of x , x , and x^ to
the argument accumulators are derived from the main program sequence. However,
3
after each term Xj_ is formed and received in another ixcumulator from the final
product accumulator, the program sequence goes to the master programmer for in-
structions as to vjhether or not the multiplier prograaa controls used repeatedly
for the formation of x[ and x^ are to be used again and, if so, with which
argument (see Table 6-13).
The problem of Sec, 6.5. also illustrates the use of one of the
points on the product disposal switch to effect repeated transmission from
the final product accumulator.
V - 30
5.5.3. Isolation of Program Sequences \^ich Stlriiulato Transmission of arguments
to .-argument xxccumulators, Multiplication Programs^ and Reception of Products
From Product i^ccumulators .
In Sec, 8,7 is described a problem in which there is a basic cornpu-
tation sequence involving 17 multiplications. This basic sequence is repeated
10 times in the course of the problem. One progrc.m control is devoted to each
of 12 of the multiplications and the remaining 5 multiplications are taken care
of by either of 2 program controls. Each time the basic computation sequence
is reper:ted, arguments stored in different units of the ENIAC are used. Also,
within each sequence, the location of one of the arguments required in the 5
multiplication prograjas ^/Jhich are performed on 2 program contrc^ls, as mentioned
above, varies. Furthermore, in alternate repetitions of the basic computing
sequence, 6 of the 1? products are received by way of different input terminals
in the accunulators to which the final product accumulator transmits.
The set up for this problem is suinmarized in Table 8-13 ^^s much of
the basic computing sequence as is constant for all 10 repetitions is handled
in one predominant program sequence. In this predominant program sequence,
the same program input pulse which stimulates a multiplication progr-am also
stimulates the accumulators which store arguments for the multiplication to
transmit then and the progr^am output pulse from a multiplier progr.'m control
not only stimulates the reception of the product from the final product accu-
mulator, but also initiates the next multiplication program. The program pulses
for thie predominant sequence are carried in program trays 7 and 8 (see Table
8-13.
V - 31
Branching off the predominant progrojn sequence and carried on in
parallel with it are three sequences. The sequence whose stimulating program
pulse is carried on program line 6-11 is concerned with procuring appropriate
arguments in the cases where the loc'-.tion of argument varies from repetition
to repetition, h second sequence whose program pulses are carried on program
tray 9 is concerned with selecting which of 2 multiplier controls is to be
used for 5 of the 1? multiplications rmd with stimulating the transmission of
an appropriate argument, .. third sequence whose progrc\m pulses are carried
on trays 10 and 11 handles the reception of 6 of the 1? products from the
final product accuiiulator.
The iteration of the predominant sequence with its branches 10 tines
is provided through the use of the master progra,n¥aer.
inr t
2
3
A
5
1
NcoN6 On DueiNC; Division
Ado.
TiMC
I -J
2
3
TT-l
4
TRflNS-
C€IVfeR
Off
pROCt.
B
1
Pi
R
B
1
Z
:3
4
5
(o
7
7
7
P
PL«CC
9
9
9
Cvcucs
10-^
Rccfiv^R
D NT N+
D'y Ny
Dfl OR Ds
Nor ' V
^ec
\ ; 2
0p
CkN
,_ i
3 4 5 <; 7 8 9 10 M
ON ON
ON OH
ON
....1-
I® (D
i .
ON ON
ON
-:£i
ON
CVCLCSf
®
ON
ON
ON
ON
^ON
iCVCL«»
iONj I
■i — ^-— r■•-
" _[_PsOiiqfl [
• — — \
tt \
>rd-_4^_4.^ . Jf^ I
l»
iDs^oeDfll
I* II
r"
I »ONi
I •
I
I
D5 OR Dfl I
M II
H __
1 1« ••
|0M|
C+ioR-i,!" •'
'^' >«r}
Q<k)
• J
1.2, OR
Ne ITH€R.
T-:::^-r
®!©
ON ON OH
ON ON
NCON& On Dur.inci ^quarc Rooting
Add.
TlMC
r-i
H-i
m-i
Pro<».
Ring,
B
R
B
1
2
PLftce
R.INC,
I
i-t
|0-|>
Recc wen.
®0N
Dr.+ 1
DsORDfi
+208-2,^5-
-1 Oft 1-1,
S< >Nac
-AOB.+A,
-1 OR-hl,
3
4
D N'N
- W-H
i 3 4 5
OH
i -^ i
ON
C 1 8 <i 10 U
I I
ON
ON ON
ON ON
ON >•
ON
w
. I« i «»
u
ON
ON
ON
ION
• CxCLtS
ON 1 01
ON
^- t — '"-
I Da«*Ds I
-p —f-
■..>>n.. •_-(:
®
ONI
t
Cvcuc
W1
IX
J.
tl
|C-2 OR +2,, [•♦
t— 1 — "-
1 jtfN
-; — 4 — —
i«N
ON
ON
Q
rMeoN Lamps -
I. Divide Flip -Flop
2.DCN0MIN A TOR pLlp- FlOP
3lNUM€RAT0R RlNQ —
AwMUM €RflTOR. R I NQ -+-
5.CLeR^ Flip- Flop
UnTCRLOCK CoinCID€NC€
Flip- Flop
7. JNTEELOCK Flip- Flop
aDi^^ceiveR
9tNyE€CCIV€R
(0.pRo^R«nRi»^FLiP-FLoP
II.PuLseSouRCC n. IP-Flop
Answcp. Disposal (h4)
RCCCIVCR. NCOHS
RCCCIVCR. N€0NS
Pl«C€ RinqNcons
(NuM6r&«olo C«IIR€5PONt>To
0€CfiD€sOp"fiNPcCU»^VJLflT«J
7| y\ y\ y\ ,'
0 0 0 0 0
00 00 00 00 00
sex:
:S3
0000
% * » 4
orw^r>o
rTTTTT
HtftTCR Fuse NfONS
O O O C Or
» «. T • o*
02
O'
4-
• Tr R N scciv€ rM caw s(|- 8 j
Peo<5Rfin Ring KIcons
Divider. -5quare Rooter
Fro^^t View
PX-IQ-30^
Foot Notcs —
©On If Pecvious Pr«c,r«m Was R Division. I
(T)-On If Dcnominator k PostT«ve WweN ^£ccivcd \n DcNcniNRTOR QccunuLflTog..
®IF, BcFOet DcNOMlNftTOR. ibAODCD To Ob SuBTEftCTtorROM NuT^€ef\TOR^ ThC NuM€RftTCR. h P0SlT\V€, NcON*4 is On ;
OTHeRwise N60n'*3 Is On.
-(4)G0€s On Wh€N 1nT€Rlock Putse Is Rcceivco.
®-Go Cm Onc fiooiTiON Tine Rft£R. HI- 9
(i) • Goes On : a- In NI Crsc, Two Addition Tines nrTCR HI- 9.
b- In I Cftsc^ In Whkhcvcr. Occur. -s lftT€i2.-.Two Rddition Timcs Aptcr 111-9 Or OncAdditioimTimc Qttcr N<on7
** Only If Mo Ov€r.draft Results. '
3^i.^10-(p Wh€R€ ^ Is Th€ ScTTiNa Or Thc Plrcgs Switch.
J
hlamcrator AccuTnulator
Clear Switch
[>norriinaU>r RccuTmulotor
Clear Switch
O
UiQit Qnswer
OutpuT
O O
dxd Shif+Hauinuiator
o
5Uj
HEATERS
OFF O ^^
umz.mm KO^mm
B
a
O
umtum A((UHuigTqs
"'T^^^t
0 y—s-K O
OENOHjMmAaUHUlfiW
PLAces Q
9 '° '^.-^ ROlfllO
o
i?
WHtftAtOft VCVMULATO^
DBiOMlMTORMdWUWTO?! )ENC«1NI?M WUMUlIflBR
-6
D
PLACES O
0 ^ T RO HROJ
PLACeS
. |0 4
7
a
10
J8
o
O
N\)MERATffi ACCUHULftTOft
HOURS '
O , ^ O
DlVfOER
n AND o
SQUARE l?OOTER
O
O
O
o
5U^
O 5V o
^
o
HUHERATOP AC^UHUlM
cx
^ o
C«MWIHftT(iRA((yi1UUI]« DlhC-MlNAlCl Af(WytlP!)R
i?
a
:£)
PLACES P
10
PLACES O
10
R
.i,:^
WMtRATPI? AKimWiliX
XI)
Ptr^lNfeTCIl A((UI1l)lffi» D£NCM{JlftW^(UHliUITC8
a
\D
NUHtRATOB A(jCUM\iUT/*
Gt .„- — ^^ O"
D
)mm^m A((yMw.«r(»
PUCES Q
S
T
0
10
PLACES P
10
Dtl10rt{Ml*)PA((V«yiftlUF
mas Q
8 r^ 8^_
^^o.Q
X M
AfvSwe.k'
&fr
P
ANSWE'k^
■Q
? nr
ANn^I?
4-
■:» 4 ^p
•Q
r til
M>iSVfeP
o.fi»
0
t NT
AWSWEB
3 "^ OFF
Q
I NI
Al>l5WtC
^. . ., Q
1 NI
AN5WER
8
2
3 ^ o.r ^
t NI
/ANSWER
L
°®
'o ^-^o ^-'o ^-"^o
6L
°©:t5) °©:°(S) °©:°a ^®:©. i:°©„ i?© °@:a °©:°©
■ |M u m er ator h cc u. m a 1 at 0 r
Receive Switch
■De.norr.inator AccamuLiator
Receive Switch
■Divide - Square -Roc^t
and plares Switch
•Inter '.ocK Su 'tch
■finswcr Disposal Sv.y\tch
Tsir mmai s 11. c^ l^ . . .^ 8 1
Prog^aiTi input pals^ tcrmino-o for progravms 1- 8 respectively^.
Tcrnninais 1e^2o, ...^8©-
Progrcunn output pulse term im'S tcr prociraims 1 - 8 respc-'.rtive^.
Te.ryY^inal5l'seL,...,8L
mterlocK input pulse terwiha-'s ^r progrojnr^s 1- B respective! .|
DIVIDER 4/yO^9UA^fe50TfR
Feowr PANEL
PX-fO-30JR
VI - 1
VI. DIVIDER AND SQUARE ROOTER
*
The divider and square rooter is the unit which enables the ENIAC to
carry out the operations of division and square rooting. The time required to
complete these operations depends on the nuraber of places required in the answer
and the digits in each place of the answer. If it is assumed that the average
digit of the answer is 5 and if p designates the number of places in the answer,
approximately 13 p addition times are consumed in division or square rooting.
The first section of this chapter contains a general summary of the
divider and square rooter. Sections 6,1, 6.2, and 6,3 respectively cover the
program controls, common programming circuits, and numerical circuits of this
unit. Information pertinent to the interrelation of accumulators associated
with' the divider and square rooter appears in Section; 6,4, and 6.5 includes
an illustrative set-up for computations involving the divider and square rooter.
The following diagrams will be referred to in this chapter:
Front View of the Divider and Square Rooter PX-10-302
Divider and Square Rooter Front Panel PX-10-301
Divider and Square Rooter Block Diagrajn PX-10-30i4.
Interconnection of Divider and Square Rooter
with its Associated Accumulators PX-10-307
6.0. GEJIERAL SUlvMARY
The divider and square rooter carries out a division or square rooting
by operating as a central programming agent for a group of associated accumulators
(see Section 6,4). In division the associated accumulators are the numerator
(dividend) accumulator, the denominator (divisor) accumulator, shift accumulator.
-'v-In Section 6.2 a formula for calculating exactly the number of addition times
required for a given division or square root is given.
71-2
and quotient accumulatorj in square rooting the associated accumulators are the
numerator (radicand) accumulator, the shift accumulctor, and the denomin''-tcr
(twice the root) accumulator. The divider controls these accumulators in th''-'^
sense that at various periods of the operation cycle, it transmits to these acciomu*
Ip-tors prograii sigials ■ appropriate to the period of the computation and the
quantities involved in the computation and in the sense that it provides the
answer accumulator with the numerical data from which the answer is ultimately
formed.
The operation cycle, whether for division or square rooting, divides
itself rather clearly into 4 periods: period I in which the stage is set for
the following periods, period II during which the operation itself proceeds,
period III, the round off period, and period IV, the interlock and clear period.
When a divider and square rooter progr^'m control is stimulated, the events which
occur in the four periods mentioned above, depend, to some extent, on the way in
which the program control is set up. (cf, Sestion 6.1 and the illustrative
examples in Tables 6-2 and 6^3) »
In addition to a transceiver with program pulse input and output
terminals, each of the 8 program controls contains an interlock pulse input
terminal and 8 program switches (see PX- 10-301). The program switches provide
the operator with options as to:
1) reception of the arguments by the argument accumulators (numerator
and denominator accumulator receive switches)
2) clearing of one or both of the arguinent accumulators upon
completion of the progr:im (numerator and denominator accumulator
clear switches)
VI - 3
3) choice between the Operations of division and square rooting '
(divide-square root and places switch)
4) the number of places to be obtained in the ansv;er (divicle-^qu^re
root and places switch)
5) round -of f or no round- -off of the answer (round-off switch)
6) whether or not the transmission of a program output pulse is to
wait on the divider-square rooter' s reception of an interlock
input pulse (interlock switch)
7) transmission of the answer from the quotient or denominator
accumulator (answer disposal switch).
During period I of a division, the divider and square rooter emits
signo.ls which stimulate the argument accumulators to receive the arguments in
accordance with option 1 above and sets up certain of its common programming
circuits (see Section 6,2) in accordance with option 3.
Period II, for division, includes combinations of a basic division
sequence and a shift sequence. When the numerator f?n6 denominator have like
signs, the denomj-nator is subtracted from the numerator and the quotient is
increased by one unit in a particular decade place; when the signs of the
arguments are unlike, the denominator is added to the numerate^ and the quotient
is decreased by one unit in a pa.rticular decade place. VlHien the remainder from
the numerator after an addition or subtraction of the denominator shows an over-
draft (i.e. a change in sign fraa the one which the rcoiainder carried before the
addition or subtraction), the basic division sequence is interrupted. Then the
remainder is tra^nsmitted from the numerator accumulator to the shift accumulator
where it is received shifted over one place to the left. Next the numerator
VI - 4
accumulator again receives the numerator from the shift accumulator. The banic
division sequence is repeated with the quotient respectively increased cr de-
creased by one unit after every time a subtraction or addition ©f the denominator
takes place. After a shift sequence, however, the unit is added t^ or vsubtracted
frr>m a dec^^e ols-^e oi the quotient one further to the right than bef jre 'uhe
shift sequence .
Sauare roots in the ENIAC are obtained by a method which m.akes use
of the fact that /„. (21-1) = a and which is analofjous to a method often
used to find square- roots on electric or m.anual desk computing m'l^.chines.
Period I for Rquare-rooting not only covers the reception of the
numerator (or radicand) and the set-up of certain circuits in the divider and
square rooter, but also provides for the reception of one pulse m the 10
decade of the denominator (twice the root) accumulator.
In the basic snuare-*rooting sequence of period II, odd numbers suc-
cessively increasing (and accumulated in the denominator, accuraulator ) are sub-
tracted from the radicand until an overdraft occurs. Then odd numbers successive-
ly decree; sing are added to the radicand. The ENIAC finds by this procedure twice
the square root (formed in the denominator accumulator) since the answer is in-
creased or decreased by two units after each addition or subtraction takes place.
Period II, in square rooting as in division, includes 3 shift sequence which
t3,kes place whenever the remainder from the radicand indicates a change of sign.
The square root shift sequence provides for transmission of the radicand to the
shift accumulator to shift it one place to the left and the return of the shifted
radicand to the numerator or radicand accumulator. The shift sequence, further-
'^From the time that period II begins until iust after the first overdraft, one
unit is added to or subtracted from the 10^ decade of the Quotient in the basic
divi«iion sequence. After the first shift sequence, the 10' decade of the
quotient is worked on by the divider etc.
TABLE b~l
EXTRACTION OF SQUilHE HOOTS BY TJIE DIVIDEH AND SQUARE ROOr^ - Period II
PROBLEM: To find ' R viheve
Assume f! " . ' :j..^;" -■ ' 0
SO that* r-i "^ i 0 '' 0 : - ■)
Whan the square rooting coiamenceB, the numerator accumulator holds S,
0. - ..a, '.^
,11,0,^ 4- a
ii^ere the a^ are Integers between 0 and 9
OPEliATION PBRFORMiSD ON C0HTI2NTS OF NUMERATOR ACCUMULATOR
In basic square rooting s^ipenco before first overdraft,
SUBTRACT
0
• I
After first shift sequence, but before second overdraft
A D O
■1 r
lO [ '-'•'-'•o-'- ' ) ''^
— 'o'^'sa.^-
r< ■ G
., 'fe
HI3iAINDER IN NU}«KRATOR AGCUI.IULATOR AS A RESULT
OF OPEliATION HI COLDl.IN U
■o'.J i
^ i., \ X.
CONnSJTS OF CENCI.!INATOR (TWO-ROOT) AGCUl^IULATOR
AFTER OVERIHAFP OCCURS BUT HSFOlffi SHIFT SEQUENCE
AT mr> OF FIIiST ADDITION TIME OF SiTLFT SEQDElfCE
AT EHD OF SHIFT SEQUENCE
AFTER 0YE3^RAFT OCCURS BUT BEFCHE SHIFT SEQUENCE
;> '•■
-y I, \ -
AT END OF FIRST ADDITION TUm OF SHIFT SEQUENCE
Compare N with thecofeXumn showing the contents of the denr^inator accumulator and
AT END OF SHIFT SEQUENCE
note the displacement of the answer. fSee &ec, 6oH,3.)
;: ; i >;' ":'\
VI - 5
more, provides for the subtraction or addition respectively of one unit first in
the decade place in which twice the root was previously increased or decreased
by two units in the basic square root sequence and then in a decade place one
further to the right. After a shift sequence the basic square root sequence is
repeated until overdraft occurs. Table 6-1 shows the contents of the radicand
accumulator and of the twice the root accumulator at various times in period II
of square rooting.
Period II is terminated and period III initiated when an overdraft
occurs and when the divider and square rooter has found the number of places
(counting toward the right fi'om the PM decade) of the answer specified by the;
setting of the divider-square root, and places switch of the answer. In division,
period III includes the shifting of the numerator one place to the left as in the
shift sequence of period II. Then, if round-off is specified by the setting of
the program control, the denominator is subtracted from or added to the numerator
(if the numerator's remainder and the denominator have like or unlike signs re-
spectively) five times. If overdraft does not result from these subtractions or
additions, the quotient is respectively increased or decreased by one unit in
the last place from the left required by the setting of the places switch.
Period III of square rooting is similar to that for division except for two
details. In square rooting this period covers the shifting of the radicand' s
remainder and the addition or subtraction of one unit in the decade place of
twice the root which, in the previous basic square root sequence, was decreased
or increased by two units. Also, in square-rooting as in division, if round-off
is specified, the contents of the denominator accumulator are then subtracted
from or added to the contents of the numerator accumulator. If no overdraft
TABLS b-3
SQUARI2 ROOT - ILLUSTRATIVE PROBLEM
J»robloia: tfind^p 0 Ofil 3^0 ^l-OO . Honnd answer off to k placos. No interlock
Numerator (ixadicand) Accumulator
Period
Add.
Tine
Receives
p 0 0^1 360 ^0
atorea after receiving
p 0 0^1 360 4oo
II
shift
M 9 900 000 000
u 9 9iii 3bo Hoo
\A/V">/\/\^
9 ^13 6o4 000
0 190 000 000
ahij
P 0 036 040 000
M 9 ^19 000 000
14
III
M 9 ^13 6o4 000
p 0 003 6o4 000
P 0 036 0^ 000
M 9 ^55 O^K) 000
i 550 4oo 000 u ^ 550 ifoo 000
M ^ 732 400 000
M lil4. 4op 000
n 9 096 k)0 000
ly
21
22
It
2k
O lg2 000 000
0 1^2 000 000
0 1^2 000 000
0 1^ 000 000
0 1^2 000 000
>i ,- ■ •tfi'Jk^ f ■ 'ji^^iiiL^- ■
25
"2^
M 9 27^ 400 000
M 9 46o 4oo 000
Dononiaator (2 root) Accumulator
Receives
P 0 100 000 000
P 0 200 000 poo
H 9 900 000 000
H 9 990 000 000
M 9 9^0 000 000
P 0 010 000 000
P 0 001 000 000
P 0 002 000 000
M 9 999 000 000
ia 9 99^ 000 000
iitores after Baceiving
P 0 100 000 000
P 0 300 000 000
P 0 200 000 000
P 0 190 000 000
P 0 170 000 000
p 0 l£lO 000 000
p 0 JuSrooo 000
p 0 1^3 000 000
P 0 1^2 000 000
P 0 1^0 000 000
program output; J!}i^® **5^®"_^'?^£ dia£03al ai^nal is tranaiaittad.
Answer is transiTiitted from denominator accuiaulator.
Shift AcouEiulator
Receives
i^torea after roooiving
M 9 <^i3 60H 000
VVV W^/"
P 0 036 OUO 000
M ^ S50 ^0 000
M 9 ^13 j^k 000
P 0 036 0^ 000
M ^ 550 !$00 000
v^/vv^/^/'
(c^
§!
JO
TABLF. 6-2
DIVISION - UlUSTHi.TIVE PIIOBLKM
Problem: Divide P 0 2090070 000 by P 0 230 000 000. Round answer off to 4 places. No int«rlock,
Period
Add.
Time
Quotient Accumulator
Numerator Hccuxaulator
Donociinator
Accumulator
Shift ileoumulator
Roceives
Stores after
Receiving
Receives
Stores after
i<eceiving
Receives during
jjerlod 1 and 8tore«
thereafter.
Receives
iJtoros after
iieoeiving
I
1
f 0 209 070 000
P 0 209 070 000
P 0 230 000 000
3
, ■— "
U
shift
V
shif^
4
u 9 770 000 000
u 9 979 070 000
M 9 790 700 000
5
P 0 100 000 000
P 0 100 000 000
VN/XA/
wW
~ — — •• '■•■
M 9 790 700 000
6
7
a 9 790 700 000
M 9 790 700 000
t
P 0 090 000 000
p 0 230 000 000
P 0 OfcO 700 000
. .„ -.,._. ^ ....
1
9
M 9 990 000 000
i
10
11
~-
P 0 207 000 000
P 0 207 000 000
P 0 207 000 000
P 0 207 000 000
\/\/v
12
p 0 001 000 000
M 9 770 000 000
M 9 977 000 000
13
P 0 091 000 000
H 9 770 000 000 M 9 770 000 000
M 9 770 000 000
M 9 770 000 000
- - .. — -■
III
Ik
15
1
i
!
S-'WvW
i
16
1^
■
P 0 230 000 000
P 0 230 000 000
P 0 000 000 000
P 0 230 000 000
1
i
1
:
1
i
P 0 230 000 000 ' P 0 460 000 000
.
19
P 0 230 000 000
P 0 690 000 000
20
21
22
P 0 000 000 000
P 0 091 000 000
P 0 230 000 000
P 0 520 000 000
i
—■ -
. , — ..-«
.
IV
2^
program output pul£
1
gr-----rrr-?=::;.-.rr;-:.,>r=r,r.,.::-.' '*■■. -
21^
9 and answer disposal signal is trunsiiitted
25
Answer J
s tranamitted fron quotifent acoijo.ulator.
m
\P
VI - 6
results, twice the root is increased or decreased by two units.
Period IV is identical in both division and square rooting. In this
period, ring counters (see below and Section 6.2,) in the divider and square
rooter are cleared and certain flip-flops are reset so as to ready the divider
and square rooter for the next program, A program output pulse is transmitted
either to indicate the completion of the operation or the reception cof an inter-
lock input pulse as well at the completion of the operation. The divider- square
rooter signals for the disposal of the answer in accordance with the setting of
the answer disposal switch at the end of period IV and the numerator and denom-
inator accumulators clear or do not clear in accordance with the settings of the
numerator and denominator accumulator clecar switches.
The events described above are motivated by the divider and square
rooter's common programming circuits (see Section 6,2). The answer which is
accumulated in the quotient accumulator in division or in the denominator accu-
mulator in square rooting is supplied by the numerical circuits (see Section 6*3)
of the divider and square rooter.
The common programming circuits of the divider-square rooter v^hich are
operated by the program controls moy be divided roughly into 3 categories:
circuits which are concerned solely with programming within the divider-square
rooter (internal progrsmjning circuits); circuits which program the associated
accumulators as well as other circuits within the divider (internal - external
programming circuits); and circuits concerned solely with programming the accu-
mulators associated with the divider and square rooter (external programming
circuit s ) ♦
The internal programming circuits (see PX-10-304) include the progrJM
VI - 7
ring circuit, the overdraft circuit, the sign indication circuit, the divide
flip-flop, and the interlock and clear circuit.
The program ring circuit contains a flip-flop called the pulse
source flip-flop which controls the emission of certain specialized pulses (see
Section 6.2) used only in the divider and square rooter, yVhich pulses are emitted
depends on whether division or square rooting is the operction and also on the
period of the computation. The 9 stage program ring directs the progress of
the computation by providing gates for particular signals suitable to the phase
of the computotion at various times. The cycling of the program ring is con-
trolled by the program ring flip-flop a,nd by certain of the special pulses whose
emission in turn, is controlled by the pulse source flip-flop.
The overdraft circuit has for its purpose the sensing of overdrafts.
It consists of a binary ring counter (called the numerator ring) for registering
the sign of the nuraerator. This ring is cycled only during period I and just
after the numerator is shifted to the shift accumulator in periods II and III,
Jn acidition to the numerator ring, the overdraft circuit has four gates each of
which is connected to a stage of the numerator ring and statically to the FM
counter of the nuraorator accumulator. As long as the remainder from the numera-
tor remains the same as it was before an addition or subtraction of the denom-
inator, this circuit emits an NO (no overdraft) signal. Vi?hen the numerator's
remainder changes sign an 0 (overdraft) signal is emitted.
The sign indication circuit compares the signs of the numerator and
denominator emitting a like sign signal when numerator and denorrdnator have the
same sign and a.n unlike sign signal when the signs of the numerator and denom-
inator differ. The denominator flip-flop in this circuit is set only if the ■'■
VI - 8
denominator is negative. The denoLiinator flip-flop feeds to each of four gates
"which have for their second input static leads from the PM counter of the numera-
tor accuraulator ,
The divide flip-flop is used to ranenber whether the operation being
performed is division or square rooting. This flip-flop affects programming
only during the round' off period at which time its intervention results in the
emission of the instructions which distinguish period III for division from
period III for square rooting.
The interlock -md clear circuit which consists of the interlock flip-
flop, the interlock coincidence flip-flop, the clear flip-flop and the various
gates operated by these flip-flops, during period IV, emits signals which clear
the divider and square rooter's rings ;ind reset certain of its flip-flops.
The circuits which are both internal and external progran¥:iing circuits
are those containing the receivers which, when set, motivate the accumulators
associated with the divider and square rooter to perform certain suboperations
involved in division and square rooting and which also stimulcte other program-
ming circuits within the divider and square rooter to function (see Section 6.2),
The receivers included in this category are the N^, D^, Dg, Q, , D , D* , S^ and M^^q
and S,;n s^nd N' rccaiivers. Signals from these receivers are delivered to the
Au y
associated accumulators by means of special cables leading from the quotient
accuiTiulator and shift accumulator progr.-^-jri terminal, the denominator and square
root accum.ulator progr.^m- terminal, and the numerator accum.ulator interconnect or
terminal (see PX-10-301) to inter connect or terminals on accuiriulators correspond-
ing to the names of the terminals on the divider and square rooter.
VI - 9
The N, receiver stimulates the reception, via the numerator accumula-
tor' s y input channel, of the denominator or the complement of the denominator
when either of these quantities is transmitted from the denominator accumulator
as a result of the setting of the D^ or Dg receivers during the basic division
or square rooting sequence of period II or in round off during period III.
The Q receiver controls the reception, via the quotient accumulator' s
a channel, of the units which are used to form the quotient and which are trans-
mitted by the divider and square rooter whenever the basic division sequence of
period II takes place or at the end of period III in round off programs if no
overdraft results from the addition or subtraction of five times the denominator
from the numerator*
The Dy receiver controls the reception by the denominator accumulator
via its y channel of the +2 or ~2 units transmitted by the divider and square
rooter every time the basic square rooting sequence of period II occurs or in
period III if no overdraft occurs after the addition or subtraction of 5 times
twice the square root in period III of round off programs. Another receiver,
the D'y receiver also controls reception via the denoradnator accumulator's y
channel of numerical data which uXtimatoly forms twice the square root. This
receiver, however, is used to program the reception of the single unit (+ or -)
transmitted first in a given decade place and then in a decade place one further
to the right during the square rooting shift sequence of period II and to program
the reception of a single unit just once at the beginning of period III for*
square j^ooting*
The S^, N.p, S.p, and N' receivers control events which occur during
the shift sequence of period II and at the beginning of period III for either
VI - 10
division or square rooting. The first two receivers stimulate the transmission
(with clearing) of the contents of the numerator accumulator to the shift accumu-
lator which receives this data through its a channel, A shifter which shifts
numerical data one place to the left is placed at the a input terminal to accom-
plish the shifting of the numerator. The numerator is then cleared out of the
shift accumulator and returned to the numerator accumulator via the numerator
accumulator's y input channel as a result of the setting of the S and N'
Ao y
receivers.
The circuits which are used solely for external programming are the
numerator and denominator accumulator clear circuits and the N^^, N^, Dq_, Dj^,
receivers and answer disposal receivers 1, 2, 3, and k. Signals from the external
programming circuits are delivered to the associated accumulators in exactly the
same way as are the signals from the circuits which are both internal and exter-
nal prograiraning circuits.
The Nq, and Nj3 receivers correspond respectively to the points a and ^
on the numerator accumulator receive switches and are used to stimulate the re-
ception of the numerator (©r radicand) by the numerator accumulator at the begin-
ning of a program. The D and D receivers have a similar function. Whether
these receivers actually stimulate reception through the a or 3 input channels
or through some other channels depends, of course, on the manner in which the
inter connector plugs of the cables leading from the divider and square rooter to
the numerator and denominator accumulators are wired. The plugs, (see Section 6.4"
used at present, however, stimulate reception in accordance with the labelling
on the numerator accumulator and denominator acciomulator receive switches.
The instructions given to the quotient or denominator accumulator as
a result of the setting of one of the four answer disposal receivers depend en
VI -r 11
the wiring of the interconnector plugs used to deliver the divider and square
rooter's progr'anining instructions to the ans"iA/er accunulators (see Section 6.4),
The answer is built up in the quotient accumulator (in division) or
in the denominator accumulator (in square rooting) out of numerical data produced
by the numerical circuits of the divider and square rooter. These circuits,
which are discussed in greater detail in Section 6.3, include the +1, -1, +2, ~2
receivers, gatt;S controlled by the above mentioned receivers which pass the 1, 2,
2' , k, 9, or 1' pulses, the 10 stage place ring, and 10 pairs of digit output
gates with each pair controlled by a stage of the place ring.
The answer is formed one unit (in division) or two units (in square
rooting), at a time in a particular decade place from the digit pulses passed
through the 1, 2, 2' , U, 9, and 1' pulse gates and routed into appropriate
decade places by the 10 pairs of gates controlled by the places ring. Sign
indication M belonging to any component of the answer is derived from the 9P
delivered to the FM. lead of the answer output terminal on the divider and square
rooter front panel,
6.1. PROGRAS'I CONTROLS
The divider and square rooter has 8 program controls each consisting
of a transceiver with prograjn pulse input and output terminals on the divider
and square rooter front panel, an interlock pulse input terminal, a numerator
accumulator and a denominator accumulator receive switch, a numerator accumulator
and denominator accumulator clear switch, a divide-square root and places switch^
a round -off switch, an answer disposal switch, and an interlock switch.
VI - 1.2
6»1.1, The Numerator Accumulator and Denominator Accumulator Receive Switches,
The numerator accumulator and denominator accumulator receive switches
of the divider and square rooter have the same purpose as the multiplier accumu-
lator and multiplicand accumulator receive switches of the high-speed multiplier
(see Section 5.1.) • These two sets of switches on the divider-square rooter
enable the operator to control the stimulation of the reception of the arguments-
entering into a divider and square rooter program centrally at the divider and
square rooter instead of locally at the associated accumulators. The instructions
specified by the setting of the receive switches on the divider and square rooter,
however, are transmitted statically to the numerator and denominator accumulator
via cables leading from the denominator- square root accumulator program terminal
and the numerator accumulator inter connect or terminal on the divider and square
rooter's front panel to interconnectvor terminals respectively on the numerator
accumulator and denominator accumulator. It is to be noted that in the case of
the high-speed multiplier, the instructions set-up on the receive switches are
transmitted in pulse form from pulse output terminals on front panel 1 of the
high-speed multiplier to program pulse input terminals on the ier and icand
accumulators. In the case of the high-speed multiplier it is necessary to set-
up ier and icand accumulator program controls corresponding to the Ra — Re and
Da "- De terminals on the high-speed multiplier. In the case of the divider and
square rooter it is not necessary to set up program controls on the numerator
and denominator accumulators since the receive instructions are delivered directly
into the common programming circuits of these accumulators.
The numerator accumulator and denominator accumulator receive switches
differ also from the high-speed multiplier' s receive switches in that the former
VI - 13
offer the operator only two options as to the accumulator input cha-nnel tlarough
■which reception is to take place. The cables used to connect the numerator
accumulator inter connect or terminal and the denominator and square root accumu-
lator program terroinal to the numerator and denominator af^curiulator inter connect or
terminals have been so ^vired that if either or both of the nonex'ator or denomina-
tor accumulator receive switches be set to a or p, the corresponding accumulatoi-
receives its argument through the a or 3 input channel respectively (see Section
6.4.3.).
If it is not desired to stimulate the reception of an argument on any
given program or if it is desired to control the reception of either or both
arguments for a given program locally at the appropriate accumulator (by deliver-
ing a program input pulse to a suitably set- up program control on the accumulator
either before or simultaneously with the program input pulse that stimulates the
divider and square rooter program control), then one or both receive switches can
be set to 0 (off).
When the receive switch of a given program control is set to a setting
different from 0, the divider and square rooter emits the receive instructions
at the same time as the program control' s transceiver is set by the program in-
Iiut pulse so that the accumulator correlated with the receive switch receives
its argument during the 20 pulse times immediately following the reception of
a program input pulse by the divider and square rooter (see Section $.2),
6.1.2, The Numerator Accumulator and Denominator Accumulator Clear Switches.
The numerator accumulator and denominator accumulator clear switches
control the clearing of the numerator and denominator accumulators respectively.
These switches have two positions: C (clear) and 0 (off). If a clear switch is
set to C, the clear circuits (see Section 6.2.) in the divider and square rooter
VT - 14
emit a clear signal during the last :iddition timo of a program just before the
transnission of a progrrrii output pulse. This signal is delivered by means of
static leads from the divider and square rooter to the PM-eiear Unit of the
accumulator corresponding to the receive switch set at C in the addition tiiae
at the end of which the divider ajid square rooter emits a prograjii output pulse.
Since the denominator accumulator is used as the answer accumulator in
square rooting progrsm.s and since answer disposal tokes place in the addition
time following the transmission of a program output pulse (see Table 6-10), it
is obvious that the answer would be lost before it could be transmitted to another
unit if the denominator accumulator clear switch were set at C for squ^^re root-
ing prograias. The answer disposal switch together with a suitable adaptor (such
as the one shown on PX-4-114i^ or PX-4-U4C-see Section 6.4.2) plugged into the
denominator square root accumulator prr^gram terminal provide a correct method
for clearing the denoiainator accumulc:.t or without loss of the answer in square
rooting programs.
6.1.3, The Divide-Square Root and Places Switch^,
The divide-square root and places switch provides a means of choosing
which of the divider and square rooter's operations is to be performed on a
given program and of specifying the number of places in the answer (counting
from the BI count tx toward the right as seen from the front of the unit) to
be found. The five left hand positions of this switch specify division to 4,
7, 8, 9, or 10 places and the five right hand positions, square rooting to 4, 7,
8, 9, or 10 places (see Section 6.4.3.). The number of places chosen by the
operator for a given program will depend on the accuracy requirements of the
computation and on i^he alignment of the arguments in the argument accumulators.
VI - 15
See Section 6,4 for a discussion of the relatiofiship between the location of
the decimal point in the argument and' .answer ^cJcumulators/
The setting of the divide-square root and places switch like the
setting of the significant figures switch of the high-speed multiplier j, has no
effect on the putting in of the I'P pulse when the answer is disposed 6f sub-
tractively ftom the answer accumulator. 1,1/hich decade the VP is put into in
subtractive disposal depends on the setting of the significant figures switch
on the answer accumulator. If programs with different round off requirements
are performed, it may be necessary to supply the I'P at the accumulators which
receive complements from the ansv/er accumulator,
^.1.4. The Round Off Switch
the round off switch offers the operator a choice between obtaining
an answer rounded off (RO) or not rounded off (NRO) to the number of places
specified by the setting of the divide-square root and places switch. In general,
diviaion or square rooting programs in which 10 or fewer answer places are re-
quired will either be performed with round off or else round off will be taken
care of in an acci^mulator after the divider has found more answer places than
are required. To obtain answers with 11-19 places (see Sections 6.2 and 6.4),
two programs are necessary. The first one, in which the first 10 left hand
(H.gits are fouM, should be performed without round off. The result of the
second program should be rounded off whether aa part of the second divider pro-
gram or in an accumulator after the divider program.
It should be noted that under certain circumstances, twice the square
root obtained through a round off program may be in error by 2 units in the last
place found. For example, the divider and square rooter produces the answer
VI - 16
P0002 when 2^'0 is found to four places in a round off program. The reason for
this slight inaccuracy becomes apparent when it is remembered that round off of
squsj'e roots as carried out by the divider is only approximate. Let R represent
the remainder from the radicejid and let p + 2x be the number stored in the denom-
inator accumulator at the end of addition time III - 2 where 2x is the extreme
right hand digit of the answer found (so that, at this time p is the answer leae
2x) , Assume that k answer places have been found and, for simplicity, let us
say that the decimal point in the numerator end denominator accumulator occurs
k places from the left. If k is odd {so that R, the remainder from the radicand
before round off, is greater than or equal to zero) the decision to change or
not change the answer by 2 units in the last place depends on v^hether R-5p-10x
does not or does show an overdraft. If round off v/ere carried out exactly, the
quantity R-5p-10x-2.5 would be examined instead. Thus, the rounderi off answer
is inactjurat!? when R-5p-10x ^ 0 and when R-5p-10x-2.5 <0, It can easily be seen,
then, that the rounded off answer obtained in square rooting programs is correct
except when
0 4 (5p ^ lOx) - \R\ -^.2.5 for an even number of places
or 0 ^ !R( - (5p + lOx) 41 2.5 for an odd number of places
6.1,5 The Answer Disposal Switch.
The answer disposal switch on the divider and square rooter is
Comparable to the product disposal switch on the high-speed multiplier in that
the former enables the operator to provide for the stimulation of the disposal
of the answer from the answer accumulator without the necessity of delivering a
program input pulse to the answer accumulator specifically for this purpose. The
answer disposal switch on the divider and square rooter, however, offers the
VI - 17
operator only 4 optional methods of disposal in contrast with the 6 options of
the product disposal switch on the high-speed multiplier.
The answer disposal signals omitted by the divider and square rooter,
moreover, are static signals which are delivered to the quotient and/o*- denomina-
tor accumulator by moans of cables connecting the quotient accumulator and shift
accumulator program terminal and/or the denominator-square root program teminal
to inter connect or terminals on the quotient and/or denominator accumulator.
Points 1 and 2 of the answer disposal switch refer to the disposal of the
quotient and points 3 and U to the disposal of twice the root. The exact meaning
conveyed by their settings, however, depends on the wiring of the adaptors and
interconnector cables used to carry instructions from the program terminals on
the divider and square rooter to interconnector terminals on the associated
accumulators (see Section 6.4.2) since the instruction signals are brought
directly into the accumulators' common programming circuits. In the high-speed
multiplier, on the other hand, the instructions specified by the settings A, S,
AS, AC, SC or ASC of the product disposal switch, depend on the set-up of the
product accumulator program controls which receive product disposal pulses from
the A, S, AS, AC, SC, or ASC pulse output terminals on panel 3 ot the high-speed
multiplier .
6.1.6. The Interlock Svdtch.
The setting of the interlock switch determines the conditions for
the occurrence of the final addition time of a divider and square i^ooter program
(i.e^ the addition time when a program output pulse, answer disposal signal,
signal for clearing the argujnent accumulator's and signals for clearing certain
circuits within the divider and square rooter are emitted). If the interlock
VI - 18
switch is set at no interlock (Nl), the final addition time occurs during the
second addition time following the completion of the actual numerical operations
involved in a division of square rooting (i.e. during the second addition time
of period IV), If the interlock switch is set at I (interlock), not only must
period III be completed, but also the divider and square rooter must have re-
ceived an interlock input pulse before the divider and square rooter program
can be considered completed. In the interlock case, the fined addition time
takes place during the second addition time following whichever of the 2 events
hereinafter listed occurs later in the cycle of operations: l) completion of
period III; 2) the reception by the divider and square rooter of an interlock
input pulse (see Table 6-10),
The interlock feature of the divider and square rooter is desirable
when a division or square rooting prvOgrara occurs simultaneously with another
sequence of programs and is to be followed b,3'- a second sequence using either the
same units as are used by the sequence in parallel with the division or square
rooting or using results obtained from the parallel sequence and results of
the division and square rooting,. By using the final program output pulse of
the sequence in parallel with the division or square rooting as an interlock
input pulse and then using the divider and square rooter's program output pulse
as the initial progrctm input pulse for the sequence which is to follow the
division, the operator insures the completion of all of the programs of the
parallel sequence before the commencement of the second sequence.
Had the interlock feature been omitted from the design of the divider
and square rooter, the operator, under the sane circumstances as those described
in the previous par^'graph, would have faced two equally disagreeable alternatives:
VI - 19
1) never to schedule a parallel sequence lasting between the minimum
time to maximum time for completing a division or square rooting
2) to compute the maximum number of addition times required to complete
the division or square rooting progrwn and then to use the final
program output pulse of the sequence in parallel with the division
or square rooting to produce eventually (after a delay consistent
with the maximum division or square rooting time) an initial pro-
gram input pulse for the second sequence.
6.2. CaMON FROGRAmCING CIRCUITS
6,2.1. Status of the circuits before a transceiver is stimulated.
Before a program input pulse is received by a transceiver to stimulate
a given program control, but immediately after initial clearing or the completion
of a previous program, the status of certain important components of the divider
and square rooter's common prograjraning circuits may be summarized as follows:
In the program ring circuit, the pulse source flip-flop and the pro-
gram ring flip-flop are in the so called normal state. The program ring (whose
stages are designated by A, B, 1, 2, ..., 7) is in stage A. The observer view-
ing the divider and square rooter from the front (see PX-10-302) observes that
the pulse source and program ring flip-flop neons are lit as is program ring
neon A.
The numerator ring of the overdraft circuit is in stage P (the
corresponding neon is lit) and the denominator flip-flop of the sign indication
circuit is in the normal state (with the denominator flip-flop neon lit). If
the previously completed program was a square rooting progran^i, the divide flip-
VI - 20
flop is in the normal state and the divide flip-flop neon is off. Otherwise this
flip-flop is in the abnormal state and its corresponding neon is on. The inter-
lock, interlock coincidence, and clear flip-flops are in the normal state (and
their corresponding neons are off). The receivers of the internal and external-
internal programming circuits are all in the normal state and the neons correspond-
ing to them are off.
In the numerical circuits, the place ring is in stage 1 (and the
place ring neon numbered 9 on PX-lO-302 is on). The +2, -2, +1, and -1 receivers
are in the normal state (and their corresponding neons are off).
6.2.2. The Program Ring Circuit.
As soon as a prograjn control of the divider and square rooter is
stimulated, period I is initiated. The characteristics of period I as evidenced
in the divider and square rooter's progr.^m ring circuit are given in the follow-
ing paragraphs.
The pulse source flip-flop remains in the normal state so that a I'P
is gated through F6 to produce a I'P and a GPP is gated through F4 to produce
a CP pulse every addition time. If the program control's divide-square root
and places switch is set at a divide setting and the round-off switch at round-
off or no round- -off, then GP is gated through K6 or L6 respectively to produce
a divide pulse (DP); if the divide-square root and places switch is set at a
square root setting and the round off switch at RO or NRO, GP is gated through
K3 or L3 respectively to produce a square root pulse (SRP),
During period I, also, the program ring flip-flop remains in the
normal state so that DP or SRP is gated through AlO or All respectively to cycle
the program ring 1 stage per addition time.
VI - 21
In the third addition tiiae of period I, the prograra ring is in stage 1.
A signal from this stage gates a CF through gates A7 and through B7 clearing the
progrsjn ring back to stage A and flipping the progrraii ring into the abnormal
state at the end of addition tirae 3, This marks the termination of period I
for division; period I for square rooting lasts one addition time longer. (See
Table 6-4 and Table 6-7).
During period II the pulse tource flip-flop remains in the normal
state so that GP, I'P^ and either DP or SRP continue to be emitted at the end
of every addition time. Since the program ring flip-flop is in the abnormal
state (and gates AlO and All are closed) neither DP nor SRP can cycle the prograi?.
ring. The program ring, therefore, continues to register stage A throughout
this period.
Period II is terminated and period III initiated when an S pulse
(this is a pulse produced by the divider and square rooter when a shift sequence
is about to begin - see below) is gated through E6 as a result of the coincidence
of a signal from the stage of the place ring corresponding to the places setting
of the divide-square root and places switch and a signal from this same switch.
The pulse produced in this way is designated on PX-10-304 by the symbol SS,
The SS pulse flips the pulse source flip-flop into the abnormal state.
During period III, then, 1' P-j_ and GP (?nd therefore either DP or SRP)
cease to be emitted. Instead, a GPP is gated through F5 at the end of every
addition time to produce a pulse designated by III P, III P cycles the program
ring 1 stage per addition time during period III. Also, if the round-off switch
has been set at RO, III P is gated thrr^ugh K4 or K5 (v)hen the divider- square
root and places switch is set respectively at a square-rooting or division point)
VI -22
to produce a round off pulse (ROP) at the end ")f every addition tine in period JIT
Notice that ROP is emitted only if round off is to take place ^
Period III is tominated when the progrcirn ring has been cycled through
its 9 stages. Peri.'d IV is initiated i/vhen a CPP is gated through L50 to produce
an F pulse and through E3 to produce an F* pulse. The F' pulse resets the pulso
source flip-flop into the normal state so that in period IV (cs in periods I anc
II) I'P^, GP and SRP or DP are emitted,
6.2,3. The Interlock and Clear Circuity
The F pulse sets the interlock coincidence flip-flop. Then the next
CPP gated through J49 if the interlock si-vitch is set at I and the interlock f lip ■
flop' has been set as a result ;;f the reception .f an interlock input pulse is
gated through H50 (controlled by the interlock coincidence flip-flop). The
signal gated through H50 resets the interlock coincidence flip-flop and sets the
clear flip-flop. The setting of the clear flip-flop results in the emission of
a reset signal for the transceiver and the einission of the CL and CL' pulses.
The CL and CL' pulses are responsible f .r the condition of the progran ring
circuit, the place ring, the n-umerator ring, and the denoniinat')r flip-flop prior
to the comracncenent of a divider and square rooter progran (see Section 6.2,1).
->> It is to be noted that the interlock flip-flop is insensitive to ¥jhich of t he
8 interlock input terminals has been pulsed. An interlock input pulse received
at any of the interlock input terminals sets this flip-flop regardless of ^ which
program control on the divider and square rooter has been stinuloted, ^This
flip-flop is also insensitive, in some respects, to the time of reception of
the interlock input pulse. An interlock input pulse received any time after
this completion of one divider and square rooter progran (and this nay even be
before the stimulation of the next divider and square rooter program) serves
to flip the interl:.)ck flip-flop for the "next divider ond square rooter prograxa,
-X-;;- The only distinction between CL and CL' is that CL' is taken off before buffer
E48 and CL after the buffer.
VI - 23
■6.2,4. The Overdraft and Si^n Indication Circuits.
The overdraft and sign indication circuits receive the information
upon vvhich they operate (in the case of the overdraft circuit, the sign of the
contents of the numerator accumulator and in the case of the sign indication
circuit, the sign of the denominator) by means jf static leads from the numera-
t.^r and denominator accumulators* M counters. The N" and N"^ lines carry sign
signals if the contents of the nuraerator accumulator are respectively negative
or positive. The D" line delivers a signal to gate Bl of the sign indication
circuits only if the denominator is negative.
The overdraft circuit consists of a numerator (binary) ring whose
stages represent sign P and sign M and 4 gates (Fl, F2, Gl, G2) . Each of the
4 gates receives one input from the numerator ring and the other from either
the n" op N" line. The gates Fl, F2, Gl, G2 may be thought of as (M, N"),
(M, n""), (P, N"), and (P, N"" ) gates where the first symbol in a parenthesis
designates the stage of the numerator ring and the second the numerator sign
line to "which the gate is connected.
The numerator ring clears to stage P at the end of a program and, in
the midst of a program, can be cycled only during period I or at specific times
in periods II and III. In period I, when the program ring is in stage B, a GP
is gated through D6, the resulting signal is gated through Kl to cycle the
numerator ring from stage P to M only if the numerctor is negative. During
period II and III, the numerator ring can be cycled only when LI opens to pass
a CPP. Gate LI, however, is open only when the Sa receiver is set and this
receiver is set only after an overdraft has occured.
Thus, the 4 gates receive information about the current sign indica-
VI - 24
tion of the contents of the numerator accumulator over the static leads from
the numerator accumulator's Ri/I circuit. The numerator ring, on the other hand,
registers the sign of the contents of the numerator accumulator before the
denominator is either subtracted from or added to the contents of the numerator
accum.ulator. The 4 gates in the overdraft circuit compare the current with the
past sign of the contents of the numerator accumulator. The coincidence of
signals to gate Fl (M, N"*) or G2 (P, N"*") leads to the emission of an NO signal.
Similarly gate F2 or Gl emits an 0 signal upon the coincidence of signals on
both inputs.
As long as an NO signal is emitted the basic operation sequence of
period II is performed, 1/Vhen an 0 signal is emitted, the basic operation
sequence is interrupted either by a shift sequence or by the initiation of
period III, The 0 and NO signals produce these results by inhibitory actions
since no inverters intervene between the gates of the overdraft circuit and the
gates to which 0 and NO are delivered. ViJhen NO is emitted, gate D12 is closed
and gate Dll passes a signal which gates a GP through D9. The resulting pulse
is designated by P. ' The P pulse, in period II, initiates the basic operation
sequence; and in period III, initiates the 5 subtractions or additions of the
denominator to the contents of the numerator accumulator by setting the Ny re-
ceiver and either the D ;;r D, receiver. In period III, moreover, when NO is
■?(-The P pulse is produced in other ways when the sensing of overdraft is ir-
relevant or unnecessary. At the end of period I in division, a signal from
stage 1 of the program ring gates DP through B8 to produce a P pulse. Also,
after shifting of the numerator accumulator's contents in period II, a signal
from the N^y receiver gates a GP through C9 to produce a P pulse. In period III,
the P pulse is produced when a signal from stage B of the program ring gates an
ROP $.hrough C8.
VI - 25
emitted, gate K12 passes a signal (emitted when a signal from stage 6 of th^
program ring open* gate J13 so that an ROP can pass) which activates the cor-
recticpn of the answer in accordance with the state of the divide flip-flop
(see Section 6,2.4). When the 0 signal is emitted, gates Ml and K12 are closed
and gate D12 passes a signal from the D or Q^ receiver which, in turn, gates
a CP through E9 to produce an S pulse. The S pulse motivates the shift sequence
of period II or, when gated through E^ to produce an SS pulse (see Section 6.2.2)
initiated period III.
The sign indication circuit is quite similar to the overdraft circuit
in its components and functioning. This circuit consists of U gates (Dl, D2,
El, E2) aitd a flip-flop, the denominator flip-flop. Each gate is connected to
one of the 2 output leads from the denominator flip-flop and to either the P or
M stage of the numerator ring. The denominator flip-flop is in the normal state
when a program commences and can be flipped into the abnormal state to remember
the fact that the denominator is negative at only one specific time'^ in the
course of a divider and square rooter program. This one specific time is
addition time 2 of period I when gate D6, held open by a signal from stage B
of the program ring, passes a GP which can then pass through gate Bl to flip
the denominator flip-flop if the contents of the denominator accumulator are
negative. Once flipped, the denominator flip-flop remains in the abnormal state
until reset by CL in period IV •
If the denominator is positive (and therefore the denominator flip-
flop is in the normal state) and the contents of the numerator accumulator
^^It is for this reason that the divider and square rooter is unable to find
the real coefficient of i when the radicand is negative.
VI - 26
before a subtraction or addition of the denominator are positive or negative*
(so that the numerator ring registers P or M respectively), then gates El or
E2 respectively emits a like sign or unlike signal. Similarly, gates D2 and
Dl emit a like or unlike sign signal respectively.
The like and unlike sign signals are also delivered to gates without
the intervention of inverters so that these signals, like the 0 and NO signals,
produce their effects by an inhibitory actiqffi*
The like sign signal closes gate Bll so that gate BIO passes a P
pulse (see Section 6.2,4) which sets the Do receiver. The unlike sign signal
closes gate BIO so that gate Bll passes a P pulse which sets the D^^ receiver.
The coincidence of like or unlike sign signal and a signal from the round of f
flip-flop also determines which receivers of the internal - external programming
circuits and of the numerical circuits are set in period III (see Section 6,2.7),
6.2.5. The External - Internal Programming Circuits,
A program input pulse delivered to a program pulse input terminal of
the divider and square rooter immediately passes through the numerator and de-
nominator accumulator switches whence it sets the N^^ or Ng and Dq^ or Do
receivers. Thus, during addition time 1 of period I, the numerator and denom-
inator accumulators receive their arguments if this reception is controlled by
-li-
the divider and square rooter. At the end of addition time 1, a CPP resets
these receivers and they do not function again in any subsequent period of the
program.
The Ny and Dj^ or Do receivers function during period II and, if round
off is specified, during period III, The P pulse (see Section 6.2.4) sets the
N receiver at the same time that it sets the D^ or Dg receiver (depending on
* The arguments may of course, be received prior to this if their reception is
controlled locally at the accumulators.
VI - 27
whether the unlike or like sign signal is being emitted. During period II,
GP resets these receivers one addition time after they have been set» In
period III of round- off programs, the N and D or D receivers remain set
y A S
throughout addition tiraes 3, 4, 5t 6, and ?• At the end of addition time 7
an ROP ga-Ged through D4 by a signal from stage 5 of the program ring resets these
receivers. Thus, the denominator is subtracted frcm or added to the contents
of the numerator accumulator 5 times in round off programs .
During period II, when DP or SRP is being emitted, the setting of the
N receiver leads, one addition tine later, to the setting of the Q (if DP)
y O,
receiver or the D (if SRP) receiver. Simultaneous with the setting of the 0^
receiver, DP sets the •♦•1 receiver if the Dg receiver was previously set or the
-1 receiver if the D^ receiver was previously set. Similarly, in square rooting
programs, the -♦•2, or -2 receiver is set at the same time as the D receiver is.
During period III of round off programs, the setting of the D or Q^^
receiver does not result from the setting of the N receiver, but, instead,
y
takes place if a ROP is gated through K12 because NO is emitted. The ROP is
then routed to set either the D^ or 0 receiver by means of gates controlled
by the round off flip-flop. This satae ROP and other gates controlled by the
round off flip-flop effects the setting of the +2 or -1 receiver (if the D
receiver was set during addition times 3-7) or the -2 or -1 receiver (if the
D receiver was previously set).
During period II, the emission of an 0 signal leads to the emission
of an S pulse (see Section 6.2,4). The S pulse sets the S^ and N.p receivers,
A GPP gated through K7 as a result of the setting of the S receiver causes the
setting of the S^^^ and N* receivers. Thus, in either division or square rooting,
VI - 28
the shifting of the contents of the numerator accumulator one place to the
left is provided for.
The S pulse also sets the D» receiver and, gated through G9 or H9
by a signal from the +2 or -2 receiver respectively, sets the -1 or +1 receiver.
The D( receiver and the +1 or -1 receiver remain set for 2 addition times in
period II for square rooting. They are reset when a GPP is gated through C13
after the NO state of affairs is restored in the overdraft circuit . Since the
D' and +1 or -1 receivers remain set for 2 addition times and, since the plaee
y
ring is not cycled until the second addition tL-ne (see Section 6.3)»»t.he cor-
rection of twice the root as described in Section 6.0 (a change of one unit
first in one decade place and then in a decade place one further to the right)
takes place. It is to be noted that in period II for division, the D\^ receiver
is set but that there is nothing for the denominator accumulator to receive at
the time since neither the +1 nor tie -1 receiver is set in division. DP resets
the D» receiver in the division case one add. time after its setting.
y
At the beginning of period III, also, the S pulse sets the S^ and N^^
receivers and one addition time later the S^^ and N'^ receivers are set. In
period III, the D' receiver is set and either the +1 or the -1 receiver is also
set in the case of a square rooting program. It is to be noted, however, that
III P resets the D' receiver and the +1 or -1 receiver one addition time after
y
their setting in period III so that twice the square root is corrected by only
one unit in the last answer place.
When the clear flip-flop is set (see Section 6.2.3), Gate 62 in the
transceiver emits a signal which has 3 effects: 1) passing thlfough the answer
disposal switch, it sets the answer disposal receiver (l, 2, 3, 4) specified
VI - 29
by the setting of this switch; 2) passing through the numerator and denominator
accumulator clear switches, it allows the carry clear gate to pass through gate A
A49 (if only the denominator accumulator is to be cleared), through gates A48
and B49 (if both the numerator and denominator accumulators are to be cleared),
or through gate B48 (if only the numerator accumulator is to be cleared) j 3) it
gates a CPP through 68 to provide the transceiver's reset signal and a program
output pulse.
Thus clearing of the numerator and/or denominator accumulators takes
place a little prior to the emission of a program output pulse and answer dis-
posal signal,
6,2.6, The Divide Flip-Flop.
The divide flip-flop is set or reset during period I of divider and
square rooter programs. In division programs DP flips this flip-flop into the
abnormal state (and turns on the corresponding neon); in square rooting programs,
SRP resets this flip-flop if it was previously flipped into the abnormal state
in a division program.
The effects of this flip-flop on the divider and square rooter's
common programming circuits become apparent in addition time 8 of period III
for round off programs when an ROP is gated through J13 by a signal from stage
6 of the program ring. If the signal from gate J13 is gated through K12 as a
result of the emission of the NO signal, then, in the division case, this signal
is gated through JIO to set the Q^^ receiver and through gate J8. The signal
from gate J8 is gated through G8 to set the +1 receiver or through gate H8 to
set the -1 receiver when the like or unUke sign signal respectively is emitted.
Similarly, in the square rooting case, the D receiver is set by a signal gated
rx- /9- 40S
Add. j
Time I
(and I
Prog. I
Ring
stage)
TAB1£ 6-4
DIVISION - INITIAL SEQUENCE - PERIOD I
Requires tWIee addition times: 1-3
"T
Signal
Effect
Gouinent
0 1)
(A)
Program input pulse
1)
a) Sets transceiver in the divider
b) Sets Hct or U, and/ or D^ or U^ receivers
1 1)
(A)
GPP
1) Gated through [^ by a signal frosn the
pulse source flip-flop (in the nornial
state) produces a GP pulse.
2) GP
!3) DP
2) Gated through
pulse.
3)
or [K] produces a DP
a) Gated through JAlol by a signal fran the
program ring flip-flop, cycles the
program ring to stage B,
b) Sets the divide flip-flop if this flip-
flop is in the normal state.
1)
a)
b) The numerator and/ or denominator are then
received by the numerator and/ or denomina-
tor acciunul at or respectively in add.tlsae 1.
1) This effect occurs in every subsequent
add, time of a division program except
during period III.
i ^
tS) This effect occurs in every subsequent
, add. time of a division program except
I during period III.
a)
b) This turns on the divide flip-flop neon.
2 1)
(B)
GP gated through JDel by 1) Is then gated through gate [Sll by the IF
a signal frcan stage 3 signal so that the numerator binary ring .
of the prograjTi ring. is cycled to stage U in the event that *
the numerator is negative.
0 D" signal
3) DP
3
(1)
1) DP
2) Is gated tlurough {Bj by the output of gate 2) This turns off the dencsn inator flip-flop
6. Output of ^ate llil sets the denc»ainator neon.
flip-flop in the event tnat the denomi-
, nator is negative
=3) Cycles the program ring to stcge 1
II)
a) Gated througli H ^y ^ signal from stage
1 of tlie program ring produces a P
■pulse
2) P
2)
. a) Sets the Ny receiver
i
b) Gated through BIO when the like sign
signal closes Bll sets the D3 receiver
or gated thrcnigh Bll when the unlike
sign closes BIG sets the D^^ receiver.
2»
a and b) Then during add, time 4. the numera-
tor accumulator receives either the ccmple-
nent of the denominator or the denominator.
At the end of add, time 4. GP resets these
receivers.
The setting of these receivers is the
event described (in the table for period 11)^
as occurring in add. time d=3+2n for n=o.
3) 3)
a) Gated through ED ^y ^ signal from stage a)
1, clears the program ring to stage A.
b) Gated through IWf] flips the program ring b) I'he program ring flip-flop neon is tucn^d
flip-flop. off at this time.
--J.
refers to "^te".
*
/^-'A-ZcS^Oc,
Signal
TABLE 6-5
Division PERIOD II - 3/u^IC DIVI3I0iJ SE-I^UEIICE
Requires two add, times: d+1 and d+2
Effect
Comment
1(A)
For
For n>o.
1) P pulse derived froii
CrP gated tlirough \d9\
as a result of the co-
incidence of the liO
signal and a signal
from the 0„^ receiver,
or 3P gated tlirougli ^
by a sigiml fron the
IT*y receiver,
or (see period l) Dp
gated tlirougii ;B3i by a
signal from stage 1
of the pro|^an ring.
n=o, this add. tine is counted as
this aid, time coincides with add.
or add, tine d-s-g of period
part of period I
tine s+2 of period il
I
d+1
(A)
1) DP
1)
a)
b)
Sets the IIy receiver.
Gated through 3101 V7hen the lii:
signal closes iBll. P sets tlie
receiver or gated througli HI
unlike sign signal closes iDlb.,
the D^ receiver.
e sign
i^ien the
P sets
1) During add^ time d+1. then, the numerator
accumulator receives either the completnent
of the denominator (wlien the numerator and
denominator have the same signs) or tlxe
denominator (when the numerator and deno-
minator iiave unlike signs), Tn ile these
receivers are set, the corresponding neons
are on. At the end of gdd^ time d+l. these
receivers are reset by a GP.
1) ^
a) Gated througli ;L10i by a signal fra.i the
Ijy receiver, sets the Q^ receiver.
b) Gated through JGlT by a signal fror;. the
Dg receiver, sets the +1 receiver or,
gated tlirougli iiil'li by a signal from the
D_^ receiver, sets the -1 receiver.
U) Purine add, time d+3. then, the quotient
I accumulator receives 1 in a given decade
; place 4f the denominator was subtracted
j Trcxu the numerator or receives the comple-
! ment of 1 if the denominator was previously
added to the numerator. 7he neons corres-
i ponding to these receivers are on as long
i as the receivers are set. The i^ receiver
I is reset oy a CFF and the +1 or -1 receiver
I is re^et by a DF at the end of aid. tii.;e
i d+2.
iidxT,
Time
SHIFT oi::iUEIlGE
Requires two add, times: s+1, s+2
,1 L'c.:t
This add, time coincides with add. tirae d+J? above
1)
B+1
(A)
S puis® produced v;hen
a Q^ is gated through
E9j as a result of the
coincidence of an 0
sig^ial and a signal
from the "-i ~ receiver.
1)
Signal iVoii the S^^
receiver.
a) Sets the Sa and NaC recelverc.
b) Sets tlie D*Y receiver.
0)
1)
a)
b)
:c)
If gated through [Eg: as a result of the
coincidence of signals from the places
s\7itch and place ring, produces an S3
pulse (see Table 6-6) ,
Gates I'P. through |L45| to produce I'Pg
v/hich cycles the place ring 1 stage.
Gates a CPP tiirough jLl| so that the
numerator binary ring is cycled 1 stage,
Gates a CPP tixrougl. |o;! so tiu-t the li'y
and S^^Q receivers are sot.
hy
,)
b)
During add, time s+1. the nunierator is
transmitted (with clearing) from the
numerator accumulator and received in the
shift accumulator. At the end of add^
tl:ne s-fl. a GFP resets the S^ receiver
and UjiQ receiver.
There is no numerical effect on the divi-
sion fraa the setting of the D* receiver
since there is no data for the denominator
accumulator to rece ive durinx: adl> time
s_fl* This receiver is reset at the end of
nM^ time 8+1 by a DP,
S*3 pulse terminates juried II and
initiates period III.
c)
1)
a)
b) Sji a result 0 ceases to be emitted and AC
is emitted instead,
: c) Then the shift accuraulutor transmits (and
clears) its contents to the numerator
accumulator durin:: add, time s-»2. At the
end of add, tinie 3+2 ^ a Cl'r resets the
I R*Y ^^^ 2>i3 receivers.
f
PX-/0^^07
TABLE 6.6
DIVISION PERIOD III - ROUND GPP OR WO aoUIJD OPP
Items relevant only to the round-off case are circled
Requires 9 add* times i 1-9
(A)
Signal
Effect
uL.aji'jflMe
Cononent
•'■'".■i^'",'^- 'I'yi .■yumi-iint^^.M jii,»iijiiiiw«»n»t*ir.rwyg
This add. time coincides with add. tinie d+2 of period II
1) S pulse produced vrh«i
a OP is gated through
f^ as a result of the
coincidence of an 0
signal and a signal
from the Q receiver.
40 SS pulse
1) GPP
(A)
^^ III P
-1
(B)
i) III P
2) ROF
3) P
3
'1)
fl) III P
4
5
(3)
1) III P
1) III I
6
1) III p
7
11^
O ' T T T T;
\
) ROP
J2) III P
1)
a) Sets the Sa and Nj^ receivers,
b) Sets the D'y receiver.
c) Gated through [^ as a result of the
ooittoidenee of si^mls from the places
switch and place ring, produces an SS
Pfiise.
2) Sets the pulse source flip-flop.
1)
a) Oated through H] by a signal from the
Sjj receiver, cycles the numerator
binary ring.
b) Gated tlirough Ej by a signal from the
S^ receiver, sets the SaC and Ii*Y
receivers.
c) Gated by ^ produces a III P pulse.
la)
I a) (Gated by E produces ROP^
j b) Cycles the program ring to stage B
g) Resets the D'y receiver.
1)
a) During add, time 1. then, the ntanerator
accumulator transmits (and clears) its
contents to the shift accumulutor. A GPP
resets these receivers in add, time 1^
b) Since during add, time 1, there is no
numerical data on the tray from uriiich the
Dy chnHxiel receives, there is no numerical
result from lb).
0 At this time, the pulse source flip-flop
neon is turned off.
1)
a)
b)
o)
a)
So that NO ceases to be emitted and 0 is j
emitted Ijy the sign indicating circuit. \
So that , during add, tiiire g^ the numerator |
accumulator receives the number transiLitted \
(with clearing) from the shift accumulator. |
■^■fc tiie end of add, time 2. these receivers j
are reset by a CPP. j
This pulse is produced in every subsequent !
add. time of period III. j
ROP is produced in every subsequent add. !
tL-ae of period III if round off is |
specified.
»•> '• n
ycles prc£;ram ring to sta^e i
t:
i;
?t) jGated through H^^y a si^rnal from u;ta^3 | 2)
of the prcgrtjn. produces a P pulse.
■x^
Sets Hy and D^ or D^ receiver depending
on -/vhether unlii-:e sign or like si^A
si^^nal is eciittei.
j3) rheEe receivers re;:iain set during add, tin.e;
' 3,4,5,6, axid 7. (see belovr) They are reset
at the end of add, time 7. Tnerefore, the
numerator accu^iulator receives either the
:enorai:i-tor or its coL.plement five tijiies.
31) Cycles progrejii ru
if., \> ^- o uc. c c
1) Cycles pro^^ran riixg to statue 3
1; cycles pro^ruun ring to a-ta^^e 4
1) Cycles prograjR ring to stags 5
1^
aated tlirou^f^hl^ by a signal frora stage
5 of the progroir. ring, resets the ily
and Di or Dg receiver&. /
jL' ** I ■ ful nil , ^ , I Ml - I , 1 "^
p) Cycles tho prograir^ ring to stage 6.
Oated tiiTougii gl| by a signal fron; stage
6 of the prograja ring produces a signal
which, If^ated through (|l2j by KG, passes
through IJlOj to set the Q receiver and
thj-ough m^ The signal fro!?. [jBJ passes
tlirou gh ^ when the like e i^i signal is
emitted iuid seti: the, -(-l receiver or
passes through]^ to set the -1 receiver
when the unlike siffl signal is errdtted.
.) 'J
^yclc
-ro-rarn ring tc stage 7.
1) Thus, if the isubtraction ^v utiuxuxca or 5
I tiHies the dencmina^or which takes place
j duririg add. times 3 tiirough t does not
produce an overdraft, during add, time 9
the q^uotient is increaiied (v. hen niunerator
and denonxnator have like signs) or de-
creased (when numerator and denominatcr haire
unlike signs) by 1 unit in the lust place
at the right as specified by the setting
of the places B7/itch, At tlie end of add.
time 9. Ill P rei;ets and the +1 or -1 re-
ceiver and a CPP resets the ^ receiver.
1 yi
PX- 10^06
1 Time'
(and
;Prog. -
iRing
I Stage)
Signal
0 1) Program input pulse
(
1 1) CPP
(B)
2) GP
3) SRP
TABLE 6-7
SqXJPHE ROOT PERIOD I
Requires four add, tiniest L-4
Effeirb
1)
a) Sets transceiver in the divider and
square rooter.
b) Sets I J (J or Up receiver
1) Gated through iE4] by a si^al froBi the
pulse source flip-flop, produces a GP
pulse,
2) Gated tlirough[L3| or [o] produces a SRP
3)
a) Gated through |AIl| by a signal from the
I>ro-rtuii ring flip-flop, cycles the
pro^p'am ring to stage B.
b) Resets the divide flip-flop if this
flip-flop is in the abnormal *tate.
Comment
1)
j b) The numerator is then received by the
j numerator accumulator during add, time 1.
j '^ ■- ■ ,
•1) This effect occurs in every subsequent
add. time of a square root program except
during period III.
2) This effect occurs in every subsequent
add. time of a square root prograru except
during period III,
3)
b) ^his turns off the divide flip-flop neon.
2 1) QT gated through |^ by
a signal from stage B
( 1) of the program ring.
2) SRP
1) Gated through [K^ by the W signal cycles 1) The divider aixd square rooter, however,
the numerator ring to stage II if the does not find the real coefficient of i
rddicand is negative. correctly if the radicond is negative.
3 1) SRP
(A)
2) Cycles the program ring to stage 1.
1) • _
a) Gated through |K8] by a signal from stage
1 of the program ring, sets the Dy
receiver,
b) Gated tlirough| "OTJ by a signal from stage
1 of the program ring, sets the +1
receiver.
1)
a and b) T^us, during add, time 4, the
denominator (twice the root) accumulator
receives 1 pulse in the 10® decade.
At the end of add, time 4, a CPP resets
the Qy receiver and a OFF gated through
as a result of the coincidence of the 110
signal and a signal fr<Mn the Dy receiver,
resets the +1 receiver.
*2) GP
/^) -^ 2)
a) Gated through Sll by a signal ft*om stage ;
1, clears the program sing to stage A, |
b) Gated through £? by a signal from stage ' b) The program ring flip-flop neon is turned
1 flips the program ring flip-flop. off at this time.
PX-
0
TABLE 6-8
s:iu;jis ROOT period ii - basic square hoot sequence
Requires tv/o add, times; r+1, r+2
Add.
Time
Signal
Effect
Cominent
For n=o, this add. time coincides with add. time 4 of period I.
For n>o, this add, tirr^ coincides with add. tiiae s+2 or r-fS of period II,
r i 1) P pulse derived from
^+2n i GP gated through [Wi
for as the result of the
n>^0) coincidence of a sig-
nal from the Dy
(a) receiver and an WO
s ignal
or GP gated through jS^
by a signa-1 frcaa the
n*Y receiver (after a
shift sequence).
1)
a) Sets the lly receiver,
b) Gated through I BIOJ v?hen the like sign
1)
signal is emitted, sets the Dg receiver
or gated throug^i [Bl| vrhen the unlike
sign signal is emitted, sets the Dj^
receiver.
a and b) Thus, during add, time r+1, the
numerator accumulator receives the comple-
ment of the denominator (v/hen IJ and D
have like signs) or receives the denomi-
nator iifldmn W and D have unlii:e signs).
These receivers are reset by GP at
the end of add, time r-t-1.
r+1 1) SRP
(A)
1)
a) Gated through[L9jby a signal frcxii the
Ny receiver sets the Dy receiver.
j-idu.
Time
Si^al
s x) Z pulse produced v/i^en
(=4 + fii
for
a GP is gated througii
]■::&( as a result ox tiie
n ^ I
ooinOidence oH 'ai 0
(A)
signal anl a cirnal
froiu the Dy receiver.
b) Gated through |GT2] or |H12| respectively
by a signal fronv the D^ or D^ receiver
sets the +2 or -2 receiver.
SQUARE ROOT - SHIFT SEQUENCS
Requires two addition times j s+1 , s+2
I
I
I Effect
i _£r-\?_^'-^»^ tii^e coincides _v:ith ao.^-. ti.-e r-t
a) Sets tlie S^ and 11 q receivers.
b; Getc the D'y receiver.
c) Gated through 5^ by a signal from the
+2 receiver, sets the -1 receiver or
gated through ^ by a signal from the
-2 receiver, sets the +1 receiver.
d) If gated thxroug^h [F^ejas a result of the
coincidence of signals from the places
sr.'itch and places ring producei; an SS
pulse (see Table 6-9),
1)
a and b) Thus, in add. time r+2, the ienorr.i-
nator acca'riulator receives two in a j^iven
deca.de place of the coi-jpieruent of 2 if the
denor.iinator was previously subtracted or
added respectively.
The D^ receiver and the +2 and -2
receivers are reset by a CPF at the end of
add, time r+2.
a'l
d)
Comment
iiS a result, the shift accu.iulator receives
tne numerator froLi the nomerutor accuruu-
■ lator v.'hic]i tranSL.its u"id clears auring
add. tiue s-1. .^t the end oi' odd. tir-.e
s+1, a CPF resets these receivers.
and c) Ouring add. time s+1, then, the de-
nominator accumule.tor receives the comple-
ment of 1 or receives 1 in a given decade
place if during the previous sequence, the
denominator accumulator received +2 or -2
respectively in the same decade pluce.
The D'y receiver and the +1 or -1 receiver
rei.iain set tiu:ouj::h add, time 8+2.
SS pulse initiates period III.
(ooo chart for period III.
s+1 1)
o ignal fro.
receiver.
tiie
a;
1)
^)
b)
c)
Gates l»Pn tiirough |L45J to produce l'p2
which cycles the pla^e ring one stage.
Gates a CP? tiirough (^ so that tiie
nuir^rator binary ring is cycled 1 stage.
Gates a GPP tlirough K7 so that the 1."'^
£ind S^^Q receivers are sot.
1)
2) See 1 c) of addition
time s.
2) The D'y and +1 or -1 receiver remains
set.
b) ^^ a result 0 ceases to be emitted and hO
is emitted instead.
c) Purine add, time s+2. then, the niiiaerator
accuriu?Lator receives tlie contents of the
sliift accumulator which^rcuismits and
clears. At the end of add, time s+2, a
CFP resets the h'y and S^^ receivers,
2) Therefore, during add. time 8+2, the deno-
minator accumulator receives +1 or the
coruploment of 1 but this time one decade
place further to the right tiian during
add, time s+1.
At the end of add, tinie s+2. GP gated
tlirough ^llj by a signal from the il»
receiver resets t-.hA D*.. irexc.r^ \rTa'r- o^X
receiver resets the D'
or -1 receiver.
Y receiver and the +1
9
PX-/0Q4/0
Add.
Tlin©
Signal
TABLE 6-9
SqUARS ROOT P^IOD III - ROUTJD OFF OR NO ROUIJD OFF PERIOD
Requires nine add, tines: 1-9
Itoms relevant to the round off case onl^ are circled
' Effect I
This add. tine coincides v/ith add. tiiue r+2 of period II.
Comment
0
(A)
(b;
3
.(1)
5
(3)
6
i(4)
\,
j(5)
ia
(6)
1) 3 pulse produced when | 1)
a_GP is {;;;ated through i a) Sets the S^j and H^q receivers.
r^9i as a result of the i
coincidence of an @ j
signal and a signal
frcn tlie Q^ receiver « I
I b) Sets the D'y receiver.
c) Gated through (^| by a signal from the
+2 receiver, sets the -1 receiver or
gated tl:irough |lK)| by a s ignal from^tlie
-2 receiver aets the +1 receiver.
d) Gated trjrough JESJ as a result of tlie co-
incidence of si[7ials fron the places
switch and place ring produces an l>o
pulse*
2) Sets tiie pulse source flip-flop.
2) 3S
1) C?P
2) III P
1) III P
2) ROP
3) P
I) III P
1) III P
1) III P
1) III P
1) ROP
2) III ?
1) ROP
|1)
; a) During add, time 1. trjen, the numerator
accumulator transmits (and clears) its
j contents to the shift accumulator.
i A GPP resets these acciiiUilators in
add, time 1.
: b and c ) Thus , during add. tJT.e 1. the deno-
minator accumalator receives the conipie-
nent of -1 or +1 in a given docade place
if in the previous square root sequence,
+2 or its ccsTiple.Tient respectively r/as
received in that decade place.
At the end of add, time 1. Ill P (see
' below) resets the J' and -fl or -1
receivers.
1)
!2) At this time, the pulse source flip-flop
j neon is turned off.
a) Gated througli [uj by a signal frcm the a) So that IJO ceases to be emitted and 0 is
S receiver cj?cles the numerator binary, emitted instead,
rijig.
b) Gated through (ll?! by a signal from the
S^ receiver, setc the S^^q and Il'-y
receivers.
o) Gated by \Fp\ produces a III P,
2)
a) Gated by X4 produces an HOP i^ulse.
b) Cycles the prograr.i ring to stage B.
c) Resets the D'^, receiver and the +1
-1 receiver.
1
I 1) Cycles program ring to stage 1
b) So that during add, time 2. the numerator
accunulator receives the.jiuMeratar fros.i
tlie shift accumulator which transmits and
[ clears, /it the caia oi' aaa. vnae a. o. v'l*
resets these receivers,
c) Til is pulse is produaed in &Yery subsequent
aid, tirae of period III.
a) ROF is produced in every subsequent add. i
tlT.e of period III if round off 1- -pcctfied.
1)
2) Gated tlirough [G8| by a signal ft- on stage 2)
B of the progroEi riiig produces a F pulse.
3) Sets Ey receiver and D^ or Ds receiver j3} These receivers recain set during: add, tmes
if tiie unlike or like sign signal 3.4.5.6.7. They are reset at the end of
respectively is eraitted. add. tL..e 7 (see helowl. Therefore, the
nuiaorator aocuniulator receives eitner the
denominator or its cav.pl anient five times.
1) Cycles prograiT; ring to stage 2.
1) Cycles progroni ring to stage 3.
1) Cycles progra:i ring to stage 4.
1) Cycles program ring to stage 5.
1) Gated tlirough [D4] by a signal from stage
5 of this program ring resets the 11^
and D^^ or D^ receivers.
2) Cycles the program ring to stc^ge 6.'
1) Gated through | J 13; by a signal from stage
6 of the program ring produces a signal
which if j^ted through |K12I by liO, passes
through g9 i to set the Hy receiver and
passes tlirou^iJl^ The signal from ^Jlj
passes througii "1131 when the like sign is
emitted and setsjthe +2 receiver or
passes through {Plsj when the unlike sign
signal is emitted and sets the -2
receiver.
-1
1)
Thus, if the subtraction or addition of 5
times the dencaninator v/hich occurs during
add, times 3 throu-r^i 7 does not produce on
overdraft, durinp; add, -tp^rnp q, the quotient
is increased (vdien N and D have like signs)
or decreased (v/hen M and D have unlike
sigpis) by 2 units in the last place at the
rigjit as specified by the setting of the
plaoos sv/itch,
At the qp4 It f^'^i ^1"- Q III P resets
the +1 or -1 raceiv^r and a CPP resets the
Dy receiver.
J
PX-ZLOri-//
TABLE 6-10
PERIOD IV FOR EITHER DIVISION OR SQUARE ROOT -. HITSRLOCE OR NO IlITERLOCK PERIOD
Requires 2 add. times » 1, 2.
Xtetns relevant to the interlock oaae only are circled.
Add*
Time
•r--
Signal
4.
1) GPP
2)
3)
F
pi
Effect
'Onmisnt
(This add, time coincides with add, time 9 or period I Hi
1 „^ - ■■+
1)
1)
j a) Gated through JL^d by a signal from
stage 7* or the program ring* produces
an P pulse.
b) Gated through ^ by a signal frcHn
stage 7 or the prograu ring produces
an P pulse.
2) Sets the interlock coincidence flip-flop. 2) This turns on the interlock coincidence
flip-flop neon.
3) Resets the pulse source flip-flop, . 3) So that the pulse source flip-flop neon
i is turned on again.
1
(7)
VI)
I)
2)
3)
4)
CPP
GP
1«P
C3P?
2 1) CPP
S/ W Lj
; 3) Oh
1) Gated through fPS produces a GP.
2) Gated through l§j or @ jroduces a DP
or througli fK3l or [Si produces a SRP,
3) Gated through [P6i produces I'P,.
1
■These tliree pulses continue to be produced
every iiddj. tiine of period IV but have no
4) Gated through lK49l in the III case or
(gated through ]?4§ in the I^cas^ produces
a signal which is gated through ^^0 to
set the clear flip-flop and to reset the
interlock coincidence flip-flop.
(effect on the division or square rooting.
4) The clear flip-flop neon goes on at this
tine and the interlock coincidence flip-
flop neon goes off.
1) Gated through iP49J by a signal ii*can the
clear flip-flop, produces a CL* p^lse.
2)
a)
c
4) Signal resulting from
the coincidence of the :
trans ce iver • s be ing
set and the clear flip-
flop's being set.
Gated through |L48! hy a signal from the
interlock sv/itch, resets the inter loci
/Iip~flop.
b) Clears the progra'^. ring to stage A,
4i) After passine throur.h buffer |]>4S|
^ becomes a CL pulse.
3)
a) Resets the clear flip-flop.
b) Clears the numerator binary ring to
stage P,
c) Resets the denominator flip-flop.
d) Clears the place ring to stage 1,
e) Resets the program ting flip-flop.
4)
a) Allows the carry clear gate to pass to
the nuLierator and/or denominator accu-
mulator clear circuits if clearing is
specified.
b) Gates a CPP through [68] to provide a
reset signal for the transceiver and a
c)
prograiu output pulse.
Gates a CPP to set one of the four
answer disposal receivers.
c)
Thus, during the add, time followring the
divider's program output pulse, tiie
ans-iver is disposed of in accordance with
the setting of the ansv/er disposal switch.
At the end of add, tliie 3. the ansv/er
disposal receiver is reset by a CPP,
*If the interlock input pulse is not received until k addition times after add, time 0 of period F/, this
event and all events listed next to add, tine 2 occur k addition tines later than that indicated in this table.
[^B^^H
VI - 30
through J9 and either the +2 or -2 receiver on the coincidence of a signal from
gate J12 and either the like or unlike sign signal respectively,
6 ^2 ,7 . ohror olci^ical Do n c r :'. pt i on o f t he Coromoh Pr o.p:r amiiiing Gir cuit s .
Tables 6-4, 6-f;, and 6-6 summarize the operation of the ©i^fiaion program-
ming circuits during periods I, II, and III respectively of a diviiton program.
The corresponding sumraaries for the square rooting case are found in tables
6-7, 6-8, 6-9. Table 6-10 summarizes the events of period IV for both square
rooting and division.
Below the title, each table carries a statement indicating the number
of additi6n times required to complete the events of the period. In some cases,
the events which occur in the last addition time of t/he pe4*iod are listed in
the comment column beside the events of t^e next to the last addition time in-
stead of on a separate line (e.g. the events of addition time 4, period I f©r
square rooting in table 6*-? J. This is done when the event described occurs,
n®t in tfee Common programming circuits of the divider and square rooter, but
rathei? in an associated accumulator.
The overlapping of periods is also indicated on the tables. For
example, addition time 3 of period J for division overlaps with addition time
d of period II for the first basic division sequence. Thereafter, addition
time d overlaps with the second addition time of the basic division sequence or
with the second addition time &f the shift sequence.
It is reCQttimended that tables i«t4 through 6^10 be compared, at this
time, with the illustrative problems in tables 6-2 and 6^3.
Fr®m the tables, it appears immediately that the exact number of
VI - 31
addition times required to complete any given divisien program id
14+2 (p-2) + 2 (number of additi®ns ©r subtracti©ns ©f the den©minat©r)
and that the imnber of addition times f®r any given square rooting program is
15 + 2 ip -• 2; + 2 vr-iiiibQi' of additi©ns ®r subtractions of the contents of the
c'.dncminator accumulat©r)
where p is th i nimdJi of places specified by the setting of the divide-square
root. Since overdraft can never occur in division by zero, division by zero
consumes an infinite number of addition times. If denominator equal to zero is
a computational possibility, the operator shoiad precede division programs by
discrimination programs vdth the purp©se ©f avoiding such divisions ►
6,3. NUMERICAL CIRCUITS
The 10 stage place ring in the divider and square r©©ter serves to
r®ute the numerical data for the partial quotient ®r twice the square root
int© particular decade lines at particular times. The stages ©f this ring
nuiabered 10, 1, 2, ..., 9 on PX-10-304 c®rresp®nd respectively t® decades 10,
9, ,.., 1 ®f an Jipcumulator. The place ring ne©ns numbered 10, 9, •••> 1 ^^
PX-.10-302 correspond respectively t© stages 10, 1, 2, ..., 9 of the place ring.
It is t© be n©ted that in period II f©r division or square r©©ting respectively,
i 1 ©r - 2 units are put into th6 10^ decade place of the answer first. A digit
different fr©m zero (or the c@mplement ©f zero if the quotient is negative)
©ccurs in the 3,0^ decade place ©f the answer ©nly if the divider and square
r®©ter puts in more than 10 pulses bef©re the first shift sequence ©f period II
*iPr©vided that the divider and square rooter need n©t mark time waiting for an
interleck input pulse.
VI - 32
or, if 10 pulses arc put in before the first shift, and carry over from the
aidi-^ion c:'' cne o::- t^A'o pulses at the end of round off cause carry over to the
lOt'.i Ge-if.do p.L,:cj x'r.e .roo"-. n-jnibered 10 on PX-10-302 never lights,
v; tl;e uiid cf. 3. divider and square rooter progrom this ring clears to
stago 1<, "DiT-'.ag :A J z yo.i-s<j oi a program, the place ring can be cycled only
during' perird H ■ n-:] inn, only at the end of the first addition time (s + 1)
of e-^^'.ch bhii't wOque-^.je^ The cycling of this ring is accomplished by the l'P2
pjj.oj v.'iic/i Ij pr.duced v^'hen the 1' Pt pulse (see Section 6,2,2.) is passed
tiirough L/jS by- a signal from the S^ receiver,
VvThiie the place ring has been classified as one of the nuraerical
circuits, one of its functions is purely a programming function. Stages 3, 6,
7, 8, and 9 of the ring are connected respectively to gates 041, B41, A41j a42,
and A43. The second inputs to these gates are connected respectively to points
^y 1> S, 9, and 10 of the divide-square root and places switch. Upon the coin-
cidence of a signal from the place ring and the divide-square root and places
switch, the appropriate gate emits a signal which allows an S pulse to pass
through gate E6, The resulting SS pulse terminates period II by flipping the
pulse source flip-flop intc; the abnormal state.
The place ring carries out its numerical functions by its control of
the 2 sets of answer output gates (B through L42, and B through L43) . One gate
from the group with No. 42 and one from the group with No, 43 is connedted to
each stage of the place ring. The second input to these gates comes from a
line carrying digit pulses gated through the 1, 2, 2« , 4, 9, and 1' pulse gates
by the setting of the +1, -1, +2, or -2 receiver.
The routing of digit pulses into the appropriate decades by the place
VI - 33
ring can probably best be explained by means of numerical examples. Let us
assume that at some time in the course of a computation the place ring is in
stage 2 (this implies that one shift sequence has been completed thus far in
the computation) and that the +1 receiver is set at the end of some addition
time d+1 of period II. Then, in addition time d-^2, gate L46 passes the IP and
all of the other gates of this group are closed. This single pulse is delivered
to all of the gates B through L42. Since the place ring is in stage 2, however,
the only open gate of this group is J42, Therefore, one pulse is emitted in
decade place 8 (corresponding to the 10 decade of an accumulator) and no pulses
are emitted over any of the other leads of the answer output terminal.
Next, let us consider another case. Suppose that the place ring is in
stage 2 and that the -2 receiver is set at the end of some addition time t¥X of
period II. Then in addition time r+2, 7 pulses formed from the 1, 2, and 4P
passed through gates K47, J47, and H47 respectively are delivered to gates B
through L42, the 9P passed through gate G47 are delivered to the gates B through
L43 and to the ?h\ lead of the answer output, and the W passed through B46 is
delivered directly to the answer output lead for units decade. Since the ring
is in stage 2, gate J42 is the only open gate of the group B through L42 and
gate J43 is the only closed gate of the group B through L43. Thus, 7 pulses are
emitted over lead 8 of the answer output terminal and 9 pulses are emitted over
all of the other leads including the PM lead. In the first half of addition
time t+2y then, the denominator accumulator receives from the answer output
terminal of the divider and square rooter M 9 979 999 999. At the time of the
I'P during addition time r+2, the I'P passed through B46 is put into the units
decade place of the answer output so that by the end of addition time t+2, the
I
A/o /.O/iD Box /S US£D O/y pi/^
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a
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(*2 )
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Rooter
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PX- S- /3Z
ddddddd
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MunrRATORs
[] Or RftDiCRNDs) U
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MOOR[ 5CH00L°"LLlCTRICRL enqineerinq
UNiVER5ITY ^" PENNSLVnNiP
ifMTERCO^NEC":i>jOf DlVlDcRl SQUnPt RoOTEKV\/iTH
Hssociptld Rccumulrtor5^-^ PX-I0'307
VI - 34
denominator accumulator receives from the divider and square rooter
M 9 980 000 000 which is the complement of 2 in the 10 '^ decade place.
It is to be noted that in the divider and square rooter as in the high-
speed multiplier, standard transmitters have not been used in the answer output
circuit, Thni'efor'J, the numerical data for the answer must be delivered to the
quotient or d-?no] dnator accumulator via either a digit tray used for no other
purpose or else by means of a special cable made for this purpose. No load box
is used on this digit tray.
6.4. lOTERRELATION OF THE DIVIDER AND SQUARE ROOTER AND ITS ASSOCIATED
ACCUl/IULATOR.
6,4,1. Interconnections for numerical data.
PX-lO-307 shows the interconnections which must be made among the
accumulators associated with the divider and square Irooter to carry out division
or square rooting programs when arguments of 10 or fewer places are involved.
Divisions involving arguments with from 10 tb ]20 places may be handled by inter-
connecting accumulators 3 and 4 (for 20 digit numerator's) and accumulators 5
and 6 (for 20 digit denominators). In this case another digit tray is used to
connect the add output terminal of the right hand numerator accumulator to the
a input terminal of the right hand shift accumulator and a second additional
tray to connect the add output terminal of the right. hand shift accumulator to
the y input terminal of the right hand numerator accumulator. If the denomina-
tor has more than 10 digits, the add and subtract output terminals of the right
hand denominator accumulator are also connected into the latter tray.
It is to be noted that no mention has been made of interconnecting a
pair of accumulators to accumulate quotients or two-^roots having between 10
VI - 35
and 20 places. The reason for this emission is that the divider and square
rooter is incapable of finding such answers in one operation because the place
ring has but 10 stages and the answer output terminal but 11 leads (and a ground).
Quotients with between 10 and 19 places can be found by performing
2 division programs serially. With the divide-square root and places switch
of the program control used for the first division set at 10, 9 or 10 places
(depending on the relative placement of the numerator and denominator in the
argument accumulators - see Section 6.4.3) of the answer are found. The round
off switch of the first program control should be set to NRO and the argument
accumulator clear switches to 0, Vvhen the first division program is completed,
the quotient as thus far obtained is then transmitted from (and cleared out of)
the quotient accumulator to the left hand accumulator of a pair external to the
divider and square rooter system. The left hand accumulator of this pair should
be stimulated to receive this quotient through some input channel, say a. Then
the a input terminal of the right hand accumulator should not be connected to
the same tray as the A output terminal of the quotient accumulator. Because
of the setting of the round off and argument clear switches, the divider and
square rooter can then proceed on its second program, the division of the re-
mainder from the numerator by the denominator. The quotient obtained in this
8
way contributes 9 more places of the answer. The number stored in the 10 decade
9
place of the quotient accumulator after the second division belongs in the 10
decade place of the right hand accumulator and the number stored in the 10^
decade place of the quotient accumulator belongs in the units decade place of
the left hand accumulator. If the numerator and denominator before the first
division program have like signs, the remainder from the numerator after the
VI - 36
first prograjn and the denominator have unlike signs so that the quotient obtained
by the second division program is necessarily negative. Therefore the second
quotient must be transmitted to the pair of interconnected accumulators with its
sign indication. The second quotient may be properly received in the pair of
accumulators if these accumulators receive the second quotient from the quotient
accumulator through an input channel different from the one used for receiving
the first quotient, say the 3 input channel and the 3 input terminals of both the
left and right hand accumulators should be connected to the tray to which the A
output terminal of the quotient accumulator is connected. Special adaptors and
shifters must then be used at the 3 input terminals of the right and left hand
accumulators. The right hand accumulator's 3 input terminal should have plugged
into it a shifter which shifts the data one place to the left. The left hand
accumulator's 3 input terminal should have an adaptor which connects the left
Q O
hand accumulator's PM input and 10^, 10 , .,., 10' decade place input leads
to the PM line of the digit tray and which connects the 10^ decade place input
9 ^^-
lead to the 10 decade place line of the digit tray.
If 9 or 10 decade places of twice the root are found by a given square
rooting program, it is possible to find about as many places again of the root
■Jv-If it is known that the numerator and denominator for all division programs will
always have like sig;n and if the first division program is stopped after 9 places
instead of 10, then the denominator and the remainder from the numerator again
have like sign so that the quotient obtained from the second division is
positive. Under such circumstances the second quotient should be so shifted that
information from the 10^ and 109 decade leads of the quotient accumulator add
output is received in the units and tens decade places of the left hand accumu-
lator and the other digits of the second quotient are received in the right hand
accumulator shifted over two places to the left. The connections of the PM lead
of the output of the quotient accumulator to the PM and 10*^ - 10-^ decade place
leads of the input to the left hand accumulator may obviously be omitted.
VI - 37
(notice, not twice the root) by dividing the remainder from the radicand by
tiNice the root as thus far found. The procedure for obtaining the final
answer in a pair of interconnected accumulators external to the divider and
square rooter system of accumulators is similar to that for the case discussed
above for division. However, if it is desired to accumulate the root in the
pair of interconnected accumulators, twice the root (resulting from the first
program) should be multiplied by 0,5 before its reception in the left hand
accumulator o.r, if it is desired to accumulate twice the root in the final
accumulator, the quotient (resulting from the second program) should be
multiplied by two before its reception by the pair of interconnected accumulators^
^•^•2. Interconnections for Progr?)jiiming Instructions.
PX-lO-307 shows the interconnections which must be established between
the divider and square rooter and its associated accumulators for the purpose
of communicating progrriiaming instructions. For information about the wiring of
the various program terminals on the divider and square rooter see PX-10-108,
and for the wiring of the accumulator interconnect or terminals which receive
signals from the divider and square rooter program terminals see PX-5-105.
On PX-10-108, SU2 refers to the 0, uotient accumulator and shift accumulator
program terminal, SU^ to the denominator- square root accumulator program terminal,
and SV to the numerator accumulator interconnector terminal, ST, and SU-, on
PX-5-105 refer to the accumulator interconnector terminals designated by I-^ ,
and 1-^ respective Ly on PX-5-301,
The numerator accumulator interconnector tcr':iiinal on the divider and
square rooter is connected directly to the left hand interconnector terminals
on the numerator accumulator by means of the numerator accumulc.tor interconnector
VI - 38
cable shown on PX-5-132. The correspondence of the points a and |3 on the
numerator accumulator switch and the a and 3 input channel receive circuits in
the numerator accumulator is established by the wiring of the plw^s of this
cable .
Adaptors which will be discussed further below are plugged from the
dencmlnator-square root accumulator" program terminal and from the quotient and
rhift accimiulator program terminal to two different digit trsys. The denomina-
tor- s':^uare root accumulator inter connect or cable shown on PX-5-136 corries
propramniing instructions to the denominator-square root accumu3.ator' ri left hand
intnrc'-^nnector terminals from the tray connected through an adapter to the divido-
cquare root accumulator program terminal on the divider* The quotient '.cc-ijiiula-
tcr intcrconnector cable shown on PX-5-134 ^"^^nd the shift accumulc-.tor i.nter-
conrector cable shown on FX-5-t135 darry instructions to the quotient and shift
acoiViTulc'tors- left hand intcrconnector terminals respectively from the digit
tray c.cnnected through an adaptor to the quotient and shift accumulator program
terminal on the divider and squa.re rooter.
The adaptors referred to in the preceding paragraph are shown oh
PX-.4-II4 A, B, and C, These adaptors may be used interchangeably at either
the denominator-square root accumulator program terminal or at the quotient
and shift accum.u3.ator progra.m terminal. Leads 1-7 on the plug and socket of
all the adaptors arc ^A/ired in the same way; but;, to provide flexibility in the
meamnr'S assign'^d '-a) the points 1, 2, 3, and 4 en the answer disp^'sal switch,
some or a^.] of leads 8-9 10, and ll" on the p].ug ar.- -!^;;rod in dlff.^rent Wc'ys
•s'rLeacs S and' 10 on'-'jhe qii Aiont and shift accuji;iulaLcr p?'j^r..j:. ttrrddn.J corrflate
with poinLs i and 2 of the answer disposal switch, anc icadc 8 pjiC lO on the
de-aomanatc.T-sq^iare root accumulator program terminal correlate with poir^ts 3 and
4 of the answer disposal switch. Leads 9 and 11 on both program- terminals.sre '-dissoci-
ated respectively with 8 and 10 for answer disposal instructions which involve
clea,ring.
VI - 39
to leads on the sockets of the various adaptors,
V/hen used with the standard quotient accumulator interconnect or cable
(PX-5-134) 31* denominator square root accumuls-tor inter connector cable (PX-5-136)
the adaptors referred to provide the following answer disposal options:
{ transmit additively without clearing
PX-k-lll^A ^ \ transmit additively with clearing
I transmit additively
transmit subtractively
( transmit additively with clearing
PX-i;.-114C ^transmit subtractively with cl jrrirg
To ia.lMttrc.t'j the way in which these adaptors function let us ^.onsidei a case
in vjbioh idaptor PX-4-114A is plugged into the quotient accumulator an 1 shj.ft
arcuirulrtor program terminal and adaptor PX-4-114C into the dencmxnab( r-square
root accumulator program terrainal. Then the points on the answer disposal
3wi':,ch have the follcwj.ng meanings:
1 - transmit th') quotient additively without clearing
2 - tr .nsnit the quotient additively with clearing
3 - transmit twice the root additively with clearing
4 - transmit twice the root subtractively with clearing
For computations in which other answer disposal option combinations than those
provided by the 3 adapters described above are needed, addi+.iona„l adaptors can
be custom made,
6.4.3. ^:1^3, t xono h \p_ between Alip;nment of the krg, urion-^' s and the kp. ,s ^3y. ,
'^■'ha oporat.ci' lAurt exercise considerable car-, bi t.'.e pla^^enurt of the
argui^enls :;n the ar^^v ri'^nt ac3UJi;ulators for diviG;Lj*^;i a^ sqcai'c r< oti:;-^ p^r'ograms
in oid-^r to maka th'-. :^ost efiicient use of uhe -livioor and rsc'uai-e royte-:'.
^
n
I
)
V
)
TABO 6-11
POSSIBLE VuX^JEimn Oi? ?>A^C/Jir (also se*» TaMe t>-12}
>
1
Period
Add.
T1m«
■ seii^rator (^teilioaad) Aco^imMTator
i^aiMQiaetiw (1w> Root) Ac cmriI a tor
Shift ^ioou^ilator
'
RDoel-ves
tJtores after rocoiving Heoeirss
stores after receiriag
H«COi VBfl
Stores after raoei^lng
-*-
ii^xaii^l
I A
P 0 900 000 000
P 0 900 000 000
P 0 100 000 000
I
1
2
3
p 0 100 ooa 000
II
shin
5
6
7
Vi 9 900 000 000
P 0 ^50 000 000
P 0 200 COG OOQ P 0 300 000 t}00
M 9 700 000 000
V 0 500 000 000
t
p 0 :^o 000 ooc
p 0 500 000 000
9
M 9 500 000 000
P 0 000 000 000
j
10
11
12
— j^"' ^ —
♦
P 0 2DC' a)0 000
p 0 700 000 000
— ..Wiy. .... ~ ■ ;.. 1 j ^ 3~ 1
-^.,..™_.., — ._.^,_. ,
.
M 9 300 000 000
U 9 300 000 000
P 2G0 000 000
P 0 900 iXK) 000
M 3 000 000 000
13
/■ V^v^V
V^>y\r\
M 9 9-X:' 0*JC OCO
P 0 «00 000 000
M 3 000 000 000
Examplf
> B
P 2 i^Ol 000 000
P 2 401 000 000
— —
x
Jk.
1
2
3
i
u— ^
■
,
-
P 0 100 OOO 000
P 0 100 000 000
.,
"' '
II
6
7
M 9 900 000 000
P 2 301 000 (XIO
L : ^ ^^ ,_^^^_^ ^^
'-—- ^ ^
^~.m u .■i..^.«^'ulb^M^^.^-,..,..,-.^,»„M-,-.-
P 0 200 OOC' coo
P 0 300 000 000
u 9 700 000 000
P 2 001 000 000
^
P 0 200 OOC coo
p 0 500 000 OCX)
9
M 9 500 000 000
P i 501 000 000
■
10
? 0 200 000 coo
p 0 700 000 000
11_
12
H 9 300 000 000
f—— -~— ^-1 ~- — . : ..
P 0 ^1 000 000
P 0 200 000 000
P 0 900 000 000
13
M 9 100 000 000
M 9 901 000 000
.
14
•-X.'^^v-
<J\/^sy'^-^\
P 0 200 000 000
P 1 100 000 000
snin'
,i
15
!
I
. -. . A
H 9 900 000 000 r 1 000 000 000
-,-■■■' 1 „
U 9 010 000 000
U 9 010 000 000
,
V^Tiod
Add.
Time
Nujaerator (^iadicaad) iiccurnulator
|)en;.«infi.tor (iwo-iioot) Accumulator
^liift AC
cucailetor
iieceiVBs
Stores after raceivin^s
iteoeivas
»^toras after receiving
^cqIvos
=>tores after receiving
. iixaranl
B 0
P 2 500 000 000
P 2 500 000 000
I
1
2
3
»— - - ' ■ ■ - '--' - .,«,««».,,,-=»-«
100 000 OOC
5
P 2 400 000 OOQ
1"' 0 100 COO 000
M 9 900 000 otx)
7
9
-0
li
12
"! 7
r 0 200 coo 000
1 0 300 COQ OCO
—
fc» 9 700 x^a 000
P 2 100 QOQ GOO
I- 0 2a> 000 000
r 0 500 000 000
M 9 500 000 OCC
P i bOO 000 000
- - -—
r 0 200 000 )oo
r 0 joc 000 000
M 9 300 000 000
? 0 900 QiJO 000
P 0 200 000 ex
'^T 0 900 000 000
^ 0 ioo. 000 a)c
V 0 000 000 ooo
-■•
14
P 0 2a) o".o v^:}
• 1 106 OfX} OCO
15
M ^ 900 000 OOP
Cm .^ 900 000 ooo)
i 0 200 000 000
Shift
lb
P i 300 000 000
17
/-''-yx''\.''
v'-V'-'v/
K 9 900 000 OOC P 1 200 000 000
M 9 (KX) 000 000
/1m 9 000 000 000^^
•nC? WRQliG Mf^:?KM; WIU. aF.;-arLT BEOAtJHS *I3JE: Slil^XFIC^I?:' Fiam?E,. «, OF THE
imiAlNIX'lc raaf -THK im-Dia^JID 'tseo add» tiiie 1»>) IB TKFCmi .AWAY "t^^
SHI FT ma TAiCK^^ PLAGE (sea a<ii. tirry? i/).
*
<
'.
■
VI - 40
From the fact that the divider and square rooter place ring allows
Q
one unit to pass to the 10 decade .-^f the tv/o root accumulator at the beginning
of a square rooting program, it is obvious that the divider and square rooter
proceeds on the assumption that the decimal point of the radicand occurs an
even number of places (either right or left) from the FM place of the numerator
accumulator. The operator therefore, must aligh the radicand in the numerator
accumulator so that «HE DECBiAL POINT OF THE RaDICAND OCCURS AN EVEN NUl-.IBER 0"^
PLACES TO THE RIGHT OR I£FT OF THE talERATOR ACCUMULiiTOR'S m POSITION.
A comparison between the square rooting example in Table 6-3 and the
examples in Tables 6-11 and 6-12 also points to another consideration concerning
the placement of the radicand,- Examples A and B show radicands placed so that
the correct answer will l^e obtained. Example C shows a radicand placed in such
a way that the divider and square rooter cannot possibly obtain the correct
answer. The examples in Tables 6-11 and 6-12 have all been carried through the _
first addition time of the first shift sequence since the reason for the impos-
sibility of example C shows up at that time. In examples a and B (and also in
table 6-3) when the remainder from the radicand is shifted the 9 at the extreme
left is thrown away^ This 9 (preceded by sign M) is not a significant figure
since it is merely the complement of a non-significant zero at the left. In
example C, however, the figure 8 at the far left of the remainder from the
radicand is thrown away when shifting takes place. This figure (preceded by
sign M), the complement of the digit 1, is a significant figure. Therefore,
when the basic square rooting sequence is restamed after the completion of the
shift sequence,, it will be resumed with an incorrect remainder from the radicand,
A significant figure of the remainder from the radicand will be thrown away in
VI - 41
the first shift sequence whenever the first two decade places at the extreme
left of the radicand accumulator are occupied by the number 25 or any greater
number. Therefore, in general, AT LE/.ST OME ZERO SHOULD PRECEDE THE FIRST NON
ZERO DIGIT (at the extreme left) OF TIffi Ri^DICrvND.
If the radicand' s decL-aal point occurs n (positive to the right j
negative to the left) decade places from the PM, the decimal point of twice
the root occurs n :|: i places from the PM. For example, in the computation
of table 6-3, if the decLmal point is considered to occur between the digits 1
and 3 of the radicand, then n is 4 e.nd the decimal point of twice the root occ^ir-i
3 places to the left of the PM or after the digit 8, The rule given above may
bo derived from considerations arising out of the material in Table 6-1,
From the fact that the divider emits +1 or -1 unit in the 10 decade
for every repetition of the basic division sequence until the first shift
sequence of period I, it can be seen that if the first non-zero digit at the
left of the denominator occupies the same decade place of the denominator accu-
mulator as the second (from the left) non-zero digit of the numerator does in
the numerator accumulator, then the first (from the left) non-zero digit of
the quotient occupies either the first of second decade place to the left of
the PM in the quotient accumulator (see Section 6.3). If the standard alignment
of the denominator is defined to mean the alignment in which the first non-zero
digit of the denominator occurs one decade place further to the right than does
the first non-zero numerator digit, then shifting the denominator k places to
the left or right of the standard alignm.ent, results in shifting the aligrment
of the quotient k places to the right or left respectively of the position
described above. Since with the standard aligniiient of the denominator, the
VI - 42
first (froii the left), non-zero digit of the quotient may occupy the extreme left
decade of the quotient accuraulntor, it foll'jws irnraediately that THE FIRST (from
the LEFT) NON-ZERO DENailNATOR DIGIT WST NEVER OCCUR IN A DEC.xDE PLkCE TWO
OR MORE TO THE RIGHT OF THE DECIDE PL.-.CE OF THE FIFcST (from the LEFT) NON-ZERO
DIGIT OF THE NmiERixTOR or else the qu'.)tient may exceed the capacity of the
quotient acciunulator.
Another restriction on the placement of the denominator is that TIffi
FIRST (from the l^FT) NON-ZERO DENOMIN..TOR DIGIT MUST NOT OCCUPY THE
FiaR LEFT DEC.-.DE PL/.CE OF THEi; DENOMIN.-TOR .XCUliIUL^.TOR . The reason for thi^
restriction is similar to the reason for not placing the first non-zero radicand
digit ill 'the extreme left hand decade place of the nuraerator accur.mlator (see
Table 6-12), If this rule is violated, a significant fi^^re of the remainder
from the numerator may be discarded when the first shift sequence of period II
occurs.
If the decimal points of the numerator, denominator, and quotient
respectively occur n, d, and Q places from the PM place (where n, d, and q are
positive when counted toward the right from the PM place), then q may be pre-
dicted by the following formula:
q = n - d -»■ 2
The following tabulation based on the example in table 6-2 illustrates this rule.
Numerator
n
!
Denominator ' d j Quotient
j 1
q
P 0 209.070 000
4
P 0 2:^30 000 000
2
P 0 09l-.00C:O00o j
4
P 0.209 070 000
1
P 0 23.0 000 000
3
P.O 09l 000 000
0
!
'■p 0.209 070 000 IPO 230. 000 000
4
(P.O 091 000 000)xl0""'
-1
1
FA-/0-^l
jinswer Output Terminal
NiUiierattir Accumulator Clear 3v/itch
set to 0 "J^I -- - '
set to C — '^^
DerKsainator Accumulator Clear Switch
Round-Off S^Titch set to
ITo Round-Off
Round-Off -""
Interlock STfitch set to
IIo Interlock "^
Interlock ^^^
Quotient Accumulator and Shift Accuinulator Program Terininal
— Denojiiinator-Squ€ire Root Accumulator ProgroKi
Terminal
numerator Accumulator Inter connector Terminal
1 I i Divider p"j j j
i Sq, Rooter LJ iJ I
lluiaorator Accunulator Receive Sv/itch ^Setting
Denominator Accumultttor Receive Switch Setting
^ _|_ — Divide-Square Root and Places Switch Setting
^■A| OL®! O; Oi 01 oi '^
II! i 1 ' -
o o o 0 o o c o
I — Ans\v©r Disposal Svvitch Sotting
-1- Addition tine in y/hich program control is
stimulated
Interlock Puis© Input Terminal
Program Pulse Output Terminal
Program false Input Terminal
Figure 6-.1
SlOiBOLS US 123 FOR DIVIDER /klJD S iU.lRE ROOTER Oil Si3T-UP DL\QRikM
VI - 43
6.5-. ILLUSTRiiTIVE PROBLE.'I SET-UP
Table 6-13 contains instructions for setting up the units of the ENInC
to carry out a computation illustrating tjrpical situations which arise when the
divider and square rooter is used. The symbols used in this table with reference
to accumulators and the high-speed multiplier have been previously taken up in
chapters II and V, The master programrAer is used in this set-up to route a
program pulse received by it over a given program lino (1-2) into 3 different
program lines (2-4, 2-5, and 2-6) on 3 different occasions. For details con-
corning this use of the master progr<"^nraer see Chapter X, The instructions to
the master programmer appear in the double column immediately after the addition
time column of Table 6-13. The first half of the double column shows the input
terminal to which the program pulse from line 1-2 is delivered. The second half
of the column designates the program output terminal (A-|_o, A20, or Aqo) tl:irough
which the master programmer delivers the program output pulse and the program line
to which the program pulse output terminal is connected (2-4, 2-5, or 2-6).
The set-up table instructions given to the divider and square rooter
occupy 5 levels. These instructions appear in the following order:
1) on the first level, i-j represents the program input pulse
and (^ the progrcim control number
2) on the second level,
the first pair of symbols represents the numerator accumulator re-
ceive and clear switch settings,
the second pair of symbols represents the denominator accumulator
receive and clear switch settings,
I''\
VI - 44
the last symbol represents the answer disposal switch setting (1, 2,
3, 4, or 0) . The code for 1-4, which depends on the adaptor used, is
given at the head of the divider and square rooter column.
3) on the third level,
the first pair of symbols represents the setting of the divide-
square root and places switch,
the next symbol represents the round off switch setting,
4) on the fourth level the setting of the interlock switch (I or NI) is
given. In interlock programs the program line from which the inter-
lock pulse is received is noted in a parenthesis next to the symbol I.
5) on the fifth level, which is written on the line for tha addition
time which represents the last one of the program, the program out-
put pulse is written.
For example, the group of symbols shown at the left below describes the
following instructions:
, Divider
Add.' .;j 1 = AC 3 = AC
Time j 2 = SC 4 ' SC
^L-1 K^
aC 00 4
m RO
I - 5
End of
div, program
II - 1
V
1-3
In addition time 1-5 a program pulse
from line 1-1 stimulates control 5 to
carry out a square rooting program to
8 places with round off. The radi-
cand is received via the a input
channel of the numerator accumulator
and the numerator accumulator is
'-The practice adopted here with regard to counting addition times is to identify
addition times by a roman numeral and arable numeral.. A new roaan numeral is
used when a division program is completed and addition times are then counted
fr©m arable numeral 1 again.
^■■* ■'■I'Atfi^fr-''..'*-.;
VI > 45
cleared at the end of the progr-am^ The interlock pulse is received from
progr=^ni liae 2-6. At the end of the progr-i'jn a prcgrara output pu.lse is emitted
over lin^■^ i--3> Twice the square root is disposed of subtractively from the
dc^nopij.nator accumulator -^^hich is then cleared,
T'le conventions used ivith regard to the divider and square rooter in
set-up diagr^-ims a-^e explained in Figure 6-1 cUid those relating to the master
prcgrarrr-aer in Figure 10-1 of Chapter X.
The computation described in Table 6-13 ©onsists of forming X where
3 3
•^1. ,.L r.^j^
-t
'T
It is assumed that the quantities a, 2b, c, d, x^ , Xp, and x^ have been formed
before this computation begins and they are stored in the units indicated in
the table on the line corresponding to addition time zero. The ranges of these
quantities are indicated on the table and the fact that a quantity' s decimal
point occurs n decade places from the FM is symbolized by \'n] where n is positive
when counted toward the right.
The computation of N a begins in addition time I-l and the computation
of > X • proceeds in parallel with this. Only two program controls on the
high-speed multiplier are devoted to the 6 multiplications involved in forming
y^ Xj_ , To do this, however, " 3 stages of master programmer stepper A (see
Chapter X) and 3 dummy programs (set up on program controls ^, 6, and 7 o^
accumulator 9) sire used. While approximately the same smount of equipment is
required as would be the case if 6 multiplier progrrjns wore used, this procedure
may be desirable in computations where so many multiplications are performed
VI - 46
that multiplier program controls are at a premium,
Prograjn control (?) of the high speed multiplier is used for the
3
computation of x^ . One addition time before this control is stimulated, how-
ever, the accumulator which stores the particular x. needed is stimulated to
transmit twice to the ier and icajid accumulator. Since the high-speed multi-
plier is stimulated in time for only the second transmission, the ier and icand
accumulators receive not 2x^ but only x. .
x^ is formed immediately after x^^ through the use of high-speed multi-
plier program control (l5) . The number x. remains in the ier accumulator from
the previous multiplication and.x^ is received in the icand accvumulator from
the final product accumulator. V/hen this multiplication is cGmD].eted, 2x-^ is
transferred to accumulator 12. The multiplier is made to stimulate the disposal
of twice the product stored in the product accumulator by setting the product
disposal switch at SC and connecting the SC output terminal on panel 3 of the
multiplier to a program control on accumulator 13 which is instructed to trans-
mit two times additively with clearing.
The master programmer in this problem serves to pick out the argument
which is to be used whenever multiplier progrom control (9) is to operate and
indirectly stimulates the performance or non-performance of the program set-up
on multiplier control. (^j . The former action occurs because the master program-
mer's output pulse is delivered to a program control on the appropriate accumu-
lator; the latter effect occurs because the master prograrmer' s output pulse
is delivered to dummy prograjn controls whose output pulses, in turn, are
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VI - 47
delivered to prograni control (^ as long as this multiplication program is to
be repeated, Kfter the third sequence .:f two multiplications has been performed,
the output of the master programmer is delivered to the interlock pulse input
terminal of the divider and square rooter to inform this unit that 2 Z^ x.
has been formed and that the division of 2 V a + 2 ^Xj_ by 2b can take place
whenever the divider and square rooter has completed the formation of 2 ^a, ,
V/hen the divider and square rooter has completed the computation of
2 \'a' the result is transmitted (during addition time II-l) to actumulator 12
which has been storing 2Z-Xj_-' , In the next addition time, the divider and
square rooter commences the division program (set up on program control C2)
and the high speed multiplier begins the multiplication of c x d (set up on
prcgrara control (Ip) , VJhen the multiplication program is completed, c x d
is transferred to accumulator 12 which also receives ^ ^ ^^ — when the
b
division program is completed. Thus, by the end of addition time III-l,
accumulator 12 stores x a-nd emits a progrcun pulse (carried on line 1-7) which
can be used to stimulate tlie next computation sequence if any.
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VII - 1
VII FUNCTION TABLE
The ENIAC contains three function table units each of which can be
used to store values of one or more functions tabulated against an independent
variable and can be programmed to look up and transmit the values so stored.
The function table is useful not only fGr storing and selecting values of a
function (as the term is ordinarily defined) but also makes it possible to
store and have readily available any numerical data which can be tagged with
two digit numbers increasing monotonically between 0 and 99. Thus, a function
table could be used to stoire the coefficients and constant terras of a system
of simultaneous equations or programmatic information. The function table
requires P+U. addition times to look up the value of a function and transmit it
repetitively r times.
The following pages will be concerned with: program controls (7.1)
common programming circuits (7.2); numerical circuits (7.3); storage of pro-
gramming inforraatirn in the function table {7»k)', and illustrative
problem set-ups ((7 ^5) » Reference will be made to the following diagrams:
Function Table Block Diagram PX-7-304
Function Table Front View PX-7-305
Function Table Front Panels PX-7-302, 303
7,0. GENERAL SmRIARY OF THE FUNCTION TABLE
■ The function table can store 104 entries of one or more functions
with each entry associated with an argument between -2 and 101 » By an entry
is meant 12 digits any one or all of which may v:,ry from entry to entry and
VII - 2
two signs, either variable or constant. In addition, 8 digits, constant
throughout the range of the table, may be se€ up manually on switches.
If a is the argument (where o < a < 99) and f (a) is the information
stored in the function table line corresponding to value a of the argument,
the function table can be progrejnmed to look up f(a-2), f(a-l), f(a), f(a+l),
f(a+2), or the complement of a,ny of the preceding s'jid, furthermore, can be
programmed to transmit the number looked up repetitively from one to nine
times. Four addition times are required for looking up the value of a function
and one more addition time is needed for each transmission of the functional
value ,
The function table can also exert some program control on the accumu-
lator used to store the argument since it is capable of transmitting a program
pulse to stimulate the argument accumulator to transmit the argument to the
function table and then either to clear or not clear. In addition, the
function table is capable of receiving a pulse which will stimulate it to
carry out the operations noted above and then, of transmitting a program^
output pulse.
The physical appearance of the function table can be seen on
PX-7-305. The function table has the two panels shown here and in addition,
a portable functiou tabl.^ (see ENIAC Floor Layout, PX-1-302) which extends into
the center of the floor. As its name implies, the portable function
table can be moved around and, any of the ts.bles (A, B, C on PX-1-302) can
be used with any one of the function tables. The portable function table will
be discussed in greater detail in Sec. 7.3 •
#
VII - 3
In its pQni|>onents and method of operation the function table is
very much like the high-speed multiplier. The numerical circuits consist
of a portable function table (analogous to the multiplication tables), argu-
ment counters, argument input gates (analogous to the ier selector gates),
table output gates (analogous to the coding gates in the high-speed multiplier),
and the 1, 2, 2', 4, and 9P gates.
There is a difference, however, between the high-speed multiplier
and the function table in the way in which the argument is fed to the function
table. Here, the argument is delivered in pulse form (rather than in the form
of st&tic outputs) to the function table where it is set up in the argument
counters (a decade ring counter for units place with carry-over to the 11 stage
counter used for tens place of the argument). The argument input gates are
then set up by the static outputs of the argument counters in the function
table ,
The function table's numerical circuits also include 8 constant
digit switches which have a purpose similar to that of the table Output
gates except that the former are used only for digits which remain the same
throughout the table, A sign which remains constant over the whole table can
be set up on one of the two master BI switches. The subtract pulse switches
make it possible to transmit the I'P over the leads for certain places when
the function table transmits subtractively so that complements with respect
to 10 can be emitted.
The common programming: circuits of the function table consist of
a 13 stage program ring ahalagous to the program ring in the high-sf>eed multi-
plier, the argument correct gates (F-Ii(.4) which make it possible to look up
VII - 4
f(a-2), f(a-l), f(a), f(a+l), f(a+2), the add and subtract gates and the
flip-flops (C and D 46, kl) they control which make it possible for either
the function or its complement to be looked up, and the argument flip-flop
•which controls the setting up of tens place of the argument in the argument
selectors. There are also circuits for clearing the prograjn ring and the
argument counters, and for resetting flip-flops. The C and NC transmitters
and their output terminals on front panel 1 which can deliver a pulse to the
argument accumulators to stimulate transmission of the argument may also be
counted amonj^ the common prograjnming circuits.
The programming circuits mentioned above can be operated by any one
of the function table's eleven program controls. Each program control includes
a transceiver with program pulse input and output terminals on front panel 1
correlated with an operation switch, an argument clear switch, and a repeat
switch.
The r+4 addition times required for the looking up of a function
and its repetitive transmission r times are spent in the following way:
0 Program input pulse is received
1 Function table emits C or NC program output pulse to
stimulate transmission of argument,
2 Function to.ble receives digit pulses for the argument,
3 Argument stored in the argument counters of the function table
is corrected to the value specified on the operation switch
4 Appropriate line of the portable function table is activated.
5 Functional value is transmitted for the first time.
VII - 5
4+r Functional value is transmitted for the r tinie and
a program output pulse is emitted after the r trans-
mission.
7.1. PROGRAII CONTROLS
A pulse received at one of the 11 progr?jn input terminals of the
function table stimulates the function table to carry out the progrrm set up
on the prograjn switches of the control of which that input tt-'rniinal is a part.
Each program control offers the operctor options as to:
1) which of five (^^lines" of the table is to be entered for a given
value of the rrgument,
2) whether the entry tabulated on the specified line or its
complement is to be looked up and transmitted,
3) whether or not tronsiidssion of the argument to the function table
is to be stimulated by the function t£vble,
4) the number of times (from 1 to 9) in succession the function
table is to transmit the v:'lue looked up.
The function table follows the program instructions set-up on the
control in a fashion similar to that discuesed previously (sec accumulator and
high-speed multiplier, for example). A pulse received at an input terminal
flips the flip-flop of the transceiver into the abnormal state. As a result,
signals from the transceiver, (indirectly through inverters and/or buffers)
pass through the program switches and then proceed to cause the common program-
VII - 6
ming circuits (see Sec, 7.2.) to operate appropriately. As in units previously
discussed, also, the reset signal for the transceiver's flip-flop comes from the
unit's program ring and passes through the repeat switch of the control. After
the function has been transmitted the number of times indicated by the setting
of the repeat switch, the flip-flop is reset and a program output pulse is trans-
mitted.
It is to be noted that the program output pulse is emitted after the
function is transmitted. Therefore, the output pulse cannot be used to stimu-
late an accumulator to receive the function, but a pulse from some other source
must be provided for this purpose four addition times after a function table
transceiver is stimulated.
Program neons on front panel 1 (see PX-7-305) each correlated with
a program control enable the observer to see which program control has been
stimulated at a given time and, hence, which program should be in operation.
7,1.1. The Operation Switch
The operation switch has ten possible positions. The five left hand
(add) positions are used when it is desired to transmit the value tabulated on
a certain linej the five right hand (subtract) positions specify transmission
of the complement. If a is the arguinent received in the function table (where
o < a <. 99), the setting -2, -1, ..,, or 2 respectively specifies that line
a-2, a-1, ..., or a+2 of the portable function table is to be entered.
The function table is especially well adapted to interpolation by
means of algebraic interpolation polynomials of degree 1, 2, 3, or A. since,
by setting up several program controls, the operator can readily produce func-
tional values for values of the argument surrounding the one for which the
VII - 7
interpolation is being carried out , Interpolation of degree higher than the
fourth can also be done. However, in order to obtain several of the entries
required for such higher degree interpolation, the argument must be changed
before its transmission to the function table. For example, to interpolate
by means of the Newton Gregory forward interpolation formul? out to sixth
differences requires f(a), f(a-^l), ..., f(a+6). The entries f(a), f(a+l),
f(a+2) can be obtained in succession by using three program controls with
operation switches set at 0, 1, 2, and by feeding a to the function table.
The remaining entries nay be produced by forming a' = a+5 in the accumulator
in which the argument is stored and then using program controls set-up to
produce f(a'-2), f(a'-l), ,.., f(a'+l),
7.1.2, Argument Clear Switch
The argument clear switch can be set at C, NC, or 0, If , on a given
program control, the switch is set at C or NC, at the end of the first addition
time, a progrcun output pulse is transmi.tted from the correspondingly labelled
terminal on front panel 1 (see PX-.7-302). If, the argument clear switch is
set at 0, no pulse is transmitted from either the C or NC program pulse out-
put terminals.
The operator can utilize the C or NC pulse to stimulate transmission
of the argument to the function table by connecting the C and NC terminals to
suitably set up program controls on the argument accumulator or accumulators.
If the argument for a given function table is always stored in one accumulator,
the C terminal can bo connected to a program control on the j'.rgument accumu-
lator set up for transmission with clearing and the NC terminal, to a program
control set-up for transmission without clearing. If, on the other hand, the
VII - 8
argument for a given function table is stored sometimes in one accumulator a^nd
sometimes in another, the oporator may find it convenient to use the C pulse
to stimulate transmisjjlon of the argument from one accumulator and the NC
pulse to stimulate transmission from the other argument accumulator.
V^/hen the argument clear svdtch is set at 0, the operator must pro-
vide, independently, for a program pulse to stimulate the transmission of the
argument to the function table (unless the argument is to be zero). Such a
pulse must be delivered to the argument accumulator one addition time after
the program pulse ivhich stimulates the function table program control since
the argument must be received in the function table during the second addition
time of a program,
7,1.3. The Repeat Smtch
The purpose and use of the function table repeat switch is the sacie
as that of the accumulator- repeat switch. It enables the operator to secure,
on any given program, repetitive transmission of the function looked up r
times (where 1 <v r < 9) and causes a program output pulse to be transmitted
when the last repetition has been accomplished, r+4 &.ddition times after the
reception of a program input pulse,
7.2, CaaiON PROGRAMMING CIRCUITS
The device used to clock the advance of the function table through
the sequence of suboperations involved in looking up and transmitting a func-
tional value is the program ring counter (usually abbreviated ls the program
ring). This is a thirteen stage counter with the first st3r.:e labelled -3
VII - 9
(see PX-7-304) and the last 9. The program ring neons (shown on PX-7-305)
are correlated with the 13 stages of the program ring.
The program ring clears to stage -3 when initial clearing takes
place and whenever a function table program is completed. The reception of
a program pulse by any transceiver results in opening a gate (D, E, or F49)
which allows the ring to receive a CPP e-'ch addition time as long as the
transceiver's flip-flop remains in the abnormal state. Each CPP then cycles
the ring 1 stage. In this section, the prograna ring and its effect on associa-
ted gates and flipr-flops are discussed (see Table 7-1 for a summary).
During the first addition time of a function tabic program (i.e.
while the ring is in stage -3), gate J48 is opened so that the next CPP (after
the one received by the transceiver) can pass through it and then out through
whichever of the gates H(46) or H(47) is open as the result of the setting of
the arguraent clear switch to NC or C respectively. This pulse is the one re-
ferred to in Sec. 7.1.2, as the NC or C pulse.
Simultaneous with the trensmi-ssion of the C or NC pulse, the program
ring cycles to stage -2, During this addition time, the second of the program,
a signal from stage -2, opens gates D42 and H42, the gates to the units and tens
place argument counters to allow the arguEient to be received in the argument
counters.
In the third addition tirrio a signal from stage -1 allows 0, 1, 2, or
3 (depending on the setting of the operation switch) pulses to pass through
gate E42 and be delivered to the argument counters so as to correct the argu-
ment to the value specified by the operation switch setting (see Sec. 7.3.2.)
During this addition time, too, gete F47 is open so that the 1' pulse trans-
VII - 10
TABLE 7-1
CHRONOLOGICAL OPERATION OF THE FUNCTION TABLE'S
PROGRAMING CIRCUITS
jAdd, Time
End of
0
Stage of
Program
Ring
EVENT
-3
1^ Program input pulse is received
-3 I 1) Signal from stage -3 gates CP'P through gate J48» Output
j of gate J48 gated through gate H46 or gate H47 by normal
. ly positive output of transceiver's flip-flop is emitted
j as C or NC pulse,
j 2) CPP gated through D, E, or F49 cycles program ring to
stage -2,
-2
-1
1) Signal from stage -2 opens gates D and H42 so that
argument can be received in argument counters,
2) Progrgjn ring cycles to stage -l.
i) Signal from stage -1 opens, gate E42 to allow the argu-
ment correct pulses to pass through to the argument
counter for units place.
2) Signal from stage -1 gates I'P through gate F47. Out-
put of gate F47 sets .argument flip-flop,
3) Progrsun ring cycles to stage 0.
TySignal from stage 0 gates CPP through gate G48. Output
of gate G48 gated through gate E47 or gate E46 by
normally negative output of transceiver's flip-flop sets
Add or Subtract flip-flop respectively,
2^ Program ring cycles to stage 1
4 + r
Signal from A or S flip-flop in the abnormal state
allows 1, 2, 2' , 4 ^-'•nd 9P to pass through certain of
the pulse gates to provide the function table with the
puXses for the functional value,
2) Progrsxn ring cycles to stage 2 unless the repeat switch
is set at 1,
1) Functional value is transmj.tted for the r^^ time.
2) Signal from stage r of the program ring passes through
point r on the repeat switch to gate 62 in the trans-
ceiver. Signal emitted by gate 62 gates CPP through
gate 68 to provide a reset signal for the transceiver
and a program output pulse,
3) The signal from gate 62 also gates a CPP through gate
C48 to provide a reset signal for flip-flops B, C, and
D46-47 and gates a CPP through gcate B48 mnd gate A48
which clears the progrsjii ring to stage -3 and the argu-
ment counters to zero.
VII -u
mitted in this addition timo is allowed to pass and thus to flip flip-flop
B46— -47 into the abnormal state. This provides a negative signal to turn
off the tubes marked Bll and B, C, ♦,, LI and thus to allow the argiiment
Input gates to set up in accordance with the number registered in the argu-
ment counters* Flip-flop B46-47 is referred to as the argument flip-flop
and its operation is correlated with the argument neon on front panel 1 (see
PX-7-305).
During the fourth addition time the argument selector gates finish
setting up. In this time, too, a signal from stage zero, opens G48 so that
the next CPP can be passed through it (at the time of the fourth CPP after
the one received by the transceiver). The pulse passed through gate G48 then
passes through gate E46 or E47 (E46 is open if the operation switch is set at a
subtract point; E47 is open if the operation switch is set at an add point) thus
(in the fifth addition time) flipping the subtract or add flip-flop respectively
into the abnormal state. The subtract and add flip-flops control the trans-
mission of the complement of a function and the function respectively (see ^
Sec, 7.4. )• These two flip-flops are correlated with the add and subtract
neons on PX-7-3O5,
In the fifth addition time the program ring is on stage 1. In this
addition time and in every subsequent one until the transceiver's flip-flop is
reset, the functional value which has been looked up is transmitted. The
stages from 1 to 9 of the program ring are correlated with the points 1-9
respectively on the repeat switch. When the program ring reaches stage r,
the number set up on the repeat switch, a signal from stage r passes through
the repeat switch and opens the transceiver's reset gate (62). This results
» ', » « 1
VII - 12
in the activation of the function table's clear circuits so that the ring is
cleared to stage -3, the argiiinent counters are cleared to zero, and the three
progra-mming flip-flops r.ientioned abvDve arc reset by the next CPP, The opening
of the reset gate also results in allowing the next CPP (i.e. the (4+t»)th after
the one that stimulated the progrem control) to pass through gate 68 and then to
reset the transceiver's flip-flop and to be transmitted as a program output
pulse ,
7.3. NIliERICAL CIRCUITS
7,3,1. Storage; Portable Function Table, Master PM Smtches, Digit Delete and
Constant Digit Switches, Subtract Pulse Switches.
The function table can be set up to store 104 entries each consisting
of 20 digits, and 2 signs. Twelve of the digits, variable from entry to entry,
are tabulated on the switches of the portable function table. The remaining 8
digits must be constant throughout the range of the argument. These are set up
on the constant digit switches. The signs may be either variable or constant.
Function output terminals A ojid B on panel 2 are each responsible for the trans-
mission of a sign, 4 constant digits, and 6 variable digits (see Table 7-2),
Whenever the function table is stimulated, information is emitted simultaneously
through both function output terminals.
The function table permits great flexibility in the way in which it
is set up and used. One sign and es nd.ny as 20 digits may sometii:ies be used
for a single function. The 2 R/I' s, one with k and the other with 20-k (where
0 £. k ^ 20) digits, can be used for 2 functions. As a m^atter of fact, more than
2 signed functions can be stored by setting up numbers zero and nine for sign
VII • 13
indication P and M respectively on switches ordinarily used for digits provided
that these switches are nc't required for digits. Of course, in cases where the
digits for a single function are transmitted through both function output ter-
minals, it may be necessary to use adaptors, shifters and/or deleters in order
to receive the functional value properly lined up in another unit.
The portable function table is arranged with 26 rows and 28 columns
of switches on each of its 2 faces. Each face, thus, has the switches for 52
entries with the 14 colurans of switches for 26 entries appearing on the left
those
half of the face and,^for the succeeding 26 entries on the right half. The sign
and 6 digits set up on the first 7 switches (at the left) are emitted over terminal
Aj the next 6 digits and sign, over terminal B (see Table 7-2). Positive function-
al values are set up with sign P and the digits for the absolute value of the
function. Negative values are set up as complements, i.e. with sign M and the
digits for the absolute value subtracted from some power of 10,
The adjective "variable" is used to describe the type of function
table discussed above in which the values of the function are set up manually
on switches and which, with changed switch settings, c? n be used for storing
different functions on different occasions. At present, one variable type is
used with each function table unit. As the need arises, portable function tables
of the fixed type in which the pattern of connections is perm.ancntly wired can be
constructed and used in pLace of the fixed type. Such a permanent table would
have the advantages of always being available for use without the necessity for
tearing down a function already set up on switches, of being less expensive to
build, and of being considerably smaller in size than the variable type.
Master m switches 1 and 2 on panel 2 (see PX- 7-303) of the function
#
Lead
TABLE 7-2
FUNCTION OUTPUT TiiKJlIKAL LEADS AND ASSOCIATED SVJITCHES
Associated Switches for Terminal A
associated Switches for Terminal B
m
Master M'Siaitch 1 and Portable Function Table
Switch in Column 1
■'{aster PM Switch 2 and Portable Function Table Switch
in Column 14
10
Constant Digit and Di,g;it Delete Switches a4
Constant Digit and Digit Delete Switches
Constant Digit and Digit Delete Switches A3 j Constant Digit and Digit Delete Switches
Constant Digit and Digit Delete Switches
; 8 Constant Digit and Digit Delete Switches A2
i ■
p .7 ' Constant Digit and Digit Delete Switches a.1 I Constant Digit and Digit Delete Switches
Switch in Column 2
I! Switch in Column 8
5 : Portable Function Table j Subtract Pulse Switch a9 *i Portable Function Table
I Switch in Column 3
'' S/vitch in Column 9
I 4 i Portable Function Table j Subtract Pulse Switch k8 ;j Portable Furiction Table
I :, ^v.-itch in Column 4 j j S.^dtch in Column 10
3 ! Portable Function Table i Subtract Pulse Switch xt7T Portable Function Table
Subtract Pulse Switch
Subtract Pulse Switch
Subtract Pulse Switch
' Switch in Column 5
;; S^jitch in Column 11
Switch in Column 6
Svfitch in Column 12
1 lEortablc. Function Table ; Subtract Pulse Switch a5 j- Portable Function Table {Subtract Pulse Switch
! Switch in Column 7 [ I S.vitch in Column 13 •
B4
B3
B2
Bl
i 6 ; Portable Function Table | Subtract Pulse Switch i^lOy Portable Function Table ' Subtract Pulse Switch BIO
B9
B7
Portable Function Table ; Subtract Pulse Smtch i--6 ji Portable Function Table I Subtract Pulse Switch ~B^
B5
M
M
VII - 15
table are associated with the PM leads jf terminals h and B respectively.
These switches have the positions P, M, and Tf'ble. If the sign to be emitted
over one of the terminals is constant throughout the range of the table, this
constant sign nay be set up on the associated master PM switch instead of on
the 104 PM switches of the portable function table. For a sign varying from
entry to entry however, the appropriate sign is tabulated in the PM column of
the portable function table with each entry and the corresponding master PM
switch is set at Table,
For each of the 8 decade places which can be filled with a constant
digit, there is a digit delete switch with the positions "delete" and "on" and
an associated constant digit vswitch with tlie positions 0, 1, .,., 9, Hvll, and
FM2. (See Table 7-2 for the decade plo,ce le-ds associated with these switches.)
With a digit delete switch set at delete, no pulses are transmitted
over the decade place lead associated with the delete switch. With a delete
switch sot at :;n o.nd the assocd.ated digit switch at d (where 0 ^d < 9), d or
9-d pulses are transmitted over the correlated decade place lead according as
additive or subtractive transmission respectively takes place. iVith a digit
delete switch set at 'bn"and the associated con.-stant digit switch set at PLIl
or PM2 the sign pulses emitted respectively over the sign lead '^f the A or B
function output terminals are duplicated on the correlated decade place lead,
/.whether the pulses emtted over the sign lead are those specified on a portable
function table Bi switch or on the mi'Ster PM switch.
Vifhen the function output of a terminal is to bo received in an accu-
mulator with the variable digits in decade places at the right and with no other
information provided for b (where 1 "^ b <^ 4) dec--de places at the left (such as
VII - 16
constant digits or digits frori ^mother function output terminals), and when some
or all function values emitted iiioy be negotii'e, the HIl or PM2 setting of b of the
constc.nt digit switch provides a means of filling these decade plo,ces at the
left "with the nines needed to represent a negative number. If all entries
associ?.ted with a function output terminal are tabul'ited as either positive or
negative numbers (i.e. with the master Bi switch set at P or M), the same end
may be f chievcd by setting b const' nt digit switches at 0 or at 9 respectively,
(See Table 7..-3 which follows the discussion of the subtract pulse switches).
The digit delete switch correlated with a decade place lead is set
at delete when it is desired to leave ::. decade place completely blimk as is re-
quired, for ox£-mple, if a vari:.-ble digit from another function output terminal
is to be inserted in tha.t ploce ,
The subtract pulse switches h and B 5-10 h"ve the positions 0 and S.
If a subtract pulse switch is set at S when subtractive transmission takes
place (see Sec, 7.3.3.), the I'P is emitted over the decade place lead associated
with the switch (see Table 7-2) to make a 10* s instead of a 9's complement.
Complements with respect t:.^ 9 are emitted in the decade j.)lace leads associated
with subtract pulse switches which are set at 0 (see Sec, 7,3.3.). In the usual
applic.^ti-)ns of th^-j function table, st most one of tho A and/or one of the B
subtract pulse switches would be set r't S. There is, however, nothing in the
design of this unit to preclude setting a greater number of these switches at
S if the operator so desires,
7.3.2. Input to the portable Function Table:, i^rgiiment Counters and Table Input
Gates,
During the second addition time of a program, the argument is received
VII - 17
TABLE 7-3
ILLUSTR..TIONS OF THE USE OF SVffTCFES ON PiUJEL 2 OF TM FUNCTION TABLE
LINE ""
SETTING OF ?ORTi.B.LE FUNCTION T..BLE SVaTCHES
X
P 123 000 795 642 M
i X + 1 , M 764 000 421 508 M
EX>liPLE 1
Setting of Constant Digit Switchesl G'lll Digit Delete Switches set at "0IV^1 I
kU at PMl
A3 at R/Il
h2 'it BAl
iil at 3
B4 at B/I2
B3 at B'i2
B2 at PM2
Bl at P>vI2
Subtract Pulse Switches: n8 at S B5 at S (all others at 0)
Transnit
Add ,
Add.
Sub,
Sub,
For
Argu'nent
X
x+1
X
x+1
Number Emitted
Over Terminal h
P 0 003 123 000
i 9 993 7b4 000
M 9 996 877 999
P 6 606 23t> 999
Over Terminal B
M 9 999795 642
M 9 999 421 508
I Q QQO ,204 35A
p"q 000"578"~492
EX^^IPLE 2
Setting of Constant Digit Switches:
.13 at 0
a2 at 0
a1 at 0
B4 at 9
B3 at 9
B2 at 9
Bl at 9
Digit Delete Switch .v4 set et "Delete" (all others set at "On").
All Subtract Pulse Switches set at 0.
Transmit
Add.
/idd .
Sub,
Sub.
For
_nrgument_
Number Emitted
H-
Over Terminal a
Civer Teniiinal B
x+1
P 0 OOP 123 000
M 0 000 764 000
\ M 9 999 795642
x+1
J2_ lio 999.876
T 1^ 0 999 235"
I^ 9 999 /t.21 508
999
) 999 235 999
P 0 OOP 204 357
P 0 OOC 578 491
VII - 18
in the function table's argument counters through the argument input terminal
on front panel t. This terminal is so -wired that UNITS :.ND TENS PUCE OF THE
fiRGWvIENT }.IUST BE RECEIVED IN THE FUNCTION Ti.BLE ON THE LK.DS FOR Tffi DEC..DE
PLACES 1 ANT) 2 RESPECTIVELY, This nay be provided for by placing a shifter at
the argument input terminal if arguments delivered to the function table will
always require shifting the same number of places or, if at various tiries there
will be different shifting requirements, by placing shifters at the argument
accumulator's digit input terminals. The units and tens argument neons on
front panel 1 are correlated with the stages of the argument counters as indi-
cated on PX-7-305.
In the third addition time, the argument stored in the ar§|\iment
counters is corrected by f r ^m 0 to 4 pulses chosen from the 1, 2, and 2» pulses
in accordance with the operation switch setting. The ar.gument counters are so
connected to the ar-^nimont or table input gates that if x is the number registered
in the ancient counters, the table input gate for argument x-2 sets up (during
the set up period from the middle of the third tiddition time through the foxirth).
Therefore, if the operatic-n switch is set at -^2 no correction pulses are added
to the argument counters; if the operation switch is set at -1, one pulse is
added, to the number set up in the argument counters, etc.
The table input gctos consist of 10/| gates (each connected to a line
of the portable function table corresponding to a value of the argument between
-2 and lOl). Each table input gate his as one of its inputs a signal from a
stage 01 the units arguinent counter and as its other input a signal from a stage
of the tens counter. ViOien the argument counters receive the argument a from the
argument accur.ulator m6 the operation switch o^f the control which has been
■^^The argument inout terminal on the function table, like the digit terminals
on accumulators, has 12 points. Only the leads for units and tens place,
however, are operative.
VII - 19
stlTiulated is set at i (i = -2, -1, .,,, +2), table input g.^te a + i emits a
signal to line a + i of the portable function table,
7.3.3i Function Output
The functional values transEiitted from the n and B output terniinals
on panel 2 are compounded out of the 1, 2, 2', 4, and 9P. These pulses are
admitted to the function table through the 1, 2, 2« , 4, and 9P gates. The
pulses passed through these gates are delivered to the table output gates, the
constant digit switches, and the ms'ster H/I switches. The gates and switches
mentioned above allow appropriate numbers of pulses to reach the .v and B out-
put circuits which include standard transmitters (see PX-7-304) ^-nd the digit
output terminals on front panel 2.
7.3.3.1. Transmission of Information Stored on Portable Function Table Switches,
Associated with each of the 12 digit columns of the portable function
table is a colur.in" of table output gates for digits. Each of these columns has
10 gates, one for each digit from zero to 9 inclusive, .v pair of m table out-
put gates, one fr.r sign ? and one for sign M, is associated with each of the 2
sign columns.
One input to the table output g-:tes for digits comes from the circuits
containing the 1, 2, 2', 4, '^nd 9P gates. These 1-tter gates are so controlled
by the add. and sub. flip-flops (see Sec, 7.2.) and so connected to the table out-
put gates that when additive transmission takes place (-md the add. flip-flop is,
thus, in the abnormal state), d pulses reach the table output gates correspond-
ing to digit dj when subtractive transmission takes place (and the sub. flip-flop
^The block diagram ^f the function table shows the table output gates rotated hy
90'' from their actual position in the function table where they are arranged in
rows. Refer to the cross section diagrsim for the position in the function table
itself.
VII - 20
is, thus, in the abnormal state), 9-d pulses reach the table output gates cor-
responding to digit d.
The signal from the tabic input gate corresponding to argument a+i,
routed through the 12 digit switches on line a+i, holds open the table c^utput
gates corresponding to the digits set up on the lino so that the pulses delivered
to these gates from the 1, 2, 2', U, ^^n^ 9P gates can pass through.
The transmission of sign indication stored in the sign columns of the
portable function table is accomplished similarly. The table output gate con-
nected to point P on the sign switches receives 0 or 9 pulses from the 9P gate
and the output gate connected to point M receives 9 or 0 pulses from the 9P
gate according as the add or subtract flip-flop is in the abnormal state. The
pulses passed by one of the prdr of table output gates for sign are routed
through "Table" on the associated master Bi switch to be emitted 3ver one of
the Kvl leads.
With a master PM switch set at P or M (instead of table) the sign
pulses emitted by one •)f the table output gates for sign cannot reach the out-
put circuit. The transmission of a constant sign set up on one of the master
m switches takes place in the following manner: The same number of pulses ^
are delivered to the points P and !i respectively on the master PM switches as
are delivered to the table output gates associ-^ted with digits 0 and 9^ Thus,
if a master PM switch is set at P, zero or nine pulses are passed through this
switch to the associated function output terminal's PM lead according as addi-
tive or subtractive transmission takes place. The case where a master PlI switch
is set at M is taken cEre of similarly.
:;•-, ; • ■/ J
VII - 21
7.3*3.2. Transmission of Information Stored on Constant Disgit Switches,
The 1, 2, 2' j 4> and 9P gates deliver d pulses (in additive transmission)
or 9~d pulses (in subtractive transmission) to the point d (v/here 0 ^d ^9) on a
constant digit switch. Thus, if one of these switches is set at d, d of 9-d pulses
pass through it, then through the correlated digit delete switfch to the associated
decade place lead of a function output terminal;
The points PMl and PM2 receive the pulses passed by master BI switches
1 and 2 respectively. In this way, a constant digit switch allows the same num-
ber of pulses as are transmitted over one of the PM leads to reach the decade
place lead associated with the constant digit switch.
If a digit delete switch is set at "delete", the circuit from the cor-
related constant digit switch to the associated decade place lead is interrupted
so that the pulses which arrive at the constant digit switch from the 1, 2, 2' , 4,
and 9P gates or from the master FM switch cannot reach the function output ter-
minals ,
7,3.3.3. Role of the Subtract Pulse Switches
The subtract flip-flop controls the gates A' and B» 64 so that these
gates open to pass the I'P when subtractive transmission takes place. The out-
put of gates A' and B' 64 is routed through the subtract pulse switches set at S
to the associated decade place leads of the function output terminals.
7,4. STORAGE OF PROGRAlvE-IING DATA BY !IEi\NS OF THE FUNCTION TABLE
VJhen only a part of a total function table storage capacity (3744
variable digits and 624 variable signs for the 3 function tables) is required for
1ft the tabulation of numerical data, the remaining storage capacity can be used as
•'
VII - 22
memory for programming instructions. This can be done either with a function
table operating in the same way as described in Sec. 7.3. when numerical functions
are stored and transmitted or, more conveniently, with a small change in the
circuits containing the 1, 2, 2', 4, -^nd 9P gates.
First, let us consider the use of the unmodified function table for
programming memory. Suppose there are, say, 14 different programs (P-j^ - P-j^)
one or more of which are to be stimulated at various times in a computation.
We could then assign one column on a portable function table to each of the 14
programs and assign one line of the porta.ble function table to each occasion
on which it is necessary to make a choice as to wliich of the 14 programs is or
are to be stimulated. Then the switches on a given line of the portable function
table are set at P or 0 in the columns corresponding to programs which are not
to be stimulated and at M or a number different from zero in the columns corres-
ponding to programs which are to be stimulated. An accumulator is set aside to
store the argument for the function table.
Now, when choice of program is required, a program pulse is sent to a
function table program control set up for additive transmission. In the fifth
addition time following the program input pulse, digit pulses are emitted over
function output terminals in the decade place leads corresponding to switch
settings different from P or zero. At the end of the fifth addition time a
program output pulse is emJ-tted. The digit pulses are taken through adaptors
and
at the function output terminals to lines in program trays^hen to dummy programs
for conversion to program pulses. The prograra output pulses of the dummy programs
«.re taken to the program controls on which are set up those of the 14 programs
which are to be stimulated (see Fig. 7-1). The function table's program output
1 I i
px- 7- Si
Argument
Switcli ■lettin.rs on ?ortul3le Fxinction Tcible
?,©fer to Pro^rwn
Interpretation
t^. r: p p p p r>
a -C -3 ^4 -5 '6 * 7
^8 'S 'IC 'll 'ivi 13
'14
^o
, L-: c 0 0 0 0 0
0 0 0 C 0 0
_
i
-1
M 9 0 0 0 0 0
0 0 0 0 0 0
r
otiKuIate pro:;rai:.s I ^ ^'
I'i • 2
0
etc.
F 0 > '} 0 ^' 0
0 0 0 0 C 0
1-:
's '-^'^
0 ri4
- .JiaUMSNT AGCUi-iULAT OR
Pick up the
: TO gra^i pulse
to stimulate
uroKrani chci3i"
^ V. > • > J. J. >J. 4 A ^XL/ jLjiu
TTa.'i£.;iit
udditivel"
■or argument
r — TTTTTr
■^-frt
Id apt or
-.duf tpr
/
A and D Function
Cut^^'Ut Terr.iiriai
These iines ouri-: .-i.ri.t pulises
"A
.^
^
f t
<^
3(?.:)
P retrain
t
"l4
3(6)
7
Dummy .
Pro {3* am
3(5;
Cunany
Profqram
3(4}
~7^
'ro^^rQJii
T3
'10
s(3;
i rogram
prc-rcxi
T"
DuEsny
-TO fir a:.
13
-J
A(PLi)
r"
^1
A{€)
T~
Pro Tail
;.:5)
Ft O: Tarn
-A(3:
Fro To:
!
''6
( IJ
^
Fic'-.ire V-l
VII - 23
pulse can be token to a program control of the accumulator containing the
argument which is set-up for a "receive -C" program in order to increase the
value of the argument by one.
In the exsjiiple shown on Fig. 7-1, f.ll 14 columns of switches on a
program table are devoted to the storage of prograraming information. With the
function table in its unmodified form, however, there is no reason why some of
the columns cannot be used for numerical data and others for programming data
(see Sec. 7.5.3.),
The disadvantage inherent in using the function table in its unmodified
form to store progrsimming information is the necessity for expending dumriiy pro-
grams to convert the digit pulses anitted from the function output terminals into
program pulses (see Sec. 4.5.2,). V«ith only a small emount of labor the function
table can be adapted so that program pulses are transmitted from the function
output terminals instead of digit pulses. The simplest way to make this change
is to disconnect the 9P gates (B' and L'4) from the line in the synchronizing
trunk which carries the 9P and to connect these gates, instead, to the line
which carries thy CPP. This nay be done by means of an adaptor at the point
where the synchronizing cable plugs into the back of p^anel 2, No wiring changes
are necessary. The required adaptor is shown on PX-4-119. If this change is
made, when the function table transmits additively, a CPP is emitted over the
decade place leads corresponding to portable function table (or even constant
digit switches) set at either M or 9. Notice, these CPP are emitted from the
function table at the end of the fifth addition time. As always, no pulse of
any kind is emitted over a decade place lead whose corresponding switch is set
at P or 0, In this way, the necessity for converting digit pulses into program
VII - 24
pulses is obviated. The pulses emitted from the function output terminals can
be taken directly to the program controls on which are set up the various pro-
gr3jns among which a choice is made.
It should be noted that a numerical function cejnnot be set-up along-
side of programming data on a given portable function table vvhen this modification
is made unless the function is pathologic to the extent ths,t its tabulated values
never have the digit 9 or sign M,
The use of a modified function table to store programming information
is illustrated in the problem described in Sec. 8,7.
In connection with this discussion of the role of the function table
as programroing memory, mention might also be made of the fact that the function
table's progran controls provide a convenient way of delaying a program pulse
from 5 to 13 addition times. This use of the function table is also involved
in the illustrative problem of Sec, 8,7.
7.5. ILLUSTRATIVE EXaMPLSS OF TIffi USE OF THE FUNCTION TABLE IN INTERPOLATION
The function tables have been designed so as to make them particularly
well suited for interpolation. One or more function tables or parts of them can
be used to store the values of a function. The coefficients of the various terms
of the interpolation formula used may either bo stored in a function table or may
be generated as needed by means of accmiulators and the high speed multiplier.
Various types of interpolation formulas can be employed with ease. There seems,
however, to be a small advantage in using the Lagrangian formulas which involve
functional values rather than formulas which involve differences since a pair
of accumulators must always be tied up to find a difference unless storage space
4 '~4|j^ - - *A4gfai .^0
-Jl^*' ■■ - *-*>^^ ~!t^
/"
Argument input terminal
Punct ion output terminals
Accumultttor Clear Switch 1
set at "0«
Accumulator Clear Sv/itch 2
set at niC'?
Acounulator Clear S?/-itchnS"
set at "C
Operation Switch Setting
Repeat Switch Setting
Add. times in \vhich the
program cooitrol is used
C output terminal
L- lie output terminal
Settings of master PM sv/itches
1 and 2 (from left to right)
Digit Delete Sivitch A4 set at "On"
Setting of Constant Digit S?/itch
A4
Digit Delete Switch B3 set at
^Delete"
Subtract Pulse Switch A9 set at "0"
Subtract Pulse Switch B5 sot at "S*
Figure 7-g
SETUUF BIAORA^ COIIVOJTICIJS FOR THE PUTJCTIOH TABLE
VII - 25
in the function table is used for the tabulation of differences.
In set-up tables, the following syrabols are used for the function
table;.
1) On the first level i-j refers to the program input pulse,
and (k) to the program control number,
2) On the second level,
1st symbol (A or S) followed by a signed number (-2, WL, ...,
or ■♦•2) is the operation switch setting,
2nd symbol (C, NC, or 0) is ar.^'iument clear switch setting.
3rd symbol (l, 2, ,,., or 9) is repeat switch setting,
3) On the third level, at the right of the yjrrow tip i-j refers to
the program output pulse,
ViFhen the function table is used for the storage of programming information, the
connections from the decade piece leads of the function output terminals to pro-
gram lines are noted along the arrow from the second to the third level.
Thus, the symbol
4-3 ©
A-2 NC 1
B(PM) to 7-8
i
4-4
is interpreted as follows: The program pulse carried on lines 4-3 stimulates
program control 5 so that tho function table transmits f.(a-2) once. The NC
pulse stimulates transmission of the argument, Progran control 5 emits a pro-
gram output pulse to line 4-4. The output of the PM lead of function output
terminal B is taken through an adaptor to progrcun line 7-S»
Figure 7-2 shows the conventions used for the function table in set-up
diagrams ,
^
--*-4-
im
CD
ij
D
flCCUMULATOC
rTT-rm
- ^ ^-. v^ ^_. '.. - .' \.-.
rjp
T3
■Dl
D
a
0 o e e
ACCUMULATOC
NO. r
rrrnTrnrq'^
D I Ud
nrrc
^ -r^
c
cc
e o o o
D
D
D
ACCUWUTOC
N0.6
■ ^ ■ ^"
r
r
r^
ucn-v
"a
D
D
n
o ^ « o
^
4
D
qqqg|ft>
/a r
TTCTTJ
^
"0
Ui-^l
CTir
• o « o • c •
^% ^S
1l<i|iililiiiMiii«nii I III II liiii— liNM—,,
Fig. 7«$ (a)
iiuadratic i-a^aagian Interpolation - 3<»t-.Up Diagram
'n-
-^ —
□
0
ACCUMULATOR
NO. to
n
n
T-T^X'T^
xy
t:
u
c
3q
n
a
ii
0 »u • '#».•• m
MULTIPLIER
PANEL \
O
il.
^
^
%
^
^
e'^t^'ct:^
^
Of
o
b
4r
.i(:
c
,->
0
?
1 II 'J
■-''■-•
/r t^ *ft fTY*'^!"* '*'
• • • •
.MULTiPLItC
PANQ. Z
9 IP n It 13 I* '5 lb
era
t:
fcf&t
DC
oq
CrTT]
era
— » ■ »
W^-* MM.M M^iM II ■ I ■ I
m^mm __a _•_• Bn_ . ■ ii ■>»■
o« o« »• <>• o« 'jm 9* o*
m
MULTIPLIEC ni
PANEL 3 l—l-J
17 i6
i f 1 r
n
l9 ec Zl 312.5:5 24
r
era
e"C"C
era
z
era
e-e
a
e
— — — -—
IMIIM ' III! nil IMi ■»■!<»> aHiMI
6^
6 \/0
f-^-4
f 4.\ S
Fig. 7«^ <b)
Quadratic Lagrangian Intorpolation • 3©t«.0p Diagram
xrf-
Trn — r
m
/ iy' /^ P
ACCUMULATOR
MO. I I
-■/
m^\ja~.
rr
c
^^1
c
A
crTTi
m
0
D
n
• e •
m
D
Q
ftCCUMUUrOB
NO.U
qrrrT
' T^ TTF^
Qd
n
• o e «
O VO •« •« CO •• • o • • •
CD
NO* 13
^~,rt
TCT
cr
c
0D
Td
9 ^ f •
■/" Mff
Dm
D
D
ACCOMUmTOP
NO. I 4
crc
" T?
c
c
c
■< T^Tl/'l
dS
ca
n
• • • o
/f* 03 fiC
rig. 7.*3 (a)
Quadratic Ijagransiao Interpolation - :jet-Up Diagram
•^
■■■■^aiaiaitoaai**
■|Miii«iB>MaHaM>
# »
TT
-«^-#-
■#»^
I ' <■
:T
"t— !-
□
m
ACCUWLATOC
H^ rcrcpTq
Q
4-
''T''
c
»-•
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D
f O e • .
^# 9 ♦• •» »• VO •• • 9
: ! 1
!'■' r <t
4t
ICD
0
i
ACCUNUUrOC
NO* 16
MX) 7«^ "T"*-^ 7^ 7w
■-^ .^-'"
r
<"?^':
c
00
n
?!•?
■?!
iff
f f • '
— M-
4 'ft ' '■
^ 5 i
• a • • •
-t— 1-
4
CD
D
M:unuuTti6
no.it
srr
■< T" T" T*
4
^"^/^
qcjqg
c
/?
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C"^
a
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Z 34
T3I
0
D
mm
2r
^ ? ^ t
9 «•••!•# *? 4^ •«•••
F
iJ!4 151
7 fi fO
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D
t
era
/4
cc
c
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en
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f f •
O 90 •
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IS
V
r
Pis. 7-3 (a)
t^uadratic Lagrangiaa Interpoiation
Gtjt-.tJ*> Diagrian
Oj
FUNCTION TABLE
e
c ^
4ft
4-/
0
f
/
/
i
; /
7,;v
/^,Ji^
6
0
0
c
0
0
1 1
< •! r •! a! •
FUNCriOW TIBLL
PflMfeL 2
^"^
S"^"^"^
p^-
r
5
" "1
—I
1
1
,NCl
t I
NC
Z 4.1 ^1 71
4- i^ -7 iO
2. r
1
2)
!T
i ;
;:i'
4 — t-
:^ig. 7*.3 (©)
ittadratle I^graiiSan Interpolation — ^t-Up Biagram
VII - 26
7»5.1« Quadratic Lagrangian Interpolation
In the following pages a set-up for quadratic Lagrangian interpolation
for equal intervals is suggested. The interpolation formula is given by
f (x) « Z- C^^)(x2,X3,x, ) .f. (xo,xi)
i=-l,0,l ^ ^ ^
4
where ^ , .
X = /il- xj '10 "^ and 0 <: X <99
3=0
and where
fi (xq, x^) . f . (x^, x^ * i)
4
Even though it is cumbersome, the notation x * / x j
j=0
• 10^-^
is employed because it is useful in indicating the shifters and deleters
required in certain phases of the problem.
The computation is described with the aid of Table 7-4, in which the
set-up of the units involved is formulated, and Figure 7-3* which shows how to
set up the units to carry out the instructions given in Table 7-4»
The values of C and C^-^^ are stored in function table 2 in such a
way that the former are emitted over the lines for decade places 1-6 of terminal
A and the latter, over the lines for decade places 1-6 of terminal B, These
coefficients are stored at intervals of 0.01 for X2 • 10 -^ ♦ x-, , 10 starting
with zero and ending with 1,00, Linear interpolation is used to find C (x2,Xo>x,)t
The symbols C , C^\ , and Ac "^ will be used as follows:
(i) (i)
Cq *C (x2,x^,0)
(i) (i)
Ci *C (X2, X3+l,0)
(i) (i) (i)
Ac "C^ - Co
VII - 27
Thus, (I ^^ Xq>x. ) is given by the formula
^2' ^3"^U
(i) ..,
. (i) ^^)
(-1)
C has not been tabulated in a function table since it can be found
readily from the relationship
c^-^ « 1 - X c^i)
i«o,r
Ao) (1) (-1)
C and C , rather than a pair including C were chosen for tabulation
on the portable function table to save a small 9jnount of tabulation labor,
(0)
For the range zero to one inclusive of the independent variable, C and
(1)
C , are both positive and have zero and one as their minimum and maximum
values. Therefore, sign indication need not be tabulated with each entry
but may, instead, be handled by setting the master PM svyitches to P. The co-
efficient C ' has as its maximum value on this range of the argument, zero,
and, as its minimum -0,12500. Were C tabulated, all entries would have to
carry sign indication (and the master PM switch would be set to Table) in spite
of the fact that the only non-negative functional entry is zero corresponding
to argument zero. It might at first appear that zero could be tabulated as
M 0 000 000 000, but if we recall that M 0 000 000 000 actually represents
10 -»• P 0 000 000 000 it can be seen that this procedure would be incorrect,
C^ ^ and C^ '', then, are tabulated on the portable function table
associated with function table 2 on sides A and B respectively,' Six decade
places are used for each coefficient with the iinits place digit tabulated in
gLj coluiun for decade place 6 and the various decimal places (tenths place, etc.)
occ'ip3r!-ng thj remaining decade places, 5 through 1, The digit delete switches
r.l' - Al and 34 - Bl are set to "delete" since there are no digits constant through-
VII - 28
out the range of the argument for either C^ ' or C^ ) . Since the coefficients
C^''"'' find their way ultimately to the multiplier, it is desirable to have them
located as far to the left as possible. The digit output of function table 2
is, therefore, shifted four places to the left before its reception in an
accumulator. The shifter is designated by the number 4 in a box denoting a
digit input terminal on Figure 7-3.
The function f (x) is tabulated on the portable function table associated
with function table 3. It is assumed, here, that only 6 variable digits are
tabulated for this function and that these occupy the switches for decade places
1-6, Since fi (i= -1, 0, l) too, enters into multiplications, the function out-
put of function table 3 is also shifted 4 places to the left before its reception
in the ier accumulator.
Accumulator 18 serves as the argument accumulator for both function
tables . This set-up assumes that x is stored in this accumulator so that Xq
occupies the fifth decade place, A -1 shifter (which shifts a number one place
to the right) is used at the argument input terminal of function table 2 to
place X2 and X3 respectively in decade places 2 and 1 of the input and a -3
shifter is used at the argument input terminal of function table 3 to place x^
and x-|_ respectively in the proper decade lines of this input.
Detailed descriptions of the programs involved in the interpolation
are given in Table 7-4, We wish, however, to call attention to the procedure
uf^ed for stimulating the reception in an ftccumulator of functional values trans-
mitted by the function table. Consider, for example, the programs involved in
looking up -C' c In addition time 12, program pulse 1-6 stimulates function
(0)
t-ble 2 to look up -C q , Accumulator 17 is to receive this functional value
when it is emitted during addition time 16, To provide for this reception, we
VII - 29
take advantage of the fact that another program cointnences at the same time
thst functj-on table 2 Is stl-nulated, the program in which accumulator 17 trans-
mits i.cy contents to tie iiiuli:>ipiier„ Even though only 1 transmission is re-
quired, the repeat s-.dtch on ocrcrol 5 of accumulator 17 is set at 4 so that
at the end c^f cdu.?-uLon tine ly there will be a program pulse available to
(C)
stLnulate the rer-cpcion of -O'q r, This procedure saves the use of a special
dummy program to clelpy a pulse until addition time 16.
The use of the high-speed multiplier in this computation is also
-worthy of note. Du:cing addition times 12 through 17 and 22 through 27 the
miiltiplier is occupied in forming products required in the linear interpolation
for C '' and C^^^ respectively. For each of these multiplications, the signifi-
cant figures switch is set at 6^ In view of the accuracy of the ier and icand
and their positions in the ier and icand accumulators, the last significant
figure of the product occurs in the eighth place from the left. These products,
however^ are added to numbers stored in either accumulator l6 or 15 which have
their last significant figure 6 places from the left. The products referred
to above are, therefore, rounded off to 6 significant figures and passed through
deleters which delete decade lines 1-4 (counting units decade as 1) before re-
ception in accumulator l6 or 15. This deleter is designated by d 1-4. Thus,
(1) (0)
by addition times 18 and 28 respectively, C and C appear m accumulators
16 and 15 respectively correct to 5 significant figures with the last significant
figtre .appearing in decade 5 (from the right).
(i)
The products f . . C (for i = 1, 0, -1) are formed during addition
liaiet 28-3;, 38-47, and 48-57 respectively and are retained in accumulator 12
."or collection to form f(x). Since the coefficients C '^ will in general not
exceed 5 significant figures, these products, too, will have no more than 5
significant figures with the last significant figure appearing in the sixth
^^
X.:.
YII - 30
decade place from the left due to the positions of the ier and icand. Only the
(1)
program in which f j_ • C is formed, calls for round off to 6 figures, however,
since the addition of five pulses in decade place 3 is required only once to
produce the correctly rounded off sum ©f 3 products. For the other two multi-
plications fo . d*^^ and f__^ . G^'-^K The significant figures switch is set at "off".
It might be of interest to the operator to notice that of the 57
addition times required to carry out this quadratic Lagrangian interpolation
routine, all but 15 are used for multiplications. In general, the principle
that the number of multiplications involved in a computation determines approx-
imately the duration of the cemputation is a reliable ©ne,
7«5.2, Biquadratic Lagrangian Interpolation
Biquadratic Lagrangian interpolation can be carried out in a fashion
similar to that described above for quadratic Lagrangian interf5»lati^n with a
few minor alterations. The formula for biquadratic interpolation is
f(x) =Zc^i\x^, X , X ) . f . (xq, x^)
i—2, .? -^ ^
Here, as in the quadratic interpolation, one of the coefficients need not be
tabulated since
X (i)
i=-2
The four coefficients needed may, as a matter of fact, be tabulated
on ©ne" portiible function table to permit interpolation for C^''''^(x , x , x )
2 3 4
f-This asstomes that six decimal places for these coefficients will provide the
required accuracy. If greater accuracy is required it is probably preferable
to generate the coefficients rather than use up two function tables for storing
them.
'• ■■./
VII - 31
from a tabulation of C (x2 xo ©) since the C need be tabulated only for
0 <Xp . lO""^ + X3 , lO'"^ ^ , 51 . For 0.5 <; XgvlO""^ + x^ .10~''< 1,
f(x) -.nay be computed by backward interpolsition using the formula
XL XL 1^
4'
f(x) = 2_ O^^^iyih X' X') f. (x^ x_ +1)
where
x' . 10~ + x^ . 10"^ + x' . 10"^ = 1 - (x^ . 10"^ + x^ . 10"" + x^ . 10 )
If the coefficients chosen for the tabulation are C (for i = -2, -1,
1, 2), they may be set up on the portable function table as shown in Table 7-5,
To produce Cq and C^ for i = -2 -oi* 2 the function table operation
switches must be set at -2 and -1 respectively. Before C and 6 , for i = 1
or -1, can be looked up, the argument (x , x ), or (x^^, x') if backward inter-
to '^ ^ ^ ^
polation is used, must be corrected (x +5 ^ x ) or(x' +5, x'). The Operation
switches used in the prograjns of looking up C and C^'^'^, for i = 1 or -1,
must be set at zero and 1 resp^^ctlvely.
If the suggested method of tabulating the interpolation coefficients
and of carrying out the interpolation is followed, obviously two alternative
interpolation routines, a forward and a backward routine, must be set-up.
The forward interpolation routine differs from the routine for
quadratic Lagrangian interpolation only in that there are two additional product
terms f^ . C^''^'^ to be formed. The backward interpolation routine must cover the
use of the backward interpolation formula, the correction of the argument
(x , x-j^) to (x , X, +1) and the correction of the argument (x^, x„, x^) to
I^^M^S
VII - 32
TABLE 7-5
TABULATION OF BIQUADRATIC LAGRANGIAN INTERPOLATION COEFFICIENTS ON THE
PORTABLE FUNCTION TABLE
i
Arg.
A OUTPUT
B OUTPUT
Master PM switch 1 set at P»
Master PM switch 2 set at Table.
Decade places 1-6 used as shown
B/I place and decade places 1-6 used
below ,
as shown below »
-2
-1
C Coo) = .000 000
•
C^^^.00) = + .000 000
•
•
•
•
•
0 <C^^^023 lai
•
•
•
(2) .
- .039 464 ^c' \ 0
•
•
49
(-2) '.
C (51)= .023 427
V
(2) \
C C51) = - .039 464
50
(1)
C C00)= .000 000
(-1)
^ C Coo) = + .000 000
51
•
•
0
•
•
•
•
(1)
O^C < .480 016
•
- .155 767,<C^'^^^0 ■
101
f
(1) '
C C51) = .480 016
(-1)
C (.51) •= - .155 767
^■B
VII - 33
t t «
(xp, x^; X ) , The criterion for which routine is to be followed is a magnitude
discrimination program to determine whether ^C^ o^ x^>5« In the former
case, the forwa,rd interpolation routing is followed; in the latter case, the
backward interpolation routine is used.
The disadvantage of the method suggested above for biquadratic
Langrangian interpolation is that it requires a backward as well as a forward
routine. This disadvantage is eliminated in an alternative method to be
described below.
For the purpose of this discussion, we will abandon the notation
used above and in section 7.5.2. Instead, x v;ill be considered as x » n + h
where n is the integer closest to x and where -,5^h^ ,5. The niomber n, thus,
is an integer between 0 and 99 inclusive. In this notation f(x) is given by
2 2
I— ^%i) , f.{n) or 2_ C \h) , f (n+i)
i=-2 i=~2
To find n, the round off facilities of some accumulator are used
and the number x + 0,5 is formed. Then n is the tens and units digits of x + 0.5.
Now, the number x + 0.5 or n + k where k * h + 0,5 is stored in some accumulator.
Instead of tabulating coefficients C (h) then, consider tabulating
B^^^(k) = C^^\h) for the range 0 ^ k < 1, where the coefficients B^ (k)=C^^^
k)
have the following useful properties:
1) Z — B^^(k) = 1 and 2) B (k) = B (1-k)
i=-2
Vfe can then tabulate B^'^(k) for 0 -^k 4.1 for two values of i. By property 2 above,
B^^^(k) for two other values of i can be found, and the fifth value of B can be
found by property 1,
^t^^a^^m^^B
VII - 34
7.5.3« The Dra^ Function of the Exterior Ballistics Equations
When the ENIAC is used for the computation of firing tables, the
problem of tabulating the drag function (G) used in the exterior ballistics
equations is likely to reqiiire considerable thought due to the behavior of
this function in the region of the velocity of sound. It would appear that
2
the drag function had best be tabulated a.gainst v as is done for hand computa-
tion of trajectories to avoid the necessity for extracting square roots. It
will also be necessary to use more than one portable function (or more than
part of one portable function table) to list the vedues of the dr-ag function
sine© one portable function table will certainly have to be devoted to the
values of G in the neighborhood of the velocity of sound, G before and after
sound may be tabulated on one or tvv-o portable function tables depending on
which G function is used and the accuracy requirements of the computation.
To determine what transformation to make on v^, which function table
to enter, and possibly, even which interpolation routine to follow, it will then
be necessary to carry out a magnitude discrimination program on v similar to
the one used on y« in the printing discrimination sequence of problem 2 in
Chapter X (Master Programmer) .
An alternative and, probably, simpler method of determining which
function table to enter for a given value of the argument can be used if this
information is stored on portable function table switches not required for the
tabulation of G. One column of a portable function table is required for each
function table or portion of a function table used in tabulating G,
Here a preliminary transformation of variable which maps the entire
range of the argument onto the interval 0 and 99 is made. The portable function
to-ble which stores program data is entered with this argument. The function out-
^^
1
p/- 7-c^oa
f)f^G.
3-r "' — ,' Ol'*
;;%, , . ,
' 1 i*'--i j .. >!.. >J- J.£? ^
A(Ffl}^(6)\/)f5)'/)(^)^^C5)\Af£^)Y^( / \
bi^y.h(fcmP^
! : : 1 1 I
\
\
a*
1
i
i.
i
1
j
1
0
\
\
0
0 5
\ \
\ I \
1
C i 9
\
\
.
: ,
1
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1
0
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ro;jrar:: pulse to stimui^^te i'lndin^^ G (v^)
Enter
Punction Table 1
■Tith arg'xnent a
for ■Dro,e-rar:t data
i
Dunany Progrojn and
then transform ir i
into a^ so that
0<a'<k<99
Kio)
OucEiy Program and
then transform v^
Into a" so that
1
Dunffiiy Prograia and
then transform t^
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X
Interpolate
»
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iF^incti on* Table 1
with Bjr-gument a'
Interpolate
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Enter
Function table 2
^ith argument a'-
Interpolate
.-for GvV^) '■'it :.
a out In© I. ,
£nt«r
Function Table 1
«
with furr/uj.'ient a^
■-tora^e of the G Function and Frograrar.;in£: L^stractions ?.oga.rsiins Uso of th© Tabulated Function
VII - 35
put of the decade place leads used for progran choice are converted to a program
pulse through the use of a dumny progran. The resulting program pulse is then
taken to a progrc^'jn control which initiates a suitable interpolation routine,
(See Figure 7-4).
Another consideration which is likely to arise is that of making
the most efficient use of the variable digits of the function table. Throughout
the major part of the velocity of sound region, tenths place of the G function
is occupied by the digit zero. However, for convenience in interpolation, it
may be desirable to extend the tabulation on the portable function table devoted
to the neighborhood of the velocity of sound so that some entries in which tenths
place is occupied by the digit one instead of zero are also included.
If the obvious m.eth'3d of tabulation (Hvl colui'in devoted to sign
indication and variable digit columns to tenths, hundreds, etc., places) is
followed, most of the entries will waste a place on the non-signifieant figure
zero in tenths place in order to accorxiodate the few entries that have digit
one .in tenths place. However, since the G function does not change sign and
since there is no reason for transmitting both the functional value stored and
its complement, it is possible to resort to an artifice that will result in the
storage of an additional significant figure without the use of an extra place
of the portable function table.
The artifice consists of tabulating tenths place of the G function
in one of the so called HI coluinns making sign P c .>rrespond to digit zero and
sign M to digit one. The problem of converting the 9 sign pulses transmitted from
the function table entries carrying sign M to a single digit pulse can be solved
very simply by transmitting the PM channel of the function output to an unused
transceiver input and then transmitting the transceiver's output to the digit
VII - 36
input terminal channel devoted to tenths place at the unit receiving the
functional value. Thus, when sign P is stored, no pulses will be transmitted
from the FM channel of the function output terminal and therefore the trans-
ceiver, receiving no pulse, will transmit no output pulse so that the unit
receiving the functional veJ-ue will receive zero pulses in the decade channel
devoted to tenths place. When sign M is stored, 9 sign pulses received by the
transceiver cause the transceiver to emit one pulse which is received in tenths
place by the unit receiving the function output of the function table. Obviously,
if this strategem is resorted to, the program of receiving the functional value
from the function table must be set up on an accumulator repeat program control
whose repeat switch is set at 2 in order to allow time for the accumulator's
reception of a pulse from the transceiver which converts the 9 sign pulses
into a digit pulse.
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TERMINALS iX.21.---,30X
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VIII - 1
VIII, CONSTAOT TRANSMITTER AND lai READER
The constant transmitter operating in conjunction with an lEM card
reader provides another form of memory for the ENIAC (see also, the function
table and accumulator). The input rate for this memory is relatively slowj the
-output rate is rapid. The reader reads standard IBM cards at the rate of approx-
A/
imately 1/2 a second per card and causes the data recorded on the card to be
stored in relays located in the constant transmitter. The 80 digits which can
be read frcan a card may be broken up into 5 digit or 10 digit groups with sign
indication so that as many as 16 signed numbers may be read from a card. In
addition, the constant transmitter can remember 20 digits and 4 signs set up
manually on switches located on front panel 2 of this unit. These 20 digits may
be broken up also into groups of either 5 or 10 digits with sign indication. Once
stored in the relays or on the manual set switches of the constant transmitter,
numerical data can be obtained in pulse form for use in any arithmetic unit of
the ENIAC in one addition time.
The first four sections of this chapter are devoted to the IBI reader
as follows: Section 8.1, progr.-'in controls, Section 8,2, plug board, Section 8,3^
programming circuits, and Section 8,4> numerical circuits* The program controls
and numerical circuits of the constant transmitter are discussed in Sections 8*5^
and 8.6, respectively. An illustrative problem set-up appears ih Section 8,7.
In this chapter, reference will be made to the following drawings:
Constant Transmitter and Reader
Cross Section PX-11-309
IBM Reader Wiring PX-11-119
IBM Reader Plug Board PX-11-305
-"-The rate is 160 cc.rcls per minute when the reader reads continuously without stop-
ping and nay be either 120 or 160 ckrds per ninute when the reader stops between
readings.
VIII - 2
Activation of IHi Reader Relays in
Reading a Detail-Master- Detail
Card Sequence PX-11-308
Constant Transmitter Front View PX-11~306
Constant Transmitter Front Panels PX-11-302, 303, 304
Constant Transmitter Block Diagrsjn PX-11-307
Constant Transmitter Cross Section PX-11-116
Initiating Unit - Front View PX-9-305
Initiating Unit Front Panel PX-9-302
8.0. GENERAL SUl^'-TARY OF THE READER A^T) CONSTANT TRANSI^IITTER
8.0,1. IBI Cards
The IHvI reader operates on standard IBM cards. These cards have 80
columns and each column has 12 positions. The first two positions (reading down
from the top) are designated by 12 and 11, The remaining ten positions correspond
to the numbers 0 to 9 and are printed to indicate this correspondence. Data is
stored on these cards by m.eans of card punches. The group of columns used to
indicate the digits for a given number is called a field.
Any of the 80 columns on the card may be used to store either numerical
data or control data (i.e. information which instructs the reader how to dispose
of the numerical data stored on the card or on succeeding cards), A column used
for storing numerical data will have one of the positions zero to 9 punched.
Negative numbers are indicated by an 11 punch which can appear in addition to a
digit punch, in any one of the columns used for the vaxious places of the number.
No sign indication punch is used for positive numbers. Columns used for control
purposes can have multiple punches. In ciddition, a column used for numerical
data can carry a 12 or 11 punch for control purposes provided that an 11 punch
VIII - 3
does not appear in the same column for sign indication. The distinction between
an 11 punch for control purposes and one for sign indication is made as a result
of the -wiring of the reader plug board (see Section 8,2.),
8.0,2. The Card Reader (refer to Px-11-309 and PX-9-302)
The IBM card reader scans cards and causes numerical data (with sign
indication) located in any field of the card to be stored in any groups of constant
transmitter storage relays specified by the operator (see Section 8,2, and group
selection in Section 8,3.) • The aforementioned operations are designated by the
phrase card reading. True negative numbers on the cards are converted into nines
complements in the process of being stored in the constant transmitter a-nd into
tens complements during transmission from the constant transmitter. Moreover, the
IBM reader can recognize 2 classes of cards namely, master and detail cards. The
reeder causes numerical data read from a master card to be stored in constant
transmitter storage relays and held until the next master card is read at which
time the information read from the previous master card is dropped out and re-
placed by data on the new master card. Detail card information is dropped out
whenever a new card, either master or detail, is read.
Certain controls for starting and stopping the reader are found on the
initiating unit and others on the reader itself. The reader is stimulated to
read a card which is in position to be read when the ree-der start button on the
initiating unit is pressed at the beginning of a computation (see Chapter II,
Section 2) or at the beginning or in the course of a computation when the reader
program pulse input terminal (Ri) on the initiating unit is pulsed. Pushing the
emergency start switch on the IIM reader itself a3.so causes card reading to take
place, IVhen the reader is started initially and there are cards in its magazine
but not in position to be read (see Section 8,1,), the initial start switch on
VIII - 4
the reader must be pushed to move a card into the reading position. The reader
stops reading when the cards in its magazine have been exhausted, or its hopper
is filled, when the stop switch on the reader is pressed, or when the reader's
motor generator is turned off (see Section 8.1.) •
Also found on the initiating unit are a reader interlock pulse input
terminal (Ri) and a reader program pulse output terminal (Ro). Since reading takes
a not absolutely definite time for completion, the EMIAC has been so designed
that an interlock pulse must be received and card reading must be completed before
the reader will emit a program output pulse which can be used to initiate the
phase of the computation which follows card reading. One exception to this
statement is noted in Section 8,1.1,
8.0.3. Card Reading (refer to PX-11-309 and PX-11-119)
The operator specifies the criterion for master or detail cards and also
the correspondence between positions on the card and storage relays in the con-
stant transmitter by means of the setting of the polarity switch located on the
reader and by the manner in which the reader plug board is wired (see Section 8.2.) •
The reader recognizes its instructions with regard to these matters through the ;
punches made on the various cards.
The prograjnming equipment (see Section 8,3.) in the reader which
carries out the instructions consists of relays and cajiis which make and break con-
tact at various times. The programming relays, in general, are used as follows:
Each relay has either a pick-up (P) coil, a hold (H) coil or both and k con-
tacts some or all of which may be used. The hold coil of a relay is connected
in series through one of its contacts, called the hold contact, to a timing cam.
^•When cards are in position to be read, the initial start switch cannot stimulate
.ca.rd" reading,
-"-"Waere one type of coil is ndssing, the functions of both t^v^es are perfornied by
the one u§ed.
VIII - 5
Some stimulus, a particular punch on a card or the activation of another relay,
perhaps, causes the P coil of a relay to pick up. The H coil then holds the
relay through its hold contact until the cam with which the relay is in series
breaks contact.
PX-11-119 shows the various relays and cams. The several components
of a relay are often found on different parts of the diagram. The relay location
chart at the top of PX-11-119 gives the location on the diagram of the P and H
coils and the points of contact (A and B lower and upper)* The timing cams are
designated on this drawing by PI- - PIO, The times at which the cams make and
break contact are also noted here with M and B respectively identifying the make
and break times. The times are given according to the IBl scale which divides
the card reading cycle into Ik subdivisions designated by 14, 12, 11, 0, 1, •«•,
8, 9, 13. The cycle begins half a unit before 14 and ends half a unit after 13.
For the reader, the time divisions are approximately equal* More complete timing
information about the cams is given on PX-11-309.
The cards are read by being passed under each of two continuous rolls.
Eighty tenishes located below the card make contact with the continuous roll where
the card has been punched. The reader by means of the 80 brushes scans all 80
columns of a card simultaneously beginning at time 12 with line 12 in all columns
and then the 11 line in time 11 and, finally, in time 9, the 9 line*
There are tv;o conitinuous rolls each with a set of 80 brushes, roll No, 1
with the control brushes anc^roll No, 2 with the read briidhes. Each card is read
in two cycles. At the start of the i card reading cycle, card i is in front
of continuous roll No, 2 making contatt with card lever contact No, 1 for con-
tinuous roll 2 (CR No. 2, CLC No. 1) and card i + 1 is in front of continuous
roll No. 1 making contact with card lever contact No, 1 for continuous roll No, 1
YIII - 6
(CR No, 1, CLC Mo. 1). During the .x reading cycle, card i is moved under roll
No. 2 and scanned by the read brushes for numerical data. This data is ultimately
delivered through the connections made on the plugboard to the lines -which go to
relays in the constant transmitter. VUhile card i is passing under continuous
roll No. 2, card i + 1 is passing under continuous roll No. 1 where it is read
by the control brushes. The control brushes pick up instructions with regard to
how card i + 1 is to be treated and deliver these instructions via plugboard con-
nections to the programning circuits of the reader (see Section 8,3.) As card
i + 1 moves under continuous roll No, 1, card i + 2 moves out of the magazine so
that cards will be in position for the i + 1 st reading cycle. The second or
numerical reading cycle for a card does not necessarily follow immediately after
the first or control cycle. The second cycle takes place when the reader is
stimulated to start reading. However, when a master ce^d is read, the second
cycle for the detail card immediately after the master card takes place without
delay.
8.0.4. Storage of Card Data in the Constant Transmitter
The circuits involved in converting numerical data punches into a storage
form usable by the Eniac itself are:
80 read brushes (see PX-11-309, 11-119)1 In the
V reader
Coding cams CBl, GB2, ..., CB9 (see PX-11-309, 11-119) j
16 groups of 8 coding relays each (Ct, Co, ..., Cg on PX-11-116,
ll-309)y
16 pairs of PM relays (Fm' and Bi" on PX-11-116, r^ In
11-309) the
6 PM isolating relays (labelled R on PX-11-116, Iconstant
11-309)
80 groups of 4 storage relays each (the storage relays for the
Trans-
mitter
first group are labelled 1-1, 1-2, 1-2', and 1-4 on PX- 11-116).
VIiI - 7
Information from the 80 columns on the IBI card is ultimately stored in the 80
groups of storage relays. The 80 groups of storage relays control 80 groups of
four constant selector gates each (see PX-II-.307) arid these gates in turn, control
the gates which allow the 1, 2, 2' , and 4 pulses respectively to pass when a con-
stant is being tra.nsmitted from the constant transmitter.
Each 5 digit group with sign indication is set up in the storage relays
and BI' and PM" relays as a result of the interaction of the coding cams, a con-
tact on one of the 6 M isolating relays, the pair of PM relays, a group of 8
coding relays, and the 5 leads from the read brushes which read the columns be-
longing to that group of 5 digits,
8,0.5. Transmission of Data from the Constant Transmitter (refer to PX-11-302,
11-303, 11-309, and 11-307)
On panel 1 (see PX-11-302) of the constant transmitter are found 30
program controls and associated neons (see PX-11-306), Each program control con-
sists of a transceiver with program pulse input and output terminals and an
associated constant selector switch. Each group of 6 program controls is con-
cerned with the transmission of 20 digits. The program controls numbered 1-24
handle the 80 digits read from IM cards and those numbered 25-30 the 20 digits
set up manually on the constant set switches located on panel 2 (see PX-11-303).
The letters A, B, ..,, G, H on the constant selector switches refer to the 8 groups
of 10 digits each which can be stored in the constant transmitter from IBM cards;
J and K refer to the 20 digits set up manually on the set switches located on
panel 2. Subscripts L and R refer respectively to the left and right hand groups
of 5 digits (each with sign indication) of a 10 digit group. Ten digits with a
single PM are designated by subscript LR. (See Section 8.2, for the correspondence
between storage relay hubs on the plug board and the points Aj^, k^, ,.., Hj^ on
VIII -
the constant selector s^vitches,) The digit output of the constant transmitter is
emitted through the output terminal on panel 1 (see PX-11-302),.
Any or all of the 6 constant selector switches of a group may be set so
as to call for the transmission of any one 5 digit or 10 digit signed, number con-
trolled by that group of switches. The only restriction is that if a constant
selector switch be set so as to call for the transmission of either the L or R
5 digits of a 10 digit group, none of the other 5 switches may bo set so as to call
for the transmission of the same 10 digits as a group (LR), Conversely, if 10
digits are combined by an LR setting of a constant selector switch, the same 10
digits can never be broken up into 5 digit L or R groups on any of the remaining
5 constant selector switches.
The points on the constant selector switches are connected to the con-
stant selector gates. For these gates the 2nd input comes from a storage relay
or a constant set switch and may, in either case, be a digit or a PM.
The constant selector gates whose second inputs are nuraerical in nature,
control the 1, 2, 2' , and 4 pulse gates which allow suitable combinations of the
1, 2, 2' , and 4 pulses to be passed over the 10 digit leads of the constant trans-
mitter' s digit output terminal (located on panel 1). The constant selector gates
whose second inputs are derived from minus sign indication, control gates which
allow the 9 pulses to pass over the BI lead and possibly the 5 left hand leads
of the digit output terminal and which allow the 1' pulse (needed to produce a
tens instead of nines complement) to pass over either the units place or 10^
place lead of the digit output terminal.
VIII - 9
6.1. PROGRAM CONTROLS OF THE IBM READER (Refer particularly to PX-U-119)
The reader program controls located on the re&der are the initial start
switch, the emergency start switch, the oh-off switch and the green motor generator
signal light, and a stop switch. Relay 3 in the reader is the start relay for the
clutch magnets which cause the card feed raochamsm to operate. Also inside the
reader are certain circuit elements which function in conjunction with the program
controls for starting the reader: magazine card lever contact (Mag CLC) and re-
lay 1, card lever contact No, 1 for continuous roll No, 1 (CR No, 1, CLC No. 1)
and relay 2, card lever contact No, 2 for continuous roll No, 1 (CR No, 1 CLC
No, 2), and the card stacker switch. Card lever contact No, 1 for continuous
roll No, 2 <CR No, 2, CLC No. 1) vdth relay 60, and relay 59 in the reader play
a part in the emission of reset and finish signals by the reader and are dis-
cussed in greater detail in Section 8,3.3.
Located at the initiating unit (see PX- 11-30?) are other program controls
for the reader: the reader start button, the reader program pulse input terminal
(Ri)and start flip-flop, the reader interlock pulse input terminal (Rl) and flip-
flop, the reader finish flip-flop, the reader synchronizing flip-flop, program
output pulse transmitter, and program pulse output terminal (Ro) ,
The only program control for the reader that is housed in the constant
transmitter is the reader start relay.
The green motor generator signal light goes on when the reader is plugged
into a source of power provided that the on-off switch is on. The reader can be
plugged into any of the a-c outlet terminals found at the base of each unit of
the ENIAC. Power is applied to the outlets below panel 2 of the printer and
panel 3 of the constant transmitter only when the ENIAC* s heaters are onj all
#
«a4a
Table 8-1
REivDER PROGRilvi CONTROLS
Program Control
•1) Dn-off switch
Reader
"2) Initial Start peader
Switch
'3) Ri and start '
flip-flop -^nd
start relay.
Location
Use
Turns reader* s raotor generator on or off. Green signal light is on when generator is
' Initiating
Unit
J Constant
4) Siiergency Start
Svjitch
5) Reader Start
Button
~^) Mag. CLC and
relay 1
6) Card Stacker
Switch
Transmitte;'
Reader
Initiating
Unit
running.
Used to move first card of a deck into position for reading and to move last two cards
through the reader.
vmen Ri is pulsed, start F,F, is set, start relay is activated, and card reading takes
place subject to items 6, 7, and 8. Program output pulse is transmitted at the end of
reading subject to items 9, 10, and 11«
Reader
Parallels the circuit of item 3. The reader continues to read subject to items 6, 7,
8 as long as this switch is closed. Does not usually cause the emission of a program
output pulse when reading is completed since in the usual applications no interlock
pulse is provided x-vhen this switch is used« It is chiefly used for testing the reader
and constant transmitter.
Can be used to initiate the first card reading of a computation provided that the set-
up does not call for a sequence in parallfcl vdth the first card reading. The initial
«ta3St- switch should be pushed immediately before or after the reader start button if
all cards are in the magazine and there is not a card in position for readdng,
Prevents operation of items 2-5 when card stacker is filled.
Reader
Prevent card reading by items 3~5 when maga^ne is empty.
8) CLC No, 1 for
CR No. 1 and
relay 2
Reader
Prevent card reading by items 3-5 when there is no card before continuous roll 1.
■9) CLC No, 1 for
CR No, 2 and
relay 60
lid) Relay 59
Reader
Prevent reader from emitting a reset signal for the start F. F, and a finish signal*
if there is no card before continuous roll 2,
I'X) RI and inter-
lock flip-flop
Reader
Prevents reader from 'emitting a reset or finish signal until the detail card follow-
ing a master card passes under the read brushes associated with roll 2.
Initiating
unit
Note the reception of aji interlock input pulse.
l^jFinish flip-
flop - Synchro-
nizing flip-flop
and Ro.
Initiating
unit
Provide for the transmission of a program output pulse when reading, initiated by
item 3, is completed provided that an interlock pulse is received. For reading
initiated by item 5> program output pulse is transmitted 2 addition times after read-
ing is completed. . . -
i ' i t
VIII - 10
other outlets are alive even when the heaters are off. Switching the on-off
switch to the off position turns the reader's power off completely, the reader can
be prevented fr-on reading teciporarilv by holding down : the stop key.
The foregoing reader controls and others still to be discussed are
suiMiai'ized in table 8-1,
8.1.1. Program Input and Output Circuits
The usual method for stimulating the reader to read a card in the course
of a computation is to deliver a program pulse to Ri» A pulse received at Ri sets
the reader flip-flop and, thus, causes the start relay to be activated. Now, with
contacts lA and 2A closed and with the card stacker switch closed, the circuit to
relay 3 is closed through a contact on the start relay (shown on PX- 11-307 )• Vftien
relay 3 is energized, the clutch magnets which cause the card feed mechanism to
operate are activated. Notice that relay 3 can be activated as the result of
the setting of the start flip-flop only if there is at least one card in the
magazine (so that relay 1 is activated through Mag CLC), there is a card waiting
to be read by the control brushes (so that relay 2 is activated through CLC No. 1
of CR No. 1) and, the card stacker is not filled to capacity (so that the card
stacker switch is closed).
During the period 12.0 - 12.5 which is about l/7th the way through a
reading cycle, the reader emits (via line 129) a reset signal for the start flip-
flop in the initiating unit provided that a detail, and not a master card, is
passing under the read brushes and provided that there is a card in contact with
CLC No. 1 of CR No. 2 (see Section 8.3.3.). After the start flip-flop is reset,
if another pulse is received at Ri, this flip-flop is capable of remembering that
another reading cycle is to take place after the completion of the one in which
the reader is engaged. The operator is cautioned that a pulse delivered to Ri
VIII - 11
before the start flip-flop has been reset is lost.
During the period 9.5 - 13.0, at the end of a card reading cycle, a
finish signal is emitted by the reader (via line 12?) provided that the card
whose numerical reading is being conpleted is not a master card and provided
that there is a card in front of continuous roll No. 2 -waiting to be read (see
Section 8.3.3.). The finish signal sets the reader finish flip-flop. Vilhen an
interlock pulse is received and the interlock flip-flop, therefore, is set, gate
69 acting on the coincidence of signals from the finish and interlock flip-flops,
emits a signal which allows a CPP to pass through gate 62. The output of gate 62
sets the reader synchronizing flip-flop, A CPP gated through gate 68 by the
normally negative output of the synchronizing flip-flop resets the finish, inter-
lock, and synchronizing flip-flops and passes through the reader program output
transmitter to be emitted through Ro as a program output pulse.
Pushing the reader start button initiates the same actions as pulse
input to Ri, but also sets the interlock flip-flop. Hence no interlock pulse
need be provided to obtain a prograjn output pulse for a reading initiated by
this control.
The reader start button is intended for use at the start of a computa-
tion whose first prograra consists of card reading with no program sequence in
parallel. Provision has been made for the setting of the interlock flip-flop
by the reader start button since, with no parallel sequence for the first card
reading, it would otherwise be impossible to provide the interlock pulse without
which the reader does not emit a program output pulse (also see Section 8.1.3, for
the procedure for reading the first card of a deck).
8,1.2. Emergency Start Switch
The emergency start switch parallels the operation of the circuit con-
VIII - 12
si sting of Ri, the start flip-flop;, and the stcrt relay. As long as this switch
is closed, relay 3 is activated under the ssjne restrictions as vgere noted above
in the discussion for the circuit which this switch parallels. Just as in that
case, card reading takes place and a reset and a finish signal are emitted. The
reset signal has no effect since the start flip-flop is not flipped into the
abnormal state. The finish signal does, however, set the finish flip-flop. If
on interlock pulse is not delivered to Rl for a reading initiated by the emergency
start switch, no program output pulse is omitted by Ro even though the finish flip-
flop is set. Since no output pulse is transmitted, the finish flip-flop is not
reset. Therefore, reading initiated by the emergency start switch does not leave
the reader program controls in their normal state.
In a reading initiated by the controls discussed in Section 8.1,1, the
reader stoos after one detail card or after the detail card following one or more
master cards, Vflien the emergency start switch is used, the reader continues to
read as long as this switch is held closed.
The emergency start switch provides a convenient means of testing the
reader and constant transmitter. It has the advantage that no program tray con-
nections are needed. If, moreover, there is a problem set up for computation on
the ENIAC when the reader is tested, the use of the emergency start switch has
the advantage that no program output pulse to stimulate other programs is emitted
when reading is completed (unless an interlock pulse is received).
8.1,3, Initial Start Switch - Procedure for reading the first card of a deck.
Above it was pointed out that not only must the magazine have cards in
it and the card stacker not be filled to capacity, but also, there must be a card
in position before continuous roll No, 1 for card reading to be stimulated by
pulse input to Ri, by the reader start button, or by the emergency start switch.
VIII - 13
When the first reading is to be stimulated with cards in the magazine but no card
in contact with CLC No. 1 of CR No, 1, the initial start svdtch is used, V/hen
the initir.l start switch is closed, relay 3 is activated through contact 2B which
is closed because there is no cp.rd in contact with CR No. 1, CLC No, 1, The first
card of the deck is thus pushed under continuous roll No, 1 and read by the con-
trol brushes. If the initial start switch alone is pushed, then the reader stops
before this first card goes through a numerical cycle. If the start flip-flop is
set (by the reception of pulse at Ri or by pushing the reader start button) after
the initial start switch is pushed, relay 3 is then activated through contacts lA
and 2A so that the first card goes through a numerical reading cycle. Reset and
finish signals are emitted in the course of this cycle provided that the first
card is not a master card»
If desired, the start flip-flop may be set first and then the initial
start switch can be closed. This switch then causes the first card to go through
a control brush reading. Since there is no card in contact with CR No, 2, CLC
No, 1, relay 60 is not activated and therefore, no reset or finish signals are
emitted in this reading cycle. The start flip-flop thus remains activated, and,
relay 3 is then activated through contacts lA and 2A, A cycle in which the first
card is read for numerico.l data follows immediately and, provided that card No, 1
is not a master card, reset and finish signals are emitted.
Notice that relay 3 can be activated as a result of pushing the initial
start switch only through contact 2B or the upper B contact of relay 1, Thus,
the initial start switch can be used only when all cards are in the magazine so
that 2B is closed or, at the end, when the magazine is empty so that the upper
B contact of relay 1 is closed.
If n cards are placed in the magazine at the beginning of a computation.
VIII - U
the cycle in which card n-1 is read under continuous roll No* 1 and card n-2
under continuous roll No, 2 is the last cycle which can be initiated by pulse
input to Ri, or by pushing either the reader start button or the emergency start
■th ...
switch. For, during this cycle, the n card moves out of the magazine into
position before continuous roll No, 1, Vvith the magazine empty, Mag CLC does
not make contact and relay 1, therefore, is not activated so that the reading of
cards n-1 and n could be brought about only by holding down the initial start
switch. The necessity for using this switch to cause the reading of the 2 final
cards of interest to the computation can, obviously, be avoided by placing at
least 2 dummy cards at the bottom of the dock (which becomes the top of the deck
when the cards are placed in the magazine - see the note on PX~ll-309).
If blank carde are used at the end of a deck and if they are not with»-
drawn by the use of the initial start switch before the magazine is refilled, the
operator should anticipate difficulty if the set*-up is one in which the reader's
program output pulse stimulates the divider and square rooter to carry out a
division program for which the denominator is derived from the card just read.
For, when the magazine is refilled, the blank cards remaining from the last deck
are the first cards read and the output pulse emitted when one of these has been
rea,d causes the divider to embark on an infinite process, division by zero. This
difficulty can be circumvented by causing the reader' s program output pulse to be
suppressed for the dummy cards. If the plug board is wired so that the reader
C'iii rfcofpize raster cards and if the dummy cards are punched with master card
i-L?.,c-ruc:-.ions (see Section 8.2,), no progr'-un output pulse will be emitted as long
d. the cli'.iiiay Cc-^rds are read since the reader does not emit either a reset or a
r.'.ninh signal for a cycle in which a master card passes under continuous roll
H ^, 2 (see Section 8,3.3.).
VIII - 15
8.2. POURITY SMUTCH AND PLUG BOARD
The IBM plug board is a characteristic device belonging to IBM units.
It is a detachable board containing a large number of single hole terminals called
hubs. When the board is in place for operation, these hubs are connected to some
line in the permanent wiring of the machine. Numerous small insulated lengths of
wire are provided by which these hubs may be connected in pairs (occasionally in
larger groups), thereby connecting in each case two or more lines in the permanent
wiring. This process is called wiring the plug board. It may be done in an
enormous variety of ways, thus achieving corresponding flexibility in programming.
The possibility of detaching the board as a whole from the machine not only
facilitates the process of wiring, but, by the use of spare boards, enables one
to keep on hand a number of boards with progrsims wired up.
The wiring of the plug board establishes, among other things, the cor-
respondence between columns carrying certain data on the cards and the relays
storing the same data in the constant transmitter. It provides also for storage
relay groups which may be used for negative numbers in order to isolate minus
indications from numerical data.
There is on the reader a polarity switch whoso setting, in conjunction
with the wiring, contributes to program control. Among the more important types
of programming accomplished by the wiring of the reader plug board are those
for reset control and group selection.
The IHf plug board for the reader is shown on PX-11-305. The various
hubs are labelled on this diagram but certain additional words of explanation
may be helpful.
The No, 1 read brush hubs appear in lines 1-4 of the plug board. These
Table 8-2
correspomdemce bet^veen storage relay hubs i^nd points on constant selector s;vitches
Storage
Relay
Group
Point on
C.S. Switch
Storage
Relay
Group
Point on
C.S, Switch
storage
Relay
Group
Point on
C.S. Switch
Storage
Relay
Group
Point on
C.S. Switch
1
A
L
2
\
3
•^L
4
h
5
^L
6
\
1
°L
8
\
9
^
10
\
11
S
.12
\
13
\
14
Fr
15
Gr
16
%
#
\
^
X
1
<::
C^
^
1
Cn
r^
Co
o
iy
o
i^
b
^
^
h
Xj
Ci
:^
J/1 n^^j
T^ . . 1 . .
*l r*
5
#1 Read cz^snes
15
20
o o o o o o
oooooooo
0
0 0
0
0 0
25
30
35
40
O 0 o o o o
0 O O OO O 0 0
0
0 0
0
0 0
45
50
55
60
O O 0 o o o
oooooooo
o
0 0
0
0 0
65
70
75
80
o p 0 0 o o
oooooooo
o
0 0
0
0 0
1 PL to 1 RB — Plug to digit sel Group Selection
i o o o
O O O
oooooooo
0
0 0
0
0 0
C
KG 1 2
3 4 -5 6 7 8 9 10
11
12 13
14
15 16
: 0 o o o o o
oooooooo
o
0 0
0
0 0
, Reset shunt
12 - U- 0 Digit selector - 6 -
- 7-
- 8- 9
o o O O 0 o
o o
o o
0 0 0 o o o
o
0 0
0
0 0
! o o o o o o
O 0 0 O 0 0
0
0 0
0
0 b
PT. to T*AQA'h «hiin+
T)ooA^ /%/^v^'^ ^^r^^
lo 2o 3o ko 5o 6o
7o 8o 9o lOo Uo 12o 13o 14o 15o 16o
0
0
0
0 0
0 0
O 0 0 0 o o
■ ■ t
oooooooo
o
1 p
0
0
J
ff2 Read Brushes
15-
20
o o O 0 o o
oooooooo
0
0 0
0
0 0
25
30
35
40 !
i O 0 o o o o
oooooooo
0
0 0
0
0 0 1
45
50
55
60
: o o o o o o
oooooooo
0
0 0
0
0 0
65
70
75
80
O 0 O 0 o o
OO o o o o o o
0
0 0
0
0 0
; Plug to 2 RB
! O O 0 O 0 o
oooooooo
0
0
0
0
0 0
12 3^56
7 8 9 10 U 12 13 14
15
16
o o o o o o
oooooooo
0
0
0
0
0
0 0
0 0
O 0 o o o o
Pluff to 2 RR ........
oooooooo
0
0
0
o C o o o o
o
urvup sexecLion - —
Co o o o oCo 0 0
0
0 C 0
- 4-
0
0 0
Plug to ST relays
o A o o o o
o
A o o o 0
O A o o o
0
0 A 0
0
0 0
Plug to ST relays
o B o 0 0 o o
B 0 o o o
o B o o o
0
0 B 0
0
0 0
Plue to 2 RB
- - - .- A ,,
n
0
o C o o o o
o
C o o 0 o
f
O C 0 O O
0
0 C 0
8 -
0
0 0
Plug to ST relays
.
^
0 A o o 0 o
o
A o o o o
o A o 0 0
0
0 A 0
0
0 0
! Plug to ST relays
i o B 0 o o o
o
B o o 0 0
o B 0 o o
0
0 B 0
0
0 0
I Plu^ to 2 RB -
^c^
1 1
1 '■»
j o c o^^^r:^ 0 o
o
C o o o o
JLL
o C O 0 O
0
0 C 0
12-
0
0 0
Plug to ST relays
o A o 0 o o
"D
A o o 0 0
o A 0 0 o
0
0 A 0
0
0 0
Plug to ST relays
1 0 B 0 o o o
o
B 0 o 0 0
0 B o 0 0
0
0 B 0
0
0 0
Plug to 2 ]
as -
1 J
1 fi
16-
jif
15
1 o C o o o o
o
C 0 o o o
o 0 o o 0
0
0 C 0
0
0 0
Plug to ST relays
0 A o o o 0
0
A o o o o
0 A o o 0
0
0 A 0
0
0 0
1 Plug to ST relays
0 B o o o 0 ' 0
Bo o o o^oBo o 6
a
0 B 0
0
0 0
O O 0 0 o o
fJroun 1
oooooooo
0
0 0
0
0 0 1
•jXiorage ueiays
Group ff !
1 0 0 0 0 O
0
o O 0 o
o o o o
0
0 0
0
0 0
1 Group ,
;
- Group (
f;
n rm
Group 1
3
?
9
(iroup (
o o o o o
GrouD Q
0
O 0 0 o
0 o o o
0
0 0
0
0 0
1 /^
CrrvUp X\J
(iroup iJ. —
Group ,
12
o o 0 O 0
Groim 1 "^ ■
o
O O O 0
0 0 o o
0
0 0
0
0 0
VlFOUp Xi4
Group 15 —
Group xo
O O 0 0 0 1 O
O O O OlO O 0 O
0
0 0
0
0 0
1
#«
VIII - 16
hubs connect to the control brushes and their numbering corresponds to that of
the columns on an IBM card.
The two hubs on linos 5 and 6 which are above and bglow the letter C,
are common, i»e., internally connected. One or both of these hubs may be used
for control purnosos, Tho hubs to the left of the C hubs are unused.
The single hub marked RC on line 6, the 16 reset shunt hubs which
appear a.t the left of lines 7 and 8, and the reset control hubs on line 9 are
used for the reset control programming instructions discussed below. The number-
ing of the reset control hubs corresponds to the numbering of the 16 five digit
groups of storage relays in the constant transmitter (see Table 8-2),
The group selection hubs on lines 5 and 6 which are qomraon hubs and
those on lines 18-29 are used for group selection instructions as explained later
in this section. The group selection hubs on lines 18-29 are arranged in 16 five
digit groups. For each digit there are three hubs, C, A, and B, When group
selection (see below) takes place the C and B hubs are internally connected; other-
wise C and A are connected. Each of the group selection hubs above a number on
line 5 is common with the hub below the same number on line 6, Each pair of hubs
on lines 5 and 6 corresponds to the A-B-C group of the same nuniber on lines 18-29.
The minus control hubs appear on lines 15 and 16, Each hub above a
number is common with the one below the same number. Minus punch information
is routed through these hubs to the FM* and PM" relays cf the correspondingly
nunibered groups in the constant transmitter.
The No, 2 read brush hubs are the outputs of the No, 2 read brushes.
Numerical data read from any of the 80 columns of an IBIifl card is delivered to
the correspondingly numbered hub of this group.
VIII - 17
The storage re-lay hubs on lines 31-34 connect to contacts on the constant
transmitter's coding relays and ultimately to the storage relays. The correspond-
ence between the numbering of the 16 five digit groups here and the labelling of
the Doints on the constant selector switches is shown in Table 8-2,
The two kinds of prograraming instruction which the reader recognizes
.are reset control and group selection. The reset control instruction refers to
distinguishing between master and detail cards. As long as detail cards are read,
the reader causes information stored in the storage relays as a result of the
reading of the previous detail card to be dropped out before new detail infor-
mation is stored and also causes information stored in the storage relays as a
result of the reading of the last master c -ird to be rotrdned (provided the plug
board is so wired). Reset control operates when a master card is read. This
means that the reader causes all information, both master and detail, to be
dropped out of the storage relays and new master information from the master
card to be placed in store.ge. Also, when reset control takes place, the card
following the master card (usually a detail card) is read immediately after the
master card. No reset or finish signal is emitted until the reading of a card is
com.pleted.
The group selection instruction, v^hich may be given for either a master
or detail card, makes it possible for data from one field to be placed normally
in certain storage relays, and, when group selection operates, in a different
group of storage relays.
A second form of group selection instruction is used when it is desired
normally
to store in one set of storage relays information which^^ccurs in a given field
of the card, but which is found in a different field of the card when group
selection is to occur.
VIII - 18
The first form of group selection is convenient when using a set of
cards, perhaps master and detail, \-Mhich are so punched that the same field used
for master information on the master card, on the detail card is used for detail
information. The second form of group selection would be useful for a set of
cards consisting of two subsets in which there appeared data for the same quantity
sometimes in one field and sometimes in another.
The polarity switch has two positions, normal and abnormal, YiTith the
polarity switch in the normal position, programming instructions for reset control
and/or group selection are always specified in a given column of the card with
different instructions being specified by different punches. With the polarity
switch in the abnormal position, programming instructions are given by a specific
punch with the different instructions being distinguished by the different coliimns
in which the specific punch appears^ The polarity switch makes possible this
flexibility by interchanging the connections to the soiirce of power so as to make
the polarity consistent with plug board wiring. It is important to note that the
setting of the polarity switch must not be altered when the reader's mot^or genera^
tor is on (green signal light is on).
With the polarity switch in the normal position, the column which is
to contain punches for programming instructions is specified by plugging from one
of the C hubs to the No, 1 read brush hub corresponding to that column. If
desired, the control punch may appear in either column i ££ j. This latter in-
struction is specified by plugging one of the common C hubs to the i hub and
the other C hub to the j hub of the No, 1 read brushes.
The particular punch appearing in the given column (or columns) which
is to signal for reset control is specified by plugging from the RC hub to the
digit selector hub corresponding to the particular punch. A punch read no later
^
lai R&nl'Qi PLUG BO;JiD
o
re
_vr
Illuatrative plu/^lng arr.iniTcaaent for Heset Contpol Instructions
with the Polarity Switch in the Normal Position,
m T-i J
V% ft ~
15-
20
J ^^ n»«a Dx-usnao
oooooooooooooo
0 o
o
0 o
o
25 30
35
40
^ ooooooooooooo
0 0
o
o o
o
45 50
55
60
oooooooooooooo
/ 65 70
O 0 0 /^ ooooooooooo
0 0
0
O 0
o
75
80
o o
o
O 0
0
PL to 1 Rp — Plug to digit sel -— Group Selection
.^ ooooooooooooo
0 o
o
O 0
o
^"^^^.^^^^C HC1234^678910
U 12
13
U 15
16
o o^^ 0(e-^o^o oooooooo
o o
o
0 0
o
— ^ Reset thunT^-^^^^::^;^— i
1 12- U-.O Digit selector -
- 6
-7-8
- 9
oooooooo
. ill-/ 1
O O O 0 o €/ 0^ o o
-*o 0 o o o o
O 0
o
0 0
o
O 0 o o o o
o o
o
O 0
o
lo 20 3o Lo 5o 6o 7o Tto 9o lOo Uo I2o l>o Uo X5o 16o
0
o
O 0
0 0
o
o
oooooooooooooo
o o
^ r
5 #2 Read Brushes
15
20
oooooooooooooo
0 0
o
0 o
o
25 30
35
40
oooooooooooooo
O 0
0
o o
0
45 50
55
60
oooooooooooooo
0 0
0
o o
o
65 70
75
80
oooooooooooooo
1>1iirr ^n O UR 114 n««a nrtnf- aw^l
o o
0
o o
o
rxug uo <, OC Minus conLrox
oooooooooooooo
o o
o
0 o
0
12 34567Q910U121314
15 16
oooooooooooooo
o o
0
0
O 0
0 0
0
o
oooooooooooooo
P1 110 f'itC>RR— '^— ._--i_-*i-..
o o
1 XUg \tO d. i\.o
UAvu^ •ax9i;i'Xuit
4
o C o o o o
O C O 0 O O
o C o o o
o
o C
o
0 o
o
Plug to ST relays
0 A o o 0 o
o A o o 0 0
O A O 0 o
o
o A
o
O 0
o
Plug to ST relays
o B o o o o '
o B o o o o
o B o 0 0
o
o B
o
0 o
0
Pluff t.o P RR t ^
■7
V
r>
0 C 0 o o o
o C o o o o
I
0 C o o o
o
o C
0
o o
o
Plug to ST relays
o A o o 0 o
0 A 0 0 o o
o A o o 0
o
o A
o
0 o
o
Plug to ST relays \
oBo o o 0 oBo o 0 o
o B o o o
o
o B
o
0 o
0
Pluir to 7 HR in
T 1
1 o
o C o ^~e-^ o oloCo 0 o o
XX
0 C o 0 o
o
o C
o
XiC
O 0
o
Plug to ST relays
o A 0 o o o
X) A O O O 0
OAo O 0
o
0 A
o
o o
0
Plug to ST relays
oBo 0 o OjOBo o o 0
Pluff to 7 HR - i ■> '
0 B o 0 0
15
o C o o o
o
o B
0
0 o
1 A
o
o C o O O O
o C o o o o
o
o C
0
xo
o o
o
Plug to ST relays
oAo o o ojoAo 0 o ojoAo 0 0
o
0 A
o
O 0
o
Plug to ST relays
oBo o o ooBo o o o oBo o o
a o B
o
o o
0
oooooooooooooo
o o
o
o o
0
k#vv« a^i^Q wo.t^jm
urou|/ <4
O O O O O
0 O O 0 0
o o o o
o
o
o
o o
o
V,fjr«Mip J
viroup o
uroup {
uroufi o
O 0 O O O
nT*oiin 1
0 o 0 o o|o o o o
— - flrvMir* in - i n^m^^.^ 11
o
o
o
O 0
o
kj* VU|# 7
urroup Xaj
\Jk wip J.X
IrrOup xjc.
o o o o o
fl«*mm W
o o o o o
0 o o o
0
o
o
0 o
» 1 iL
o
\M VU^ X J
liroup xh
LrrOUp X>
GrCnip xo
0 O O 0 OlO 0 o o oio 0 o o
o
0
o
o o
o
^ O :^
IN3TKUCriQN3
(The line which carries the instruction appears in parenthesis)
V(/hen a 12 punch (c) appetars in column 21 ia) or in column 44 (b), reset control is to operate (c>.
The reij^t control consists of dropping out the master information stored in group 5 (e) and group
8 (d) storage relays .
VIII * 19
in the card reading cycle than a 6 punch should be used to stimulate reset con~
trol in order to allow sufficient time for the reset control programming circuits
to function properly (see Section 8.3.1.). Finally, the master information group
(or groups) is (or are) specified by plugging from the reset control hubs cor-
related vdth the group (or groups) 1;.o any of the reset shunt hubs. Drawing
PX-11~305 Rl presents an illustrative plugging for reset control instructions
when the polarity switch is in the normal position.
With the polarity switch in the normal position, the particular punch
(in the column or columns specified by the plugging from C to the No, 1 read
brushes) which gives a group selection instruction is specified by the plugging
from the digit selector hubs to the group selection hubs immediately above. The
card fields and storage relay groups involved in the group selection and the man-
ner in which they are involved are designated by the plugging from the No, 2 read
brushes to the group selection hubs on lines 18-29 (corresponding to the ones used
on lines 5 and/or 6) and then from these hubs to the storage relay hubs. Group
selection in which data from either of 2 fields on the card is placed in a single
storage relay group is provided for by plugging the 5 hubs of the storage relay
group to the C hub of the group selection hubs and by plugging the five No, 2 read
brush hubs from which data is normally taken to the A hubs and the five No, 2 read
brushehubs from vdiich data is taken when group selection occurs to the B hubs of
the group selection hubs on lines 18-29 • Group selection in which data from on©
field on the card is ordinarily put in one group of storage rejLays bub in another
group when group selection takes place is specified by plugging the No, 2 brush
hubs for the card field to the C hubs and the A hubs of the group selection re-
lays to the usu$l storage relay hubs and the B hubs to the hubs of the storage
relays used when group selection takes place,
■J'dlaster information group is used to mean the group of constant transmitter storage
relays v\rtiich stores information from a master card, releasing it only when a new
master card is recognized.
^
^ -'^
V
IBM .i;:AD.Ji PLUG BOARD
<l
Illustrative plugging arrangement for Qroup Selection Instructions
with the Polarity Svtitch in the Norraal Position,
1
1
\ 1
"t)
1
r
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55
o
75
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tion
0
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o
m1 A/*4
20
o o o
40
o o o
60
O O 0
80
O 0 o
5 ffx no«a orxisnea
OOOOOOOOOOOOOO
25 30
1)0000000000000
^ 45 50
000i>0000000000
/ 65 70
o 0 o-^o 0 o 0 oo o o o o o
0 o
0 0
O 0
o o
.o 0 O O O
^^--.^^^C RC 1
o o^""^ o o
- — — — Reset shuni
O 0 0 O 0
0 o o
2 3 4
o o o
o o o o o o
-5 6 7 8 9 10
O O 0 JO o o
12- U- 0^— Digit 8
0 0 0 o o o
0 o--
12 13
o o
•■ U 0 o
14 15 16
0 o o
- 7-8__2,
fc— O""^ O 0
0 O 0
1 1 i
o o O^
1 ! 1 1 1 1 !
oooooooo
O 0
O O 0 o
O 0
0
0 o b
O 0 o
o o o
lo 2o 3o 4o 5o 6o 7o 8o 9o lOo Uo 12o 13o Uo 15o 16o
0
o o o o o
- - 5 -
X O O O 0
^ 25
0 0 o o o
45
0 o o o o
65
o o o o o
Pliicr 4-rt "^ BR
0 o o
0 o
#2 Risad
o o
30
o o
50
O 0
70
0 o
IJ4.... .
o o o o
0
15-
0
35
o
55
0
75
o
0
0
/
}
\
o o o
O O 0
o o o
0 0 o
Brushes
O 0 O 0
o o o O
O O 0 o
o O 0 o
o o
O 0
o o
o o
20
O 0 0^
40^
O O 0^.
60^
o o o
80
o o o
oooooooooo
123456 78910
oooooooooo
sonbrox
o O 0 o
U 12 X3 14
O 0 o o
O 0
15 16
o o
o
0
o o o
O O 0
O 0 0
oooooooo
Plii^ to 7 HB — -r - ■
0 o
- Group 1
o o
O 0
o o
k
o o o o
0 o
o
j
O C 0 O 0 O
Plug to ST reUys
o A o o o o
Plug to ST relajre
o B o o o o
Plug to 2 HB
0 C o o o o
Ping to ST reUjre
o A o o o o
Ping to ST relajre
o B 0 o o o
Pluff to 2 RR
o C o o
o A 0 o
o B 0 o
o C 0 o
o A o 0
o B o o
lelection -"
o C o o o
o A o 0 o
o B o 0 o
n
o
o
o
o C 0
o A o
o B o
-' 4
0 0 o
o o o
0 O 0
o
o o
o o
O 0
•\t\
I
0 C o o o
0 A o o o
o B o 0 0
1 1
o
o
o
0 C o
0 A o
0 B o
o
0 o <^
0 O 0^
o o cr
1 '}
o C o~"^-»~- o o
Plug to ST relays
0 A o o o o
Plug to ST relA/s
0 B o 0 o o
Plii« to 2 RR
o C o O 0 o
O A 0 O 0 0
o B o o 0 0
■1 J
0 C o 0 o
0 A 0 0 o
0 B 0 o o
1 K
o
o
o
o C o
o A o
o B 0
12
O 0 0
O O 0
0 0 o
16 — —
0 O 0
O 0 o
0 o o
o o o
Hip 4
o o a
mp 8
0 o o
.. ■» -->
o C o o o o
Plug to ST reUya
^ A o o o o
Ping to ST relays
JD B O O 0 0
(
o o o o o
Clroun 1
o C o o
0 A O O
0 B 0 o
o o o
o o
o o
o o
o o
storage
0 0
15
o C o o o
O A 0 0 o
o B o o o
o o o o
o
o
a
o
o C
o A
o B
o
0
o
o
o
Or<
o
Or<
0
Grc
0
Grc
0
S o O O O
flpoun 'S ' -1
o o o
itexays - -■-
0 o o o
o
o
O 0 O O 0
_ . r»rouD Q — 1
o o o o o
n«^Mm lO
uroup f
o o o o
o
o .
O O 0 o o
O O O O 0
liroup UL —
0 o o o
o
0
>up 12
0 o o
>up 16
O 0 o
\> O 0 0 0
viroup x/i ...
0 o o o o
o o o o
o
o
INgTRUCTIONS
»
olien a 0 punch (f) apoears in either column 21 (a) or colman Uh (b), the 5th digit of group 4 storage
roiaya (g) will corae from column 20 of the card (j). Otherwise, the 5th digit of group U storage re-
lays will come from column 40 of the card (h)«
Vilhen a 6 punch (k) appears in either colujmi 21 (a) or colunm 44 (b), the digit appearing in colunm 1
of the card (1), will be put in the storage relays for the first digit of group 13 (n); otherwise it
will be put in the otor'.ge relays for the first digit of group 1 (m).
i
im ,....i-EIi rLUG IJOnRD
Q
Illustrative plugging arran/^eraent for Reset Control and Group
.->election Instructions with the Polarity iiwitch in the abnormal
position.
\
^
^
ClD
1
r
■^
--..
C
^
1
to
rr,.
Uj
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:h
o>
^
CD
^^1
^
h
^
o
^
Lo
^^
5 #1 Read Brushes 15 20
oooooooooooooooooo
25 X) 35 40
oooooooooooooooooooo
45 50 55 60
o o o o oo o oo o o o o o o o o o o o
65 70 75 80
oooooooooooooooooooo
PL to 1 RB~ Plug to digit sel Group Selection -^-^___-^
ooooooooooooo o^ — 5 o o
HC 12 3 4-5 6 7 8 9 10 U 12 13 14 15 16
oooooooooooooooo
12-11-0 Digit selector -6-7-8-9
00000000000
000000000000
Reset coitrol
00000
PL to reset shunt
lo 2o 3o 40 50 60 70^ 9o lOo Uo 12o I30 14o 15© I60
o o
/-"
fri
oooooooooooooooooo
5 02 ^^ Brushes 15 20
0000000000000000000
25 30 35 40
oooooooooooooooooooo
45 50 55 60
oooooooooooooooooooo
65 70 75 80
ooooooooooooo 0000000
Plug to 2 HB Minus control 1
oooooooooooooooooooo
12 34 5 6 78 9101112 13 14 15 16
oooooooooooooooooooo
Plug to 2 RB
o C 0000
Plug to ST relays
o A o o o o
Plug to ST relATs
o B o o o o
Plug to 2 RB
o C o o o o
Plug to ST relays
o A o o o o
Plug to ST relays
o B o o o o
Plug to 2 RB -— ^
o C o ^e-^ o o
Plug to ST relays
o A o o o o
Plug to ST relays
o B o o o o
•vj Plug to 2 RB
^ C o 00 o
Plug to ST relays
A o 000
Plug to ST relays
Bo 000
o C Q
o A o
o B o
o C o
o A o
o B o
Group selection
/-"
o C o o
o A o o
o B o o
o C o o
O A O O
o B o o
o
10
o
o
14
o
o
o
0
0 c
0
0
0
0 A
0
0
0
0 B
0
0
0
0 c
0
0
0
0 A
0
0
0
0 B
0
0
0
0 c
0
0
0
0 A
0
0
0
0 B
0 C
0
0
0
0
0
0
0 A
0
0
o o
7 —
o o
o o
U
o o
o o
15 —
o o
o o
o a
o C o o o o
o A o o o o
o B o o o o
8
o C o 00 o
o A o o o o
o B o o o o
12
o C o c o o
o A o o o o
o B o o o o
16—-—
o C o o o o
o A o o o o
o B o o o o
00000000
- Group 1
0000
Group 5
00000
Group 9
00000
"^v
Group 13 -
0000
00000
Storage Relays
00000
— Group 6
00000
00000
Group 7
00000
o o o c o o o
— Group 4
00000
— — (^oup 8
00000
" Group 10
00000
Group 14
ooooo'ooooo
Group 11
00000
Group 15
-— Group 12
00000
Group 16
00000
XN3TitUCl'lUIIS
'»/hen a 12 punch (a) appears in colunin 1 (c), reset control (c) takes place for the group 8 storage
relays (d).
V^hen a 12 punch ta) appears in column 20 (k), then data from column 1 on the card (1) is put in the
first digit storage relays for group 13 (n), Otherv»ise data frcxr, column 1 is put in the storage re-
lays for the first digit of group 1 Cni).
•1
VIII - 20
PX-11-305 R2 illustrates plugging for both types of group selection if
the polarity switch is in the normal position. It is to be noted, incidentally,
that group selection for more than one group may be made to depend on the appear-
ance of a given punch in the control column. For example, if group selection for
groups 12 and 13 were desired on the presence of a 6 punch, this could be specified
by making connection k as shown on PX-11-305 R2 and, in addition, cross connecting
the other group selection hub 13 to either of the group selection hubs numbered 12.
ViJith the polarity switch in the abnormal position, control is indicated
by a specific punch and the different forms of control by the various columns in
which the specific punch occurs. The particular punch is designated by plugging
from one of the C hubs to the digit selector hub corresponding to that punch.
The fact that reset control is to take place because this special punch occurs
in a given column of the card is indicated by connecting the RC hub to the No.l
read brush corresponding to that column, A connection from a ^roup selection hub
to a read brush hub indicates that group selection is to take place when the
particular punch appears in the column corresponding to the No. 1 read brush hub,
PX-ll-305 R3 shows a plug board arrangement for pr6gramming instructions when the
polarity switch is in the abnormal position.
The No,2 road brush hubs associated with card fields used for positive
numbers only may be plugged to the storage relay hubs directly or through the
group selection hubs in any manner desired. Card fields which at some time carry
negative numbers require special minus control wiring of the plug board so that
minus sign indication can be delivered to the PM' cuid PM" relays in the constant
transmitter and so that the digital information appearing in the same column can
be delivered to the proper storage relays.
Minus control plugging consists of connecting thelfo,2read brush hub
associated with the column in which the minus punch appears to all the minus
#
ii
V
ILLUSTilATIVS PLUG BOARD CONNKCTIONS
For
CAUD FIELDS STORING NEGATIVii NUMBERS
4
^v.
i5 0C3
t
^
--
c^
^
1
U)
r>1
u
O
^^
o
>.
c:i
c>,
^
h
^
^
:d
■c^
\m
Group 13 -
o o o
Lines (a), (b). (c). (d). (e) illustrate plugging for a 10 digit negative number which occupies goup 1
and 2 storage relaya. Since the minus punch is assumed to cose from coluran 2 of the cord, hub 2
of the 02 read brushes is connected to a minus control hub for group 1 (a). Because storage re-
lay groups 1 and 2 are used for this number, the other minus control hub for group 1 is cross
connected to a minus control hub for group 2 (b) . The other minus control hub for group 2 is
connected to the hub for the 2nd digit of group 1 storage relays. Lines (d) and (e) show the
plugging for the first and last digits.
Lines (h), C.i), (k). (l). (m), (n). (p) iUustr.te plugging for :^ ^ digit negative number, in which the
niinus punch app€ars in the same card colunai as the first digit and for which group selection
occurs .
^1
^
VIII - 21
control hubs having the sane nimibGrs as the groups of storage relays in which
the information from that card field is stored and then connecting from these
minus control hubs to the storage relay hub corresponding to the storage position
of the numerical data in the column containing the minus punch, Ihe "No, 2 read
brush hubs for the columns of the ssiiie field which do not carry a minus punch
are plugged directly to the appropriate storage relays.
Where group selection intervenes betv^een "^he No;2 read brushes and the
storage relays, in the "C to No, 2 read brushes - A and B to storage relay" ty^ie
of group selection, minus control plugging is conveniently done from Mo, 2 road
brush to minus control hub (or hubs) to C group selection hub and then from A or
B hub to storage relay hub. In the "C to storage relay - A and B to Nci2 read brush"
tyi^e of group selection, minus control plugging may be carried out from C hub to
minus control hub (or hubs) and then to storage relay hub. An illustrative plug
board arrangement for minus control plugging is shovv'n on PX-11-305 R4.
8,3, PROGR;iI>'MING CIRCUITS OF THE REkDER (Refer to PX-11-119 and PX-11-309)
The programming circuits of the reader consist of the reset control,
group selection, reset signal, and finish signal circuits. The discussion for
the first 2 circuits will be made with the assumption that the polarity switch
is in the normal position and that the plug board is wired accordingly,
8.3,1, Reset Control Circuits
Information remains stored in the 16 groups of storage relays in the
constant transmitter by virtue of the signals delivered over lines 81-96 when the
corresponding contacts on the storage holding relays 4-6 are closed. Relays 4-6
are activated during period 11,0 through 13.7 while cam P2 makes contact, men
P2 breaks at 13.7, contacts on all the storage holding relays release so that
VIII - 22
at this tine information is always dropped, out of all storage relay groups for
which a shunt connection has not been made from reset control hubs to reset
shunt hubs on the plu{' board. The contacts on all the reset shunt relays 56~58
remain closed and thus cause the retention of information in the storage relay
groups which they control by reason of plu.:^ board wiring. The contacts on relays
56-58 release to allow information in these storage relay groups to be dropped out
only when relays 56-58 are activated.
When a master card is read relays 56-58 are activated through the inter-
action of the control brushes, the eroitter, and reset control relay 23. The
emitter has a moving arm which makes contact with the 12 digit selector hubs in
synchronism with the reading of the corresponding punches on the card.
In reset control plugging, it is to be recalled, a connection is made
between a control brush hub and the C hub which is internally connected to the
pick up coil of R23 and to the RC hub and also between the RC hub and a digit
selector hub which is internally connected to the emitter. The signal on this
line when the reset control punch is read causes the pick up coil of R23 to be
picked up. The hold coil of R23 holds until cam P5 breaks contact at time 13. 7 •
While R23 is activated,^ contact B of this relay is closed so that relays 56-58
pick up when cam P8 makes contact at time 8, These relays hold until cam P9
breaks at 12,5, Thus, in the period that relays 56-58 are activated the contacts
on these relays used for reset shunting are open so that information is dropped
out of the storage relays holding master information as well as out of the detail
information groups. The timing of the events discussed above is shown on PX- 11-308,
The fact that relay ;? is activated when reset control takes place also
has repercussions on the reset and finish signal circuits which will be discussed
in Section 8,3.3.
VIII - 23
From the time that Ri is pulsed for the reading of card i + 1 until
13.7 in the cycle for card i + 1 vjhen data from card i is dropped out, the con-
stant transmitter may be called on to transmit data from card i» This period
can safely be taken as 50 addition times,
8.3.2. Group Selection Circuits
There are two sets of group selector relays, 7-22 and 24-55. Each of
relays 7-22 controls a pair consisting of an even and the immediately succeeding
odd numbered relay of the collection 24-55. Tliree contacts of each even numbered
relay and two of each odd numbered relay of the collection 24-55 are used to pro-
duce a circuit between the B and C hubs (instead of between the A and C hubs) of
a five digit group when one of the relays 7-22 and, thus, a pair of the relays
24-55 is activated.
Group selection plugging from a control brush hub to a C hub which is
internally connected to the pick-up coils of relays 7-22 each of which, in turn,
is connected internally to one of the group selector hubs (1-16) and, thence, by
plug board connection to a digit selector hub and finally to the emitter allows
the signal which occurs when a group selection punch is read to pick up the
appropriate relay of the assemblage 7-22. Once picked up, such a relay (or relays)
holds until cam P5 breaks contact at 13.7. ^^ile one of the relays 7-22 is
activated the corresponding pair of relays of the 24-55 collection is activated
through the B contact of its controlling relay when cam P6 makes contact at time
9.7. This pair of relays then holds until time 9.5 (when cam P7 breaks contact)
of the reading cycle following the one in which the group selection punch is
recognized. Thus, in the numerical reading cycle of a card for which group
selection takes place, the circuit between read brushes for groups effected by
group selection and storage relays is by the B-C route instead of the k-C route.
VIII - 24
The timing of the events described above is shown on PX-11-308 where it is assumed
that group selection is stimulated by some punch on master card m.
8,»3,3. Reset and Finish Signal Circuits
Provided that relay 60 is activated and relay 59 is not a reset signal
is emitted via line 129 during the period 12,0 - 12.5 when cam P4 makes^ and a
finish signal is emitted via line 12? during the period 9.5 - 13 when cam P3
makes •
Relay 59 Is, activated when cam PI makes (13.1 - 14.9) through contact
R-57 AU provided that relay 57 has been activated; R59 holds until 13.0 when
cam PIO breaks. Now, in Section 8.3.1, it was pointed out that relay 57 is
activated during the period 8.0 - 12,5 which is the end of the control reading
cycle and the beginning of the numerical cycle for a master card. Thus, when
cam P4 makes during 12,0 - 12,5 and a master card is entering its numerical cycle,
no reset signal is emitted. Recalling the discussion in Section 8.1, concerning
the reader program controls in the initiating unit, one can see that since the
start flip-flop is not reset, the start relay remains activated (until a reset
signal is emitted during 12,0 - 12,5 in the next reading cycle) and that the
reader, therefore, proceeds with a cycle following the one in which numerical
data is read from the master card before it stops.
Similarly, since relay 59 remains activated through time 13.0 of the
numerical reading cycle for a master card, no finish signal is emitted and there-
fore no program output pulse can be emitted through Ro on the initiating unit
until the reader has gone through a numerical reading cycle for the detail card
following the master card.
The timing of the activation of the various elements involved in pro-
ducing reset and finish signals when a sequence consisting of detail-master-detail
ilvntion of "ie'-.l-.r '-a.' irxl)-;; ';lrolli^.s ii iiiwliiij D'Jtail-j ''■ii-ti-r-;.-ri:, .il
j'l Ui) ilCO
., 4
VIII - 25
cards is read is shown on PX--11-308,
Relay 60 is not activated v^hen there is not a card in position to move
under continuous roll No, 2 (i.e, when CR No, 2, CLC No. 1 is open). This cir-
cumstance can arise when a card jams in passing under continuous roll Nq,l,when
the reader is started (from rest) by pushing the reader start button or by the
reception of a pulse at Hi and then depressing the initial start key (see Section
8.1.3.), or when the last card of a deck is passing under continuous roll No. 2,
The previous discussion may be summarized as follows: In general, when
a detail card passes under continuous roll n^^ 2, the reader emits a reset signal
cJuring the period 12,0 - 12,5 of the cycle or when the card reading cycle is
about l/7th completed. This signal resets the start flip-flop so that subsequent
to the reset signal, this flip-flop is capable of noting the' reception of a pro-
gram pulse by Ri, V^th a sai'ety factor included, about 750 addition times should
be allowed from the time that Ri is stimulated until it is stimulated again if all
cards ir a deck are detail cards. Also, a finish signal is emitted at the end of
every cycle in which a detail card is scanned by the read brushes. Thus, about
2500 addition times elapse between the time when a detail card reading cycle
comraences and a program output pulse is emitted (provided that an interlock pulse
has been received).
No reset or finish signals are emitted in the numerical cycle for a
master card. These signals are, however, emitted during the mmerical cycle for
the detail card following a master card. i¥hen decks containing both master and
detail cards are used, approximately 3200 addition times may elapse between the
reception of a program input pulse at Ri and the resetting of the start flip-
flop and a program output pulse may not be emitted until about 4400 addition times
(as many as 2500 addition times for the reading of the master card and about 1900
for the detail card) after reading is stimulated.
VIII - 26
No reset or finish signals are emitted if a card jams in passing under
continuous roll No; land no finish signal is emitted for the last card of a deck,
8,k, I^UMERICAL CIRCUITS OF THE RE/JDER
The circuits in the reader which are used for numerical purposes are:
1) coding cams CB1-CB8 iwhich emit signals to activate the coding
relays in the constant transmitter via lines 115-122 (see
PX-11-119)
2) coding cam CB9 which activates the constant transmitter's PM
isolating relays by means of a signal carried on line 114
3) the read brushes which, by means of plug board wiring to the
storage relay hubs, remit numerical indication signals over
lines 1-80 to contacts on the ceding relays and thence to the
storage relays and which, by means of plug board wiring to the
minus control hubs, remit minus indication signals over lines
97-112 to the PM' and PM" relays in the constant transmitter.
These circuits will be discussed in greater detail in Section 8,6,
NUMERICAL CIRCUITS OF THE CONSTANT TRANSMITTER,
8,5, PROGRAii CONTROLS AND PROGRAi/ILlING CIRCUITS OF THE CONSTANT TRANSMITTER
The 30 program controls (see PX-11-307 and 11-302) of the constant trans-
mitter, each consisting of a transceiver, program pulse input and output terminals,
and a constant selector switch, are subdivided into 5 groups of 6 program controls
each. Groups 1 through 5 respectively consist of the following program controls
1-6, 7-12, 13-18, 19-25, and 25-30. The 30 transceiver neons associated with the
program controls are shown on PX-11*306,
VIII - 27
Each constant selector switch of a group of 6 is connected in parallel
with the other 5 switches of the group to the programming circuits which sleet
for transmission a signed 5 or 10 digit number from among the 4 signs and 20 digits
controlled by that group. For extimple, any of the first six switches can be used
to select for transmission either of the signed ten digit numbers A or B or
one of the 4 signed five digit numbers, A^, k^, B^, or B^, However, because of
the way these six switches are connected in parallel, it is not possible to elect
the transmission of a signed 5 digit L or R group on one switch and the trans-
mission of the signed 10 digit LR group having the same letter on another switch.
For each 5 digit group (whether read from cards or set up manually)
there are 20 constant selector gates (4 gates per digit). For the first 5 digits
in the storage relays, for example, these gates are nuiiibered B' - L' 1 and B' -
L' 21 (see PX-11-307) . These gates emit a signal on the coincidence of a signal
from a constant selector switch and the activation of the storage relay to which
the constant selector gate is connected or on the coincidence of a signal from
a constant selector switch and a signal from one of the constant switches.
hIso associated with each 5 digit card group is a minus selector gate
and a complement correction selector gate. Each 5 digit group that can be set
up on the switches located on panel 2 of the constant transmitter has a minus
selector gate but not a complement correction selector gate.
These gates emit signals on the coincidence of a signal from a constant _
selector switch and a signal from either a minus setting on a PM set switch or
from an activated PM' or PM" relay. The minus selector gates control the putting
in of the 9P for sign indication when a negative number is transmitted and the
complement correction selector gates control the putting in of the I'P needed
to make a tens complement when a number punched on a card as a negative number
TABIE S-3
GATES CONTROLLED Bt POINTS ON FIRST 6 CONSTANT SELECTOR SWITCHES •
BY FIRST DECK
■ FUiNfcrroii OF
GATE
OT SECOND DECK
FUl^CTION OF
Gi.TE
\
A'l
(2nd input from
P^I relay for it^
Rroup)
L M S
B' - L» 1
(bi)- L' 21
(2nd inputs fror
storage relays)
constant selection
for group
^L
At 21
(2nd input from
PM relay for A-^
^roup )
L C C S
h
A«41
(2nd input from
PM relay for Ai^
group)
RMS
B« - L' 41
B» - L' 61
constant selection
for group Aj^
' A» 61
(2nd input from
PM relay for k-^
^roup)
R C C S
^LR
A'l
L M S
B" - L' 1
B» - L» 21
constant selection
for group kj
B» - L» 41
B' - L» 61
constant selection
for group Ajj
A' 61
R C C S
\
A»2
L M S
B« - L' 2
B< - L" 22
constant selection
for group By
A' 22
- L C C S
%
A»4^
RMS
B' - L» 42
B' - L' 62
constant selection
for group B^
^LR
\ A' 2
LM S
B» - L« 2
3' - L* 22
constant selection
for group B^
B' - L' 42
B' - L' 62
constant selection
for group B^
A» 62
R C C S
VIII - 28
is emitted from the constant transmitter. Negative numbers are set up as tens
complements on the switches of panel 2 so that no complement correction selector
gates had to be provided for these groups,
associated vdth the five-di.-it groups having subscript L are left minus
selector (LKS) and, in the case of card groups, loft complement correction selector
(LCCS) gates; v^hile the groups with subscript R have right minus selector (RlviS)
and right complement correction selector (RCCS) gates. The 10 digit LR groups
have UiS ga.tes and RCCS gates. The UlS gates control the passing of the 9P to
only the m lead; the RlvIS gates, to the PM lead and 5 left hand places as well.
The LCCS gates or RCCS gates respectively control the putting in of the 1«P in
the 5th or 10th decade place from the left.
When a constant transmitter program control is stimulated, signals from
the 2 decks of the control's constant selector switch are delivered to the
appropriate constant, minus, and complement correction selector gates. Table 8-3
illustrates how the points r^n the first 6 constant selector switches are con-
nected to the various selector gates. The question of how the selector gates
affect the digit pulses emitted from the digit output terr^dnal will be taken
up in Section 8,6.2,
The constant chosen for transmj-ssion is emitted through the digit out-
put terminal on panel 1 of the constant transmitter during the 20 pulse time
peri od following the reception of the program input pulse. The program
control used emits a program output pulse at the end of the addition time in
which the constant is transmitted.
The constant tr^-nsmitter can be stimulated to transmit a constant stored
on the manual set switches at any time in the course of a computation. Constants
read from a given card can be called for any time in the period between the pro-
VIII - 29
gram output pulse emitted by the reader when that card is read and 50 addition
times after the leader is stimulated to read the succeeding card (see Section 8,3*1).
In general, only one program control on the constant transmitter can be
stimulated in a given addition time. Circumstances may, however, arise in which
the operator woaJ.d desire to stimulate- two program controls simultaneously.
Consider^ for example, a set-up in which the following rather particular-
ized conditions are found:
1) accumulator program controls are nearly exhausted
2) 5 digit numbers are used
3) both arguments for a multiplication program are derived from the
constant transmitter.
If the normal method of using the constant transmitter were used, both the ier
and icand for the multiplication could not be transmitted simultaneously from
the constant transmitter and received in the argument accumulators by moans of
the semi -permanent programming connections (Ra-Re and Da-De). Therefore, an
additional program control on one of the argument accumulators would have to be
esq^ended. Under certain specialized conditions which do not conflict with the
way in which the leads of the digit output terminals arc used (see Section 8,6.2.1),
two constant transmitter program controls can be stimulated simultaneously pro-
vided that a total of no more than 10 digits and a PM are called for.
Another special case which can arise is that the constant transmitter' s
program controls may not be adequate in number for some set-up. Under certain
circumstances (see Section 8,6,2,1.) the LB setting of a constant selector switch
makes it possible to obtain 2 five digit constants at the expense of only one pro-
gram control. This procedure, however, must never be used if at any other time in
-"Another way to circumvent a shortage of constant transmitter program controls is,
of course, to make use of the master programmer.
VIII - 30
the computation the L or R group identified by the same letter A, B, ..,, K is
called for separately as mentioned earlier in this section.
8.6. NUMERICAL CIRCi:;I''.'S OF THE CONSTANT TRANS'IITTER
8.6.1. Storing Information from Cards in the Constant Transmitter
Digital information is stored in five-digit blocl^each using 5 groups
consisting of 4 storage relays each. PM indication for each 5 - digit block is
stored in the associated PM' and PM" relays. Each storage relay bears the
designation i-j where i identifies the particular one of 80 digits anc? where j
has the value 1, 2, 2' or U of the pulse code in which the digits are transmitted
from the constant transmitter. The digits re^-d from a card are coded in the 1, 2,
2», 4 code by means of coding cejns in the reader and the Hi, isolating PM« and PM",
and coding relays in the constant transmitter before being put in storage.
The pick up coils of the 6 FM isolating relays are connected via line
114 to coding cam CB9 which makes contact while PM punches are read (see PX-11-307).
The PM' and PM" relays for each 5-digit block are connected through a contact on
one of the Hi isolating relays (labelled R on the schematic diagram shown on
PX-.11-116) to the line (97-112) which carries the minus indication signal for
that block of digits. If a minus punch is road for the group, the PM' and PiyI"
pick up and hold until information is dropped out when a new card is read or when
reset control takes place. Since the isolating relay contact is closed only during
the period 14.5 - 11.5> digit information punched in the same column as amuiuspunch
cannot activate the PM' and PM" relays.
The pair of M relays serves not only to remember sign indication, but
also aids in converting true negative numbers on the cards to nines complements.
When the PM relays are activated by a minus punch, the coding relays (C^-Cg) used
TABLE 8-4 - ACTIVATION OF CONSTANT TRi.NailTTER ST(mAC3E REUYS
Punch
Energized coding Cams
Adtivated Coding Relays
Activated Storage
Relays
-^ . .
Qone
'9
CBl
CB3
CB5
CB7
Cx or C'z
C3 or C4
Cc or C/
C7 or cS
1
2
2«
4
+1
CB2
^1 ®^ ^2
1
_ ._ __
-1
CB3
CB5
CB7
C-a or C,
C5 or C^
C7 °^ ^8
2
2'
4
■
+2
CB4
C^ or C^
2
-2
CBl
CB3
CB7
Ci ©r C2
C3 or C^
Crj or C3
1
2
4
+3
"-3 " *
CB2
CB4
CB3
CB7
^1 0^ ^2
C3 or C^
"'*'' *C"3 or'cT - - ^
C^ or Cg
1
2
, - - • ^ - - - - .
4
- .-.
+4
CB8
C^ or Cg
4
-4
CBl
CB7
Ci or C2
S <^^ Cg
1
4
*5
CB2
CBS
C, or C2
Cj or Cg
1
4
-5
CB7
C7 or Cq
4
+6
CB4
CBS
€-j or C.
C3 or C^
2
4
-6
CBl
CB3
^1 °^ ^2
C3 or C^
1
2
♦7
CB2
CB4
CBS
Cq_ or C2
C3 or C4
Co or Cg
1
2
4
-7
CB3
C3 or C.
2
+8
CB6
CBS
C3 or C^
C5 or C(^
Cn or Cg
2
2'
4
-8
CBl
Cl or C2
1
+9
CB2
CBA
CB6
CBS
Ci or Co
ci or cf
C^ or eg
Cy or Cg
1
2
2'
4
-9
n©ne
VIII - 31
for a five digit block are connected to the odd numbered coding cams. Otherwise
the coding relays are connected to the even niunbered coding earns.
Each of the k coding cams CBl, CB3, CB5, and CB? or CB2, CB4, CB6, and
CBS is connected through contacts on the PM' and PM" relays to the pick up coils
of a pair of coding relays (one even numbered and one odd numbered relay). Various
combinations of the coding Ccjns make contact as the different digit punches are
read by the read brushes (see the coding cam time table and Table 8-4). Vifhen a
coding caia makes contact it activates the pair of coding relays to -which it is
connected. The coding relay picks up and holds as long as the associated coding
cam makes contact,
A signal for a punch appearing in one of the first 3 places of a 5-digit
block is delivered to one contact on each of the odd numbered coding relays and a
signal for either of the 2 remaining places of the block to a contact on the even
numbered coding relays. Only the contacts on relays activated at the particular
time when the punch is read are closed so as to allow the punch signals to reach
the storage relays,
A signal carried on the i lead (i=l, 2, ,,,, 80) and passing through a
contact on coding relay C or C sets up the i-1 storage relays j a signal through
a contact on coding relays C^ or C , the i-2 relc^ys; a sign.'il through a contact
^ 4
on Cc or C/, the i-2' relay; and a signal through a contact on C^ or C , the i-4
relay. Table 8-4 shows which coding cams, are energized '<^s the different punches
are read, the coding relays that are activated as a result, and the storage relays
which are set up when a given line is passing over the read brushes if such a
punch appears in a column of the card. The hold contacts on the storage relays
for groups A, throu/'h H^ are connected to lines 81-96 respectively so that, once
set up, these relays hold until a new card is read or until reset control takes
USE
TkBLE 8-5
OF DIGIT OUTPUT T.K/.DS FOR CONST^.L^T SELECTOR SWITCH SETTINGS L, R, or LR
Lead
L
R
LR
m
0 or 9 sign pulses
0 or 9 sign pulses
0 ©r 9 sign pulses
10
digit pulses
0 or 9 sign pulses
digit pulses
9
digit pulses
0 or 9 sign pulses
digit pulses
S
digit pulses
0 or 9 sign pulses
digit pulses
7
digit pulses
0 or 9 sign pulses
digit pulses
6
digit pulses and 1»P
for negative L group
0 or 9 sign, pulses
digit pulses
5
digit pulses
digit pulses
4
digit pulses
digit pulses
3
digit pulses
digit pulses
2
digit pulses
digit pulses
1
digit pulses and I'P
for negative R group
digit pulses and I'P
for negative LR group
VIII - 32
place,
g.6,2. Transmitting Inf 3rmatlon frora the CQnst.ant Transmitter
In general, only one signed 10 digit or signed 5 digit number can be
transmitted from the constant transmitter in an addition tine. The digit output
terminal on panel 1 of the constant transmitter has 10 digit leads and a FM lead.
Each of the 10 digit leads is fed by U coding gates, the 1, 2, 2', and k? gates.
The digit leads for the fifth and tenth decade places from the 3-eft can also re-
ceive pulses from a gate -which passes the I'P, The M load and the digit Ic^^s
for the first five decade places from the left are connected to gates which pass
the 9P (see PX-11-307 and Table 8-5).
8.6,2,1, Constants rea,d from a card
The 1, 2, 2» and 4P gates for the first decade place from the left are
controlled by the 4 constant selector gates which receive one input from the 1, 2,
2' and 4 storage relays for the first digit of the L group, and the 2nd input from
an L or LR point on a constant selector switch; the 1, 2, 2' , and 4 pulse gates
for the second decade place frora the left are controlled by the constant selector
gates which receive one input from the 1, 2, 2' and 4 storage relays for the
second digit of the L group and the 2nd input from m L or LR point on a constant
selector switch, etc.
The gates which allow the 1» pulse to pass to the 5th or 10th from the
left decade place leads respectively are controlled by the left or right comple-
ment correction selector gates . The gates, which allow the 9P to pass to the PM
Vi \d or to the PM lead and the first 5 decade place loads from, the left, are con-
trolled respectively by the left or right minus selector gates.
ViJhen a constant transmitter program control is stimulated, the selector
gates chosen by the setting of the constant selector switch (see Table 8-3) emit a
^
TABLE fl-6
fo cmisTAm
A£ refers to a group Al storing a positive number; A^. "to a group A^ storing q negative numbero D. P. is used for the phrase "digit milsea".
PM
10
Gom-
ment
Al end D^
A.L and Bf^
set up in
storage relays
0
Al and Br
Al and Br
set up in
storage relays
D.P. for Al
Al «"^ %
Al and ^ set
up in storage
relays
Al and %
Al and Br
sot up in
storage
relays
Al and B^j^
Al and Bj^j
Impossible
sinoe 0P
for sign of
Br are
emitted over
leads 6-10
Impossible
since 9P
for sign of
Br are
emitted over
loads 6-10
DeP. fcr %
i. _, ,
j
I D.P. for Br
S.imultanaD U8 stimulation of two program controls F<y%
up for Al and Br transmission is possible when:
1. Al and Bj{ are always positive
or 2, Al aaj^ be Al but Br is always Bfe provided
that the accumulator which- receives Br has
a deleter for suppressing sign.
where only Af where only Al
and Br are set and Br are set
up in storage up in atort.ge
relays relays
0 j 9P
l^oP, for Al ; i^.P. for Al
Al '"^^^ ^m
where only At
and Br are set
up in storage
relays
h,T, for Al
a.nd UP
and I'P
D.P. for Br , D.P. for Br_ 1 D.P. for Br
and 1»P
and I'P
Simultaneous stimulation of P program controls
sot up for Al and Blr transmission is possible
wlian only 5 digitsAL and Bjj groups are sat up
in the stm-age relays and vdien:
1. Ar and Sr arn both always positive or
both always negative
or 2o Al raay be Af; but 3jj is B^ provided
that a PM deleter is used at the
acounulator iriiioh receives B]j.
.....^,.1..,
Ar and
%R
wtere only An
and Bf are set
up in storage
relays
9P
^r^^ Qlk
whore only Ar
and Bl are set
up in stor»ige
relays
D.P. for Bl
'^ n —
Impossible
since 9P ^or
sign of A:^
are emitted
over leads
6-10
fro VP'
D.P*, for Ar
Simultaneous stimulation of two
program controls sot up for Ar
and Bia trausmission io possible
when only 5 digit Ar and Bl
groups are set up in tho storage
relays and v/hon:
1. Ar and Bl are both always
positive
or ?» Bl is always ^l and Ar
always A^ provided that tho
accumulator which recol ves
Ar has a VtA ddleter and
provided that the I'P is
supplied at 'the accitfaulator
*%, which recoivtJB Bl»
D.P. for Al
I>.P. for
Al 1
1
♦1
i
n
t 1
H
(I
Ato and B, „
where only Al
and Bf:^ are set
up in storage
relays
9T>
^m ""^ ^LR
where only a£
and Bj^ are set
up in storage
ra^e ys
(no 1«P)
D.P. for B'
R
D.P. for Br
I
and I'P
Simultantxjus stimulation of tw>
program controls set up for Alr
and Blr transmission is possible
'.^len only 5 digit Al and Bj^
groups are set up in the storage
roltys and when:
1. Al and Bjj are both always
positive
or 2o Al and Bj^ ars l)oth always
negative provided that the
I'P is put In at the accu-
mulator vthlch receives Al
or 3, Al raay bo Al ^u't Br is
always B^ provided that a
PM deleter is used at the
accumulator wiiich receives
Br.
VIII - 33
signal if their corresponding relays hcwe been activated. The signals thus emitted
open the gates controlled by such selector gates and allow appropriate numbers of
pulses to be transmitted over the 11 leads of the digit output terminal. The leads
of the digit output terminal transmit information as shown in Table 8-5.
In Section 8,5, the statement was made that two constant transmitter
program controls could bo simultaneously stimulated or 2 five digit constants
could be transmitted simultaneously provided that no logical conflict existed in
the demands thus put on the leads of the digit output teraiinals.
Consideration of Tables 8-3 and 8-5 shows the eases in v^hich the simul-
taneous stimulation of two program controls is possible. Certain possible cases
are tabulated in Table 8-6 (cases not shown can be argued similarly). The illus-
trations of Table 8-6 involve groups A cmd B but any other pair of groups (with
both not necessarily being controlled by the same group of 6 constant selector
switches) can be treated in the samra way.
Similarly, it can be seen that a 5 digit L and a five digit R subgroup
of the same ten digit group can be called for simultaneously by the stimulation of
one constant transmitter program control sot up for LR transmission when:
1) Both subgroups are always positive
2) The left subgroup is always positive and the right subgroup always
negative provided that the^ sign of the right subgroup is corrected
at the receiving accumulator. This involves picking up the I'P
:>.a uni.ts decade of some accumulator and then transmitting it to
th^j ?}l d^^.ca,'lo of the accumulator which receives the R group,
3) Bo'-h rrubgroups ?.ri. always negative provided that the I'P needed for
a tens complement Is provided at the accumulator which receives the
left subgroup.
VIII - 34
8,6.2.2, Constants set up on set switches
The transmission of the J and K groups of constants is similar to that
for groups A-H except that there are no complement correction selector gates for
these constants and the other selector gates receive one input from the set switches
instead of from storage relays.
Notice that since no provision has been made for converting negative
numbers into complements in the case of the J and K groups, negative numbers must
be set up on these switches as complements and, since no complement correction gates
have been provided for these groups, tens complements must be set up.
8.7. ILLUSTRATIVE PROBLM
A problem illustrating the use of both the reader and constant trans-
mitter is discussed in this section.
In set-up tables, the symbol ""^ is written on the line corresponding
to the first addition tine of a reading program. For example, a reading program
which is stimulated by the program pulse 2-3 emitted at the end of addition time
6 is written on the line for addition time 7. Similarly dt is used to indicate
Ro
the reader interlock pulse. The symbol ._. designates the program output pulse
which the reader emits and is written on the line corresponding to the addition
time in which reading is completed. On set-up diagrams Ri, Rl, and Ro have been
drawn in the same relative position as they appear on.PX-9-302, The reader start
button is circled "Tcr a computation initiated by it.
The instructions for the constant transmitter are given in a double
column on set-up tables. The left half shows the program input pulse and program
control number on the first level, the setting of the constant selector switch on
the second level, and the program output pulse on the third level. In the right
TABLE 3-8
Computations to form |s| the t^^ term of Quantity N^, where k = 0, 1,
,, and 5.
(1)
(2)
(3)
(4)
'(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(U)
(15)
(16)
(17)
Vl,2^r^2,3
(1) . (2)
^,1 ♦ ^^^ "^ t^
^r t (3)
t^i
- a,
^r,l • ^+2,3
(2) . (6)
^r-l • (7) -
^r+1,2 • ^,1
(2) , (9)
• (10) =
tD2
t^3
r+2
" ^r+2,3 - ^+4,5
= (9) . (12)
= a^^^ » (13) -
° V3^4 * V2,3
- (9) . (15)
-r*4 • '"-^^ ' tS
i^k
t = 1, 2, 3, 4, 5
t
r
1 '
1
2
2
3
3
4
4
5
5
'CD
" ^v^.^^'2,3
(2)
' ^-3,4 "^4,5
(3)
' (1) . (2)
(4)
= ^r,l ^3) = - t^O
(5)
« a^ . (3) = . ^D^
(6)
' ^,1 • ^-2,3
(7)
= (2) . (6)
(8)
- a^.l . (7) = - tD2
(9)
" ^-1,2 • ^,1
(10)
= (2) • (9)
(11)
= V2 • ^^^> = - tD3
(12)
" ^-2,3 • V4.5
(13)
» (9) . (12)
(14)
= a^.3 . (13) = - ^D^
(15)
* ^-3,4 • ^r-2,3
[16)
- (9) . (15)
:i7)
* ^r-U • ^^^^ " ~t ^5
t = 6, 7, 8, 9, 10
t
r
6
5
7
6
8
7
9
8
10
9
•$«• all subscripts
r, r-i-1, ..., r-1,
. . • J are mod 5
c^
COHSTATIT TRAITSi-IITTER
i
I
i
. — 1
i
©•o« o • o • o»o» o«o» o»o#
o«o» o«o« o»o« o«o« o •To
o*o« o»o« o»o« o»o» o«r
Digit Output Topninal
.Setting of Constant
Selector Switch 26
Addition time in v/hich
prograra control 26 is used
Program pulse output terminal
for control 26
Prograa pulse input terminal
tot control 26
PI! for group-
Digits for Jk
group
Digits for %.
group
CONSTAIJT TRAIJSLIITTER
Panel 2
Jr
. — I I i \ L_ !
Digits for Jji group
— Digits for Kg group
Pig. 8-1
SET-UP DlAGRAil COWEIJTIONS FOR CONSTANT TRAHSMITTER
\^ I No.
TABLK ^-7
Tm^JB OF %
t = 1
t r 2
1<Q 1112:22X33x^1^x^5 ^2l^32''^H3^54^15
t s. 3 j t • i|
i
^31^i|3'^[33^l4^25 I ^^1^[)2^13^pM^^
^1 ^1 ^;'2^33^l;H^55
^'2 ^11^2 ^^33^11^^55
®2 ^32^3^3^54^15
t - 5
^5l^l2''^23^3n^l^5
t ^ 6
t = 7
t - ^
t - 9
-^512^2^33^24x15 -^11X52^43X342^25 ;-X2ixi2X53Xl|i|X35 hX3iX22Xi3X5i|Xi^5
3 ^42^53^l4''^25 ■ ^4 ^2^13^24^35 \ ^5 ^2^23^34^45 'i*"®5 ^^^2^33^24^15 "^l ^52^^43^34'^25 '■*^2 ^12^53^44^35
"^3 ^22^13^54^45
^21^3 ^43^^54^15 ^31''^ "^53^14^25 : ^4i^ '*-13^24''35 \ ^1^1 '^23'^34''45 ! ""^1^4 ''33''24*i5 "''^11^5 ''43^3^'^25 "''21*1 ^53^44^35 '"'''31^2 ''l3'^54'^45
^3 ^11^22^3 ^44^55 ^21^32^4 ^5^^15 ^31^42^ ^l4^25 ^4i^52®l ^24^35 ^51^12^2 ^4^45 ''"51^42^3 ^24^15 '*" ^11^52^4 ^^34^25 "^21^12*5 ^44^35
^"'4 ^11^22^33^4 ^55 ^21^32^43^5 ^15 ^3l^42^J3"l ^25 ^4l^53-^13®2 ^5 ^51^12^23^3 ^45
-X,-
51^42^33^2 ^15 "^11^52^43^3 '^^5 '^2l^i2^53®4 ^35
"^31^22^1 ^Sj4^45
"^31^22^13*^ ^45
Nk XXX x,.v fj X X X, X , a x x, x x . a x, x, x x , a x x x x , a j -x x, x x a -x x x x a -^-x x x x, , a t—x x x x , a.
^ ; li 22 3J ^^^5 21 32 43 54 1 31 42 53 l4 2 4l (>2 13 24 3 51 12 23 3^ ^ i, P ^2 33 24 1 11 52 43 34 2 j 21 12 53 44 3 31 22 1$ 54 4
t r 10
-XI11X32X23X14X II
"% "^32^23^14^55
"^41^3 ^23^14^55
"^4l^32®2 ^^14^55
"^^41^ 2^23^1 ^55
-X,, X _x X , e,
4i 32 23 l4 5
VIII - 35
hand half the constant transmitted is specified. The symbols are written on the
line for the addition time in which the constant is transmitted.
The set-up diagram conventions for the constant transmitter are shown
on Figure 8-1.
The master programmer is also used in the illustrative problem of this
section. In most cases, the symbols used are explained where they appear. For
further details see Chapter X.
The illustrative problem of this section consists of forming the six
quantities I^ through Nc each of which is the sum of the 10 terms shown on Table
8-7, Vfe assume that the N, are to be evaluated for 100 different sets of values
yu . but that the a- do not vary from set to set. We assume, also, that the numbers
"^ digit,
Xj^jjSnd Aj_ are 5 a numbers between 0.1 and 1.0 and, further, that the numbers x^j_.
are non-negative for all sets.
The numbers a 2^ Q-'^j a^, andac will be stored on the constant set
switches. The numbers x. . and a, are to be introduced into the ENIAC by means
of punched cards. The subject of storing these numbers will be treated in more
detail presently. At this point, however, we wish to describe the routine which
will be used to form the numbers Nj^,
Table 8-8 presents a sequence of multiplication programs which could bo
used to find the one term for each of the numbers N, . From one value of t to
k
another, the most striking change in the computations consists of using different
sets of the x. ., One distinction between the computations for t « 1 through 5 and
those for t - 6 through 10 consists of the fact that in the former the A^ are re-
quired in ascending order of subscript and in the latter, in descending order of
subscript, a second point of difference is that in the first class we are interested
in the terms (4), (5), (8), (11), (14), and (l?) and in the second class, in t-^e
VIII - 36
negatives of themi The operations of forming terms (l) through (17) will be
referred to as the multiplication sequence. In order to provide for the differences
noted above this sequence will be modified as multiplication sequence A or B for
t = 1 through 5 or t = 6 through 10 respectively. The quantities l^ through N.^
will be found by repeating each of the modifications of the multiplication sequence
5 tiraes.
Now we return to the matter of storing the nur^ibers x^ . and a^. In all,
26 numbers are to be introduced from punched cards. Since, only 16 five digit
constants can be obtained in one card reading, at least 2 readings are required
for each system of equations. Since, furthermore, the constants are needed re-
peatedly in different combinations, either they must be read repeatedly from cards
or
on which they occur in different combinations*at least 10 of them must be read
from 1 card and stored in accumulators to be available when the card containing
the remainder of them is read. The latter course is adopted here. The constants
needed to form the terms listed in columns t = 1 and t = 6 (see Table 8-7) are
read from a card and transferred to accumulators. Then, computations start for
these values of t and meanwhile the reader scans the card containing the remaining
numbers. As it turns out, only B accumulators are available for storing the 10
numbers read from the 1st card. Therefore, in each of 2 accumulators, we store
a pair of numbers, one in the 5 left hand decades and the other >i the five right
hand decades. The 2 pairs of numbers are chosen from the x^^ terms, since it is
easiest to store two positive numbers in one accumulator.
One further consideration influences the manner in which the constants
are stored. The x. . and a. are all destined to go to the multiplier unit and wo
wish the resulting products to be similarly located in the decades of the product
accumulator. One way to accomplish this is to align the numbers similarly in the
argument accumulators, let us say at the extreme left* This, then, requires that
#
FIRST CnRD
TaBLE 8-9
STORAGE OF CONSTANTS
SECOND C/iRD
Constant
Transmitter .
Group
Constant j
Accumulator to
which constant
is transferred
Constant
Transmitter
Group
Constant
Accumulator to'
which constant
is transferred
^L
^22
IL
^L
*12
"R
^1
IR
%
^21
%
\h
2L
h
^32
Br
X33
2R
\
^31
<%
^1
8L
Cl
^52
Cr
^55
3R
Cr
^a
i'l
\
^u
Dr
^51
4R
Dr
^13
%
^24
5L
El
^34
\
%
X23
Fl
Fl
^^54
h
^15
6R (clear at
end of 3rd.
M.S.)
Fr
^43
Gl
Gl
X53
6R (after
third M.S.)
Or
%
X
25
Hl
^42
7L (clear at
end of 3rd
M.S.)
«L
X35
7R (after
fifth M.S.)
«R
Hr
^45
Jl
^2
.
Jl I
^•2
Jr
a3
•Jr
33
•^L
^4
Kl
\
%
^5
Kr
^5
. i.
TABLE 8-10
SET-UP i^Ni^LYSIS FOR EVi^LU.xTION OF Tffii: NMBERS N,
k
INITIAL SEQUENCE: Read
1-1 Transfer constants from constant transmitter to accumulators
2-1 Read in parallel with sequence 2,1 and 2,2
2,1-1 Multiplication Sequence A
Form Terms (l) - (l?) f or i « 1
Receive Terms (4), (5), (3), (11), (14), and (1?) from product
accumulator' s h output via a input channel of accumulators
14, 16, 17> ..*, and 20 respectively,
2,2-1 Multiplication Sequence B
Form terms (l) - (1?) for i = 6
Receive terms (4), (5), (8), (11), (14), and (1?)
from product accumulator's S output via 3
input channel of accujuulators I4, 16, 17, ..., and 20
respectively,
3-1 Send Interlock Signal to Reader
4-4 Multiplication Sequence
4.1-1 A for i = 2, 3, 4, 5 in turn
4.2-1 B for i = 7, B, 9, 10 in turn.
5-1 Bead and, in parallel, print and then selective clear
■j'-The number following a dash indicates how many times the sequence identified by
the number preceding the dash is to be repeated.
VIII - 37
numbers stored in the right hand side of an accumulator or a constant transmitter
group be shifted to the left upon reception in an argument accum.ulator and that
those stored at the left, not be shifted,' Then, to make the computations for
all ten columns precisely alike, all numbers which are used in the same programs
from one multiplication sequence to another must be similarly located with regard
to side left or right of storage facility. This plan calls for storing x. for
j even at the left and for j odd at the right. This necessitates moving certain
X. . with odd j out of left hand constant transmitter groups (where they are
temporarily located for want of free right hand groups) into right hand accumulator.
groups when the latter become available because the numbers they store at first
are no longer needed. Table 8-9 shows a plan for the storage of constants re-
quired in this computation.
We return to a broad discussion of the plan for the computation. For
each set of numbers Xj^p one card containing 10 of them is read. These
numbers are put in storage in accumulators. Immediately, computation of the terms
in columns t = 1 and t = 6 of table 8-7 starts and the reading of a card with 16
more numbers begins. When the reading of the 2nd card is completed, computation
for the terms in the remaining columns of table 8-7 is carried out. As the various
terms of the N^ are computed they are emitted from the product accumulator both
additively and subtr actively. In multiplication sequence A, these products emitted
additively are received in accumulators 14, 16, 17^ •••> 20; in multiplication
sequence B, the products emitted subtractively are received in these same accumu-
lators. After 10 repetitions of the multiplication sequence, the 6 numbers N^^
are stored in the accumulators mentioned above. The values are printed, and the
accumulators which store N are then selectively cleared. While printing takes
k
place, the first card for the next set of x^. is read. This plan is summarized in
table 8-10,
TftBue 8-11
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Distinguishes Between First and Secojii Card Reading
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Multiplication Sequence St«ppejr
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9-
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Ace, 14 receive on a
. . ^
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2-8
. output of
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2-\(>
10-2.
2-4-
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14.16,17,13.19
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Os ^® ^4 ^© Qj /^(?^' ^2 /^@ Q/ /^®
Fig. 3-2
MASTSR PROGEAMMSR LIK£2
EVilLUATIOH (J* ^y-
VIII - 38
Figure 8-2 shows how the nain program sequences are linked together by
the master programner. Stepper B is used to determine whether reading is the
first for a system of equations (stage l) or the second (stage 2). For the first
reading, stepper B shifts control to stepper C which counts the number of solutions
and the n , routes control to stepper A which directs the main sequences of the
problem.
The output of stage 1 of stepper A stimulates the sequence in which
constants from the first card are put in storage in accumulators. The output of
stage 2 stimulates the reader and also goes to stepper H which controls the multi-
plication sequence. The output of stage 3 provides an interlock pulse for the
reader. Control is shifted to stepper H again by the output of stage 4, The
output of stage 5 stimulates the reader and printer. The output of the reader
goes back to stepper B, etc.
Specific details for the set-up of sequence 1 are given in Table 8-11.
5
On the line for addition time I-l, the symbol 0,0 5 in the contents column for
accumulators 14, 16, 17, .**, 20 which will store the N terms indicates that the
k
decimal point occurs one decade place to the right of the PM counter and that these
accumulators clear to 5 in the 6th decade from the PM place. During addition times
4-13> the constants x-. (for i = 1-5), x-., x , x , x.^, and a. are transferred
from the constant transmitter to accumulators 1-8. Notice that constant transmitter
program controls (T) and (2^ set at A, and A respectively are used serially for
the transmission of x^p and Xn-, instead of one control set at A-rp as would be
possible since both constants are positive. The reason this must be done is that
when the second card is read, we must enter At and Aj> separately for Xj^p* ^21
(see Table 8-9) which may or may not be positive.
The multiplication sequence of the problem which is repeated once as
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VIII - 39
2.1, once as 2,2, four times as 4.1, and four times as 4.2, is described with
the aid of the follovdng tables and figures:
Table 8-8 Computations to form fsj
Table 8-9 Storage of Constants
Table 8-13 Set-Up Table for Sequence 2.1
Table 8-14 Set-Up of Function Tables for Programming Transmission
of Constants
Figure 8-2 Master Programmer Links
Figure 8-3 Set-Up Figure for Sequences 1 and 2,1
Table 8-9 shows that the x. „ and a^ are stored either in left hand
1 , 2n 2n
constant transmitter groups or in the five left hand decades of accumulators and
that the X. o +1 ^^ ^Pn^l ^^^ stored at the right. Therefore, to make the most
efficient use of the high-speed multiplier, the Xj_ 2n+l ^^® shifted five places
to the left when they exe received in the ier or icand accumulators, A +5 shifter
(which shifts numerical data 5 places to the left) is used at the 3 input terminals
of the ier and icand accumulators and arguments of the form x^ 2n'^l ^^® received
over the 3 input channel. Also, because certain accumulators store 2 numbers, it
is necessary to delete the five right hand digits of an icand received from a left
hand group when the icand is of the form x^ 2n+l« ^' ^ -"-"^ deleter is used at the
a input terminal of the icand accumulator for this purpose. A similar deleter is
nnt needed at the ier accumulator since the high-speed multiplier uses only as many
p.''. aces of the ier as specified on the places switch.
Examination of Table 8-8 shows that the 1? multiplications of the
multiplication sequence fall into three groups with characteristics as shown below:
All 17 multiplications are arranged in a predominant sequence with
TABLE 8-12
ANALYSIS OF MULTIPLICATION SEQUENCE
Group
Multiplications
Characteristics
(3), (7), (10),
(.13), and (16)
(1), (2), (6),
(9), (12) and
(15)
sWfl
Arguments derived from same source and products
received from product accumulator in same way
for all 10 repetitions,
Arg^orients located in different places for the
various repetitions. Products received from
p:roduct accumulator in same w£iy for all repetition^
(4)
(5), (8), (11),
(14) and (l?)
ler located in different places from repetition )
to repetition. Product received from A or S out- J
put of product accumulator on alternate repetition
ler located in different places for the various
repetitions. Furthermore, ier must be received
sometimes on a and sometimes on 3 input terminal
of ier accuniulator* Products transmitted re-
spectively from ii. or S output of product accumu-
lator are received through a or 3 input channels
of accumulators 14, 16, 17, .... 20 on alternate
repetitions.
• * . J
tabu: f^-i^
SRT-UP OF BTJNCTION TABLKS* FOR PROaRAMIflNO TRAlO!ISSI0N OP 3(»JSTANTS
FUIICmON TABLE 1
^a i a5 a6 a7 j a^
0
1
2
3
9
M
A9 AlO ; B5 I B6 J B7 I Bg I B9
BIO
FUNCTION TABLE 2
BI2 ^ Pm ! A5 \ i^ i A7
I l9
..^ — . — i..
— f
.f. --- ..>.l.... ,_-l. ..
r 5 T
7 etQi
Use
<
T"""""'
Ut
A^
A9
! 9
1
AlO { B5
... ,-L ,
. — i.
t-i 1--t
(i) irarae-
or
(d) with
one 8dd»
ttee
delqr
3^11 3C11 X12 xi3 Xi3 x^i^ : xi5 1 X21 J X21
^22 ^ ■ ' i i| I
., — _.. ^____.^ _^4 ii 4 — —
^23, ^23
^24
— ^Transmit
a6
B7 B^
B9 I BIO
FUNCTION TABLE 3
i=--
■ms msx i A5 a6
A7 A«
A9
AlO
*L-
_1
; -
^25
X31 I X31, X32 X33I x33iX3i| 1x35 x4i :;x4i H2 ^0^3
1
i-- 4-
-"-" — t™-
T"
— ^ Rap lac©
d , i
■T-
-—-4-----
r^
^3 H5 ;3C5i ;X5i ;X52 X53 JX53 |x^j^ 1x55 I ^5
' f53
in
i : d d
f
pro gram
line used 3-2 3-3 3-^ 3-5 3-6 3-7 3-^1.3-9 3-10 3-11! ^-ij ^-2l Mj 3-3 M
for signal
i i d
iacc.
' 6h
ll'^t't: sw. .^.o*r-3Sff:W7!a=r>i -aa&Tf^
.,-4^.,„
l|-6 l^-7i 4-^ M 4-10 J^ -11 5-1; !3-2' 5-3^5-^ M
5-6 !5-7
5~f^
5-9 5-10 55-11
X42
in
ace.
7L
by
X35
1 in
acQ(
7R
6-1 6-2
6-4
* It is assumed here that the function tables huvo been nodifiod for the stoi^ge cf progromming daiia as suggt^stod in ^ec, 7»^» Furthortnore , an adaptcjr
is used at the function output terminals to take information from digit torrainals to pro/pran teminalSe
VIII - 40
multiplication (l) loading to multiplication (2) etc. For group h, the predominant
r-inuonce also procures the r.rgiiniants and stimulates accumulators to receive the
pror-j.etii-. The program pulses for this predominant sequence are carried in program
•crv.-G *;' •T'i 8, For ;,;rc;ip "8, the predominant sequence include.^ the stimulation of
bill; high-speed multiplier program controls used and also the stimulation for re-
ceiving products from the product accumulator. An auxiliary program sequence
(carried in program trays 3-6) obtains from function tables 1, 2, and 3 programming
instructions for procuring the arguments for the multiplications of group B.
Group C is handled in the same way as group B except for the manner of stimulating
reception of the product which is described below. The predominating sequence
goes to steppers G and either E or F for instructions as to which argument to use
and which high-speed multiplier prograjii control to stimulate for a multiplication
in group D (the program pulses in this sequence are carried on lines 9-1 through
10-2), A third auxiliary sequence (whose prograra pulses are carried in trays 10
and 11) stimulates the reception of the products from the product accunaulator for
groups C and D» Stepper K of the master programmer controls this third sequence.
The set-up shown in Table 8-l3 actually lists the events of sequence 2,1,
Sequence 2.2 in which the terms .|\J are computed resembles sequence 2,1 except
for the constants chosen for the multiplications of groups B, C, D, and E and
the fact that reception of terms for the various Nj^ in accumulators lA, 16, 17,
,,,, 20 is through the 0 input channel. Sequence 4 is carried out in the same
way as sequence 2 with the multiplication sequences A and B alternating. Sequence
5 in which the final results are printed is described in Section 9 •5.
Couplin(^ ^wkVj
PROMT PANflL NO.i
PX-12-30iR
Off HINT
HEATERS
offQ on
OfF PRINT
7
Off PRINT
t
OFf :print
z
OFF mm
3
OFF nm
A-
OFF PRWr
6
OFF RINT
n
IB.H,
^ HOURS
0 □ O
O WkNELZ O
OfF PKWT
13
OFF PftlNT
10
Opri'saNr
OFF PWWT
12
OFF PRINT
1+
Off PRINT
IS
OFF PRINT
lie
OFF mnj
Disconnecfor Swik-K
PX-12-302R
9-10
13-14
0
o
PRINTER
6
' i-
fUtfias
o
0
o c
\\-\2.
0
14-15
o c
15-16
o c
12-13
o c
16-1
o c
Cowpling Switch
PRJNTCR
FRONT FANCL NQ3
Q
<*
^ ^:;^
'^^
P/ - /^ - 3 0 1
IX - 1
IX. PRIrlTER AND IBM G/ilIG PUNCH
The ENLA.C records 80 digits with as many as 16 signs on a standard
IBM card (see Chapter VIIl) by means of the printer which is connected to a
modified IBM gang punch. Data to be recorded is delivered from the static
outputs of master programmer decades and accunmlator counters to the printer.
Cards may be punched at the rate of approximately 100 per minute. If/hen
printing takes place, the counters from which data is recorded are tied up
for abo'ot 150 ms . or 750 addition times v/hich is only part of the total
printing time (0.6 sec).
The printer and IBM gang ijunch will be discussed in this chapter
along the following lines: Sec. 9.1, prograrmrang circuits; Sec. 9,2, plug
board, of the IBM gang punch; Sec. 9.3, numerical circuits; Sec. 9.4, units
connected to the printer. An illustrative problem is discussed in Sec. 9.5.
The following diagrams will be referred to:
IBM Card Punch PX-12-118
Printer Block Diagram PX-13-307
Printer Front Panels PX-12~30l, 302, 303
Printer Front View PX-1 2-306
IBM Punch Plug Board PX-1 2-305
Initiating Unit Front View PX-9-305
Initiating Unit Front Panel PX-9-302
9.0 GENERAL SUI^SiARY OF THE IBM PUNCH AND PRINTER
Data stored in electronic counters of certain units of the ENIaC
(see Sec. 9.4 for a list) is taken to an array of tubes in the printer by
static outTDut loads which run along a trough af the top of the ENIaC,
IX - 2
For each 5 digit group (of the total of 80 digits which can he punched on one
card) there are 5 rows of 10 tubes each for the input of digital data. These
tubes are labelled by a letter from A to E followed by a number between 0
and 9 inclusive. In addition, for each 5 digit group, there are 3 tubes for
recording minus indication belonging to the group. Associated with each
input tube is a printer relay. The printer relays for digits are labelled
in the same way as are the tubes. The relays for minus sign indication are
labelled Ml » M2, tmd C^, The last relay, 0^, is- referred to as the carry-
over relay. A printer relay is activated when its associated tube goes "on".
The hold contacts on these relays are connected to the holding cam in the
punch (see PX-12-112) so that -when this cam breaks at time 9.5 in the card
punching cycle^ the printer relays release.
It is to be noted that the input tubes and printer relays are set
up in accordance with the digital information as it is stored in the accumu-
lators connected to the printer, i.e. complements '^are set up as such.
Complements are converted to negative numbers before punching takes place
through the intervention of relays C-j_ through G^, the PM relays. Ml and M2,
and the carry-over relay, C^. The carry-over cam in the punch (see PZ-12-112)
also plays a part in this conversion.
In the IBM punch, as in the reader, there is an emitter with 12
stages (12, 11, 0, .,., 9 with stage 11 the minus punch stage). Certain
stages of the emitter are connected through so called PM transfer contacts
on the minus relays (Ml and M2) to contacts on the printer relays which
'-i^The card punching cycle is divided into 14 units as is the card reading
cycle discussed in Sec, 8.0,5,
■)K)^ln this chapter, the word complement is restricted to mean the complement
of a positive number.
IX - 3
register digital information. The latter, in turn, are connected through
transfer contacts on the rel&yc C^ through C^ to linec which carry signals
for punches in the various columns to the computer result exit hubs on the
IBi: punch plug board (see PX-.l?.-305). By means of plug board wiring, these
signals can be delivered to the punch magnets (see PX-lS-112) for any
desired column of the card.
Each of the 80 punch magnets operates a lover with a little head
on it. Waen a punch magnet is activated, the lover novos forv/ard and a
hammer bar in the punch hits tho head of the lever against a punch sheift.
Thus, a hole is punched in tr.c column vrith v/hich the lovor is associated.
Since, throughout tho punching, the card moves forvfard in synchronism with
tho emitter, the hole is punched in the digit row corresponding to the
activated printer relay for that column.
Data may be punched in all 80 coli.a:ins of the card or, if desired,
certain columns or 5 digit groups may be left blank. If the print switch
of a 5 digit group (see PX-12-302) , which has the positions "print" and
"off", is set at off, the printer input tubes for the group of nuinbers do
not set up and punch signals for that group are not delivered to the IBM
punch (see Sees. 9,2 and 9,4), No punch is made in a column for which there
is no plug board connection between computer result exit hub and punch
magnet hub.
The total of 60 digits can be broken up into signed 5, 10, 15, .,.,
or 80 digit groups 'oy means of the coupling switches on panels 1, and 3 of
the printer. The numbering on these sv/itches corresponds to the numbering
of the printer relay groups (see Sees. 9.2 and 9.4). ?i/hen a coupling sviritch
is sot at C, the 2 five digit groups whose numbers appear on that coupling
IX - 4.
SYfitch are consiclorecl as ono for sign indication purposes and for coinple-.
mentation. If tvfo adjacent coupling sv/itchos aro sot at G, the throe groups
vmoso numbers appear on tho .sv/itchos arc considered as a single 15 digit
group, etc. The use of PM adaptors is also involved in tho coupling or
isolation of fivo digit groups (see Sec. 9.4),
Certain progra^iming circuits for both tho printor and punch arc
located in the initiating unit of the EiilAC azid others arc in tho punch
itself. Located at the initiating unit (sec P}U12-307 and 9-302) arc tho
printer program pulse input terminal, start flip-flop (68, 69), finish
flip-flop (64, 65), synchronizing flip-flop (67, 68), program output pulso
transmitter (70-72) and terminal. Neons correlated -vvith these flip-flops
are sho^Arn on PX-9-305. The start flip-flop operates a printer start relay-
located in the printer.
On the punch there are start and stop switches and a master-
detail sv^itch (v;hich should, hovrever, always be set at master). Inside the
punch are found a start relay (RlO) , the motor hold relay (R9 and H.D, No, 1
motor relay, relays 1 and 3 Y/iiioh are associated respectively v/ith tho die
card lever contact (Die GLC on PX-12-112) and the magazine card lever
contact (Hag. CLG .)» ^'^'^ relay 23. The program controls in this and the
preceding paragraph have to do with starting and stopping the printor and
punch and will bo discussed at greater length in Sec. 9,1.
In addition to tho switches and relays mentioned above, two of
the cams in the punch, the interlock and reset cams, act as programming
circuits. The timing for those cams is shoYrn on PX-12-112 and 12-307,
■^on the interlock cam makes contact, and -when the stcirting relay located
in the printer (see PX-12-307) is activated as a result of the reception of
IX- 5
a program pulse by the printer program pulse input terminal, the input
tubes are connected to 20V, v/hich allows all groups with print switch set
at print to set up. lAlien the interlock cam breaks ( 12,8-.13»3) , the input
tubes cannot set up. The reset cam which makes in the period 11.2 to 11.8
provides a reset signal for the start flip-flop {63, 69) and sets the printer
finish flip-flop (64, 65) v;hich results, finally, in the transmission of a
program output pulse by the printer (see Sec. 9,1),
9.1 PROGRAJ^il'aNG CIRCUITS OP THE FRIHTER MD IBLl PMCH
A prograis pulse received at the printer program pulse input
terminal on the initiating unit flips the printer start flip-flop (68, 69)
into the abnormal state. The resulting signal from the start flip-flop
energizes the start relay in the printer.
Provided that thoro is at least one card in the magazine (so
that Mag. CLC is closed and relay 3 is activated) and provided that
thoro is a card in the punch position (so that Die GIhC is closed and
relay 1 is activated), the signal from the printer start relay carried to
the punch over circuit 1-11 activates R23. As long as the printer stop
switch is not thrown and under the conditions noted above for Mag. CLC
and Die CLC the circuit to the punch start relay (RlO) through R23 BL is
now closed so that RIO is activated. Now, with contact RlO BL closed, the
motor hold relay (R9) and the K.D. No. 1 motor relay in parallel vath it
are activated so that the drive motor starts up. Also, with RlO BU closed
the printer clutch is activated so that a card is pushed through the punch-
ing apparatus. RIO holds through its hold contact RIO AL until cam P5
breaks at time 9 in the punch cycle.
IZ - 6
With all the cards in the magazine and no card in the punch
position, the print or cannot be started by the procedure described in the
previous paragraph since Die CLC is open whon there is no card in the
punch position. If the start switch on the punch is depressed first, one
or more cards (depending on how long this switch is depressed) move out
of tho magazine so that subsequently the punch and printer can bo
stimulated to oporato by a program pulse received at Pi on tho initiating
unit.
The chronological operation of the punch, once the printer start
relay is activated"'", is sum:marized in Table 9-1,
The signal from the reset cam (during 11,2-11.8) is taken back
to the printer program control circuit in tho initiating unit via line 38,
This signal resets the printer start flip-flop and sets the printer
finish flip-flop. Ulth the printer finish flip-flop in the abnormal states
a GPP is gated thr ough |66j so that the printer synchronizing flip-flop is
set. Thus, gate 69 is opened to allow a CpP to pass to the progran output
pulse terminal. Notice that tho printer start flip-flop is reset so
that it can recognize that a new printing program is to take place if
another prograr^i input pulse is received and a program output pulse is
transmitted about 750 addition times after Pi is stimulated or about
1/4. through the punching cycle.
If the printer is engaged in a printing program and another
program input pulse reaches Pi before the start flip-flop is reset,
naturally, the reception of this second program input pulse is not noted.
Therefore, if printing programs are to follow closely on one another.
^<About 10 ms elapse between tho reception C)f a program pulse at Pi and
the beginning of the card punch cycle.
Tj\BLE 9-.1
CliRONOLOGICAL OPERATION OP PUNCH
T imo in
Card Punch
Cycle
Evont
L-:.-
z=^
D =
13.5
14.5
12.8
Punch starts - interlock cajn is making contact
i
i
4-—
11.0
11.2
11.8
0
=(
■;^
9.5
13.3
13.5
Holding cam makes
Interlock cam breaks
Minus punches arc made
Rosot cam makes
Reset cam breaks
Digit punches arc made
Holding cam breaks so that printer relays
release
Interlock cam makes again so that input
tubes can set up for next printing
Punch stops unless Pi received program
pulso during period 11.2 - 13,5
IX - 7
the progrsanming sequences that culminate in a pulse to Pi should be initiated
by a program output pulse from Po, the printer's x^^o^^rairi output pulse termi-
nal, so that there will be no danger of tho printer's receiving a program
input pulse v/hilo tho start flip-flop is in the iibnormal state.
If the printer receives a program input pulse while engaged in
printing but after tho start flip-flop hus boon reset, then the start flip-
flop is again flipped into tho abnormal state. The printer and punch
continue with the punching cycle in which they are engaged. Since the
interlock cam breaks at time 12.8 (before the start flip-flop is reset) the
printer input tubes cannot set up for tho second printing program until
at least time 13.3 in the punch cycle when the interlock cam once again
makes contact (see Sue. 9.3 and Table 9-l). VPaon the first punch cycle is
coD.pleted, the printer and punch immediately start a second cycle in the
event that Fi is pulsed between the resetting of tho start flip-flop and
the completion of tho cycle,
'iVhcn tho interlock cam broaks at time 12.8 (without a safety
factory about 150 ms after Pi is stimulated) the printer input tubes drop
out their information so that the units which are connected statically to
the printer are free for computing purposes again. Before this time, such
units cannot be called upon for computational programs. Program sequences
which require computations in units connected to printer groups whose
print switches are in the print position and which partly parallel print-
ing should be initiated by tho program output pulse fromi the printer, so
that there v/ill bo no danger on this score. Units not connected to the
printer are, of course, not affected by printing programs and can be used
for computing programs throughout printing if such a set-up is desired.
FX-/0-4/4
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/'Z- /- 4(U
CX-n- <<oi t.
p
^
s-^
FLUr, BOivKD FOli GANG .-..^Zti
'■> O D
)roup 5
o o o
- Group 9
o o o
Group 13
Conputer Result Kxit
o o
- — I —
o o
O I o
o o o
- Group 6
o o o
Group 10
o o o
Group 14
o I o
I
i
o : o
o ! o
o o
— Group 7 —
o o o o
- Group 11 - -
o o o o
Group 15 —
oooooooooooooooo
1 ~ 2 - 3 - Minus Indication —- 10 11 12 13 - U 15 16
oooooooooooooooo
PL to iiinus Ind Column Splits
OrvOOOOOOOOOOOOOOO
t'L to Coraputer Result njcit
oBooooooooooooooo
PL to i^\inch Magnets
o C o
12
oooooooooooo
oooooooooooo
oooooooooooo
5 Punch iMlagnets ■ — -15
oooooooooooo
25 30 35
oooooooooooo
45 50 55
oooooooooooo
65 70 75
oooooooooooo
^ , Indt^er^tpj^t ^ ^ ^ ^
ill jp il l2 IJ iA is 16 l7 is i:
i i
'f' f ^
o o o o o
Group 4 -
o o o
Group 8
o o o
Group 12
o o o
Group 16
o o o o
o o o o
o o o o
o o o o
o o o o
o
o
o o
'2Ci
o
o
o o
40
o
o
0 o
60
o
o
o o
80
o
o
o o
o- o^
o o
o —
o - o
o — o
o o
.. ^
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c\ ^•;
?: ^
• CA,■^^
c^ ^
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o o o
30000000000000
oooooooooooooooooooo
oooooooooooooooooooo
oooooooooooooooooooo
oooooooooooooooooooo
oooooooooooooooooooo
oooooooooooooooooooo
oooooooooooooooooooo
oooooooooooooooooooo
^
IX - 3
'ATion tho intorlock oojn makes contact again at tJiriG 13,3, tho printer
input tubes do not set up again in a given punch cycle unless Pi receives a
program input pulse during the period 11,2-13,5 since the input tubes are
connected to the interlock cam through a contact on the start relay.
In the printer, as in the reader, a design is used in which a
pulse stimulates successively tho uns^/nchronized flip-flop, a gate, the
synchronizing flip-flop, another gate, and the transmitter. This insures
the omission of a program output pulse synchronized with tho pulses in the
rest of the ENIAC and of the proper sheipo.
It is to be notod that in this discussion a number of olements in
the punch such as R22, R7, H8 , R2, and R14 have not beon mentioned. Dis-
cussion of those relays v/hich, in a standard summary punch arc functionally
significant, has boon omitted since in the card punch, as it has been
modified for connection v;-ith the printer, thoy servo no logical purpose,
9,2 IBM GANG PUhCII PLUG BOARD •
The IBM gang punch plug board is shovm on PX-12-305. The computer
result exit hubs appear at the top. Those hubs are classified in 16 groups
of 5 hubs oach. The numbering of the groups hero corresponds to the number-
ing of the groups of printer tubes and associated relays in the printer
(see Sec. 9,4 for a list of the units connected to the various printer groups),
Prom the printer relays that store digital information tho computer result
exit hubs receive signals via the cable that connects tho printer to tho
punch. Each minus indication hub receives a signal froi;i a contact on tho M2
rolay of tho print-r group bearing tho same number as appears above tho
minus indication hub, if that. printer group stores a complement.
PLUG BOhHD FOU GANG FJICh
^ C\ ^
.12
U
adtter Outwt
1 1 L- 1
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
6
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
6
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o'
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
„7
6
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
-o o-
o-
o-
o-
o
o
o
o
o
o
o
o
o
-o a
_o o a-
-o
-o
-o
-o
o
PLUGGIIJG FOR NKGATIVIi NUMBERS
The 10 digits stored in the printer relays for groups 1 and S sre to be printed in
the coliffiins l-lO of the card (b,,..»d). l-inus sign Indication for these digits (a) is to
be punched in colurji 1 (o)«
The digits fcr the first and socor^ places of print Dr group 1^ (f and h) are to be
punched in columns 96 (h) and 17 (g) respecti^/ely. Tiie niinus punch for group 12 («) la to
appear in colunm 17 (g)»
IX - 9
The 16 groups of 3 column split hubs on the gang punch plugboard
are similar in operation to the group selection hubs on the reader plugboard
but differ from the group selection hubs in purpose. On PX-12-112, it can
be seen that there is normally a circuit from the B to C hubs but that when
the columii split relays (Rll, R12, R17, and R18) are activated at the time
when cam P2 makes (13.0-11.6) the circuit is from the A to C hubs. Thus,
while minus punches are made there is a circuit from A to C, and while
digit punches are made, there is a circuit from B to C,
The 80 punch magnet hubs are connected to the punch magnets each
of which has responsibility for one of the 80 coltu-ans on the card.
Tho computer result exit hubs for printer groups which v/ill always
bo used for recording positive numbers may bo connected directly to the
punch magnet hubs for the columjis in v/hich those num.bors are to be punched.
Special plugboard connections must bo made for printer groups that record
numbers which may or may not be complomonts. For such a printer group, the
correspondingly nuinbored minus indication hub should be connected to an A
hub of the coluimi split hubs. Tho computer result exit hub which receives
a signal for the digit to be punched in the same column as the minus punch
for tho group is connected to the B hub belov( tho A hub chosen. The C
hub is then connected to the jjunch magnet hub corresponding to tho column
in Yfhich both tho digit and minus punch aro to be made. Connections arc
made directly from computer result exit hubs to punch magnet hubs for tho
columns in v/hich the minus punch does not occur. An example of the plugging
required for tho first and last digits of a ten digit negative number when
the minus punch is to appear in column 1 is shovrn on PX-12-.305 Rl. Hotice
that vdiilo 2 printer groups record this number, only one minus indication
lA
PLUG BOAHD fOli GA^C F^ZiZn
^.
i
\
^
^.^
^
ir^
5^ i
c^
:^
i K.
^ '
' ' ^
<h
Uj ^
>j
rvj
^ '
Group 1
TOO
»roup 5
o o o
Group 9
o o o
Group 13
o o o
O I o
— Comput«r Result kxit —
o o o o|o o o o o
- Group 6 [— Group 7
o o o oio o o o o
Group 10 J .Group 11
0|0 o o o o'o o o o o
\ Group 14 — \ — Group 15 —
ooooooooooo
Group U
o o o
- Group 8
coo
Group 12
o o o
Group 16
o o o
ooooooooooooo
1 - 2 - 3 - kimia Indication 10 11 12-13
ooooooooooooo
PL to Minua Ind Coluim Splits — —
Oao ooooooooooo
PL to Cocaputsr fUsult £xit
oBo O Q O 00 o o o o o o
PL to Pirnoh Magnets
oCo o o o o oo o o o o o
o o
U 15
o o
o
16
o
o o
o o
USE OP tie; Zi^ITTOl OUTPUT HUB 3 .ilD COMHaj T1JU;INaL3
Llro^ ai A zero punch Is to b© mad« in column 61.
Linos b.c.d^.ft A 12 punch (b) Is to b© made in colauns 30 (c), 40 (d), 60 (o), md 80 (f).
IX - 10
hub is connected to an A hub of the Golunin splits. This minus indication
hub could just as well have been the group 2 hub instead of the group 1 hub
as shov/n on FX-12-305 Rl.
Corresponding to each of the 12 stages of the emitter there are
3 hubs. If an emitter output hub is connected to a punch magnet hub, the
digit corresponding to the emitter output hub is punched in the column
associated v^ith the punch magnet hub whenever a card is punched. By means
of . connections from ©nitter output to punch magn,et hub, a f^iven digit- punch
can be made in as many as triree columns.
To the right of the emitter output hubs are 5 groups of coniiiion
terminals. All 5 terminals connected by a horizontal line are common. By
plugging from an emitter output hub to one of a group of 5 conim.on terminals
and from each of the other four comaTion terminals of the group to punch
magnet hubs, the punch is instructed to punch the digit selected in 4
coluims (see the illustrative example of PX-12-305 R2),
9.3 NUMERICAL CIRCUITS OF THE PRINTER AND PUNCH
If the print switch of a 5 digit group is in the print position,
at the beginning of the card punching cycle while the interlock cam is
making contact, the cathodes of all 53 printer input tubes for the group
are conncctod through a contact on the printer start relay to a source of
the required voltage for allowing the set up of these tubes. Thus when a
program input pulse is received at Pi, the digit tubes connected through
the static leads to the stages of counters in the abnormal state go on. The
tubes associated with relays Ml, M2 and C^ arc connected to the static
load from the M stage of the Flu counter of the unit from which the digits
for the group come so that those tubes go on only if the number to be printed
IX - 11
is a complement. Thus if the number M 1 234 500 000 is stored in an accu-
mulator which has its PM counter and five left hand decade counters
connected to group 1 of the printer, the minus tubes Ml, M2, and C and the
digit tubes Al , B2, C3, D4, and E5 go on at this time. The "on" tubes
activate the relays associated with them.
In addition to the hold contacts, two contacts for each of the
digit relays, in other words, a total of 100 contacts for a 5 digit group,
arc arranged in a 10 by 10 array. PX-12-307 shows these contacts arranged
so that the horizontal lines 2i-l (where i = 1, 2, ,.., 5 and where i = 1
identifies the bottom line) have the contacts for the relays used to rep-
resent the digits 9, 8, 7, ,.,,0 and the horizontal linos 2i have the con-
tacts for relays used to represent the digits 0, 9, 8, ,.♦, 1 reading from
loft to right. Each vortical column of relay contacts is connected to one
of 2 stages of the omittor through a PM transfer contact on either relay
Ml or M24 The labelling on PX-12-307 indicates how these vertical lines
arc connected to stages j or 9-j of tho emitter (reading from left to right
j = 9 to 0) according as the PM relays Ml and M2 are in the normal state
(when the group is a positive number) or the abnormal state (v/hen the group
is a complement).
In this manner tho process of converting a complement into a nega-
tive number by subtracting the digits in each decade place from 9 is
provided for. To complete tho conversion, it is necessary to subtract from
10 instead of 9 the extreme right hand digit of the complement or the first
from tho right non zero digit of tho complement and to leave the zero digits
to tho right of the first non zero digit. For this purpose, the relays C^
th3::ough Cg arc used. If the coupling switches of a given 5 digit group are in
the 0 position, and tho niunbor set up in tho printer relays for that group is
a complement (so that relay C is activated), then, when tho carry over cam
makes (13,6-9,4), tho relay Cc which is associated with tho first place at
IX - 12
the right of the 5 digit group is activated. Relay C. is activated only if
Cg is activated and contact EO is closed (as is tho case whon the first
from the right digit of the group is a zoro). Similarly, C2 is activated
only if C_ and C. are and contact DO is closed, etc. The case in which two
or more 5 digit groups are coupled together by means of the C setting on
one or more coupling switches is similar to this except that it is the Cg
relay for the group of highest number vrhich is activated if the number
registered in the printer groups is a complement. The C^, C^t ... relays
for this highest numbered group are activated or not depending on the
presence or absence of zeros in the right hand places of tho complement.
Now either an odd (reading from the bottom up) lino or its
imm.odiatc ovon successor is connected through a transfer contact (on one
of tho relays C-j_ through C5) to a lino which carries a punch signal back to
tho computer result exit hubs. An even numbered lino is connected to a
punch signal lino only whon the relay G, , C^, ..,, or C- corresponding to
that punch signal line is activated; otherwise punch signals come from the
odd numbered lines,
A signal for a digit punch results from tho ostablishmont of a
circuit from an emitter stage through a PM transfer contact, through a
contact on a digit relay through a transfer contact to a computer result
exit hub, A signal for a minus (11) punch reaches a minus indication
hub as a result of a circuit from stage 11 of the omittor through a contact
on relay M2*
^ Table 9-2 illustrates tho process of converting data stored in
tho printer relays into punches on an IBM card. It is assumed that the
coupling switch for the printer relay group in which tho numbers arc stored
TABLE 9-S
OPERATION OF HmSRICAL CIRCUITS OR FRUITER AND PUNCH
Coupling Switches set at 0
NUMBER to
ElilTTER ^ is connoctaij to a
bG PUNCrlED • STAGS
through PM I Contt\ct on
TRililSFER
CONTACT
RELAY
P 13057
L
M 13057
H 13570
'-f-
Ml
Ml
Ml
M2
M2
CO
Al
B3
D5
E7
v/hich is
cormoctod
thr ough
TRANSFER
CONTACT
^3
n
^1
C2
n
to
COMPUTER
RESULT EXIT
HUB
!
t —
11
3
4
^
o
8
9
11
0
3
4
6
3
LI in us punch is made
MS (A) I B7 I "5 (A)
ME (A)
MinuG punch is mado
M2 (A)
M2 (A)
M2 (a)
Ml (A)
Ml <A)
EO
D7
C5
B3
Al
Cg (A)
G4 (A)
IX - 13
is in tho 0 position. The symbol (a) after a relay number indicates that
the relay is activated. The table is arranged to indicate the clironological
order in v/hich the pLinches are made. The punching of the first number
P 13057 is a straightforward exatiiple of v/hat happens v^hen a positive number
is punched. The case,M 13057, illustrates the conversion of a complement
into a negative number, and the case, M 13570, illustrates the conversion
of a complement with at least one zero at the far right.
9.4 UTJITS COMSGTSD TO THE PRINTER
The static outputs of the counters in any accumulator or in the
master programmer can be connected to the printer input tubes. To deliver
information for five digits and a sign to the printer, a 55 conductor
cable is used. Each of 50 leads connects the static outputs of 1 stage
of one of the 5 decade counters to a printer input tube , Another lead
delivers the static output of tho M stage of tho PM counter to tho minus
indication tubos associated with tho 50 printer tubes for the 5 digits*^.
The 16 cables used for the 80 digits and 16 minus signs that can bo punched
are carried in a trough v/hich runs along the top of the ENIAC.
At the time of ^,vriting of this report, tho follwv-ing connections
have boon established between units of the ENIAG and printer groups:
>f-"lfnon 10 digits and sign are printed from a given accumulator, tho static
output of stage M is connected to tho PM lead in each of S static output
cables through the use of adaptor A on PX--12-114. Vlhcm 5 digits without sign
indication arc printed from an accumulator or from tho master programmer, no
connection is made to tho PM load in the static cable, and adaptor B shown
on PX-12~114 is connected to tho socket in tho printer which goes to the
PM tubes of the 5 digit group.
IX - 14
Printer Groups
1^
2 and 3
4 and 5
6
7 and 8
9 and 10
11 and 12
13 and 14
15 and 16
Connected to
Master Programnier decades 14 - 18
Accumulator 13 - 10 decades and PM
Accumulator 14 - 10 decades and PM
Accumulator 15*- decades 6-10 and ?l
Accumulator 16 - 10 decades a^d PM
Accumulator 17 - 10 decades and PM
Accumulator 18 - 10 decades and FM
Accumulator 19 - 10 decades and PM
Accu]iiulator 20-10 decades and PM.
The static outputs of decades 1-5 of accumulator IS are also
delivered to the printer in the static output trough but the leads are not
plugged into the printer input sockets. If it is desired to print 10
digits from accumulator 15 and none from the master programmer, the leads
from the master prograrr^mer should he pulled out and those from accumulator
15 plugged in instead. Notice that a ten digit negative number cannot be
printed from accumulator 15 since there is no way to couple together groups
6 and 1. It is. however, possible to print either of the following from
accumulator 15:
1) A ten digit positive number
2) Two five digit numbers with the left hand number having any
sign and the right hand number only a plus sign.
The connections made to the printer make it possible to use the
printer in a moderately flexible way. For example, oven though ton decades
of an accumulator arc connected to the printer, it is not necessary that all
IX - 15
ton columns be punched when data frora this accumulator is printed. If there
arc five or fewer significant figures of a result to bo printed from an
accumulator which has 10 decades connected to the printer and if those
figures are located in the five left hand or five right hand decade places
of the accumulator, the punching of columns in which the non-signif icant
figures are located can be avoided by sotting the print switches of tho
higher or lower numbered five digit group respectively to off. If the
significant figures are at the left of the accumulator the coupling switch
which carries the numbers of the 2 printer groups connected to that accumu-
lator must certainly be set at 0 so that complementation will be carried
out correctly. If the significant figures are at the right of the
accumulator, the coupling switch may be set at either C or 0.
Another method which eliminates the punching of non-significant
zeros consists of omitting plug board connections betv/een punch magnets
and those computer result exit hubs which receive tho non-significant zeros.
Another 'Drocedurc which is possible under certain circumstances
consists of printing two five digit munbers from an accumulator which has
10 decades and its ?M connected to the printer, Vi/lion the two nuinbers
stored in the accumulator always have the s;^mo sign, the standard PM
adaptor labelled A on PX-ia-114 which connects stage M of tho accumulator's
PM counter to tho static loads v/hich go to the printer PM tubes for both
five digit groups is used. Tho coupling switch for tho two printer
groups is set at 0 so that tons complements are taken in converting each
number into a negative number when the common sign is M.
llfhon one of tho five digit numbers is always positive and the
other may be cither positive or negative, the static connection from the
0
IX - 16
accumulator's PM counter to the PM tubes for the positive group is broken
for, oth'^rwise , coinplemonts would bo taken for both five di^<;it groups and
both groups would bo printed as negative- numbers. In this case, norcovor,
the adaptor labelled 3 on PX-12-114 is connected to the socket in the
printer which goes to the PM tubes of the positive group. This adaptor
grounds the grid of the PM tubes. The coupling switch associated with
the two printer groups is sot at 0 so that a tens complercont will be
taken in converting nunToGrs with sign M into negative numbers.
If both five digit numbers may have different signs aiid if one
of the five digit nimabers is not known to be always positive, there is no
way to print both numbers corroctly from one accumulator,
9.5 ILLUSTRATIVE PROBLEM SET-UP
The printing sequence of the problem discussed, in part, in
Chapter VIII is taken here to illustrate the use of the printer. The
problem may be summarized briefly as follows: Six numbers, l^-^ (for 0^k'$5),
are formed in accumulators 14 and 16-20 by the end of sequence 4 (see
Tables 8-8 and 3- 10, Since the significant figures switches on these
accumulators are set at 6 (see Figure 8-3), the values are correct to 6
figures. The four irrelevant right hand digits, however, have not been
deleted. Master programmer decades 14-18 (associated v/ith stepper C) store
the identification nimiber for the results.
In sequence 5, the numbers K, are printed and the reading of
constants for the next computation proceeds in parallel. When printing is
completed, selective clearing takes place. The program output pulse from
a selective clearing transceiver provides a reader interlock pulse. The
reader program output pulse goes back to the master programmer (see Figure
7J
PLUG BOARD FOR GANG FCliZt^
\
^
^}
^
^^
^
Q^
$
?v»
^
' ^
<^
Uj ^
""^
:^*
\
^
1^
<M
•^ 1
PLUQBOiiRD :7IRING FOH PEB^TIHO IDaiTIFIGATlOH NUMBI'5l3 AIID VALUES OP }h
Lines a. b. si ¥/lring for idoatirioation nvynber
Lines. d.o.f.gj wiring for first and last digits of Hq
Lines h^i.k^; wiring for first and last digits of Hg
IX - 17
8-2 from which will come a program output pulse to stimulate the computa-
tions for the next system of equations.
The set-up for this sequence, sequence 5, is shovrn on Table 9-3
and Figure 9-1 (a and b) is a set-up diagram for this sequence. Master
programmer decades 14-18 are connectod to printer group 1 and, therefore,
the coupling switches 1-2 and 16-1 arc sot at 0 (see Figure 9-l), Since
6 digits arc being printed from accumulators 14, 16, 17, ..., 20, coupling
switches 4-5, 7-8, 9-10, 11-12, 13-14, and 15-16 are set at C. All other
coupling switches are sot at 0. The print switches for the 13 printer
groups usod here are sot at print with all others sot at off,
A posGiblo plug board wiring for printing the numbers involved
is shov/n on PX-12-305 R3. Notice that ovon though 10 digits are set up
in the printer groups for each value of N , only 6 digits are printed
since connections from computer result exit hubs to punch magnet hubs for
the four digits at the right in each pair of five digit printer groups are
omitted.
*
TABLE 9-3
SET-UP FOR SEQUENCE 5 - EVALUATION CP %
Add. (Selective
Time I Clear
V-0
V-1
Reader | Printer | Accumulator 14
%+0.Cp5
2-3
Ri
VI-1
2-5
1
Pi
._4
I
2-5
00 1
2-3
Accumulator 16
^1
'!L +0.0^5
Po
2-10
2
2-
.10
i
I
!
i ■ j
1
1
i
i
3
2-7
Rl
VII-
1
*
1
Ro
1-1
Accumulator 17
iNg+O.O^S
-i
Accumulator 18 'Accumulator 19; Accumulator 20
!N,+0.0^5
■-'4
T"
t
}
i
JN4+0.0^5!
.+0.0^5
I
o o
o o
o
H
Q Q C
Q X w
5.6
p o
H P
Q 2 d- w b d
J Q O <^.^ O O
0 O C' G O ^
n If i5 -(4 . 13 i?
/^
8
R
9
Q
c
o
H
D
U-
A
v^l
A
A A
A
A
I
.1
4 J
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X- 1
X. MASTER FROORAMMER
The master programmer is a central programming unit vrhose primary
function is t© direct and stimulate the performance of the program sequences of
various levels which enter into a computation. While the master programmer is
capable ©f stimulating the performance of individual programs, it is usually
not required for this purpose. It is, however, essential to use the master
prograjumer to accomplish the iteration of a program sequence into a chain
(see Section 1*U*) or to link together chains and program sequences. The master
programmer can link programs together either serially or on the basis of magni-
tude discrimination. The master programmer may also be used as a counter in
that it is capable of storing numbers (without sign, however) and also of adding
by counting pulses. This latter feature enables the operator to store values,
say of the independent variable, in the master programmer. Certain decades of
the master programmer have been connected to the printer so that a number stored
in these decades can be printed.
Sections 1, 2, and 3 of this chapter are concerned with the conponents
of the master programmer^ The programming of the master programmer is discussed
in Section U, and the uses of the master programmer are considered in Section 5«
Illustrative set ups involving the master programmer are found in Section 6,
Reference will be made to the following diagrams:
Master Programmer Front View PX-8-303
Master Programmer Front Panels PX-8-301, 8-302
Master Programmer Block Diagram PX-8-304
X ~ 2
10,0 GENERAL SUMMARY
The master programmer has ten steppers (identified by the letters
A-K on PX-8-301 and 302), The basic property of a stepper is that it has one
input and 6 outputs. By means of the 6 output terminals, a pulse received at
a stepper input terminal from a given program line can be routed to one of 6
program lines.
Each stepper has a 6 stage counter. The output terminal through
which a pulse is emitted when a stepper input is stimulated depends on the
stage of the stepper counter at the time- when the pulse is traiismitted.
The master programmer also includes 20 master programmer decades
(numbered 1-20 beginning with the extrume right hand decade on panel and end-
ing with the extreme left hand decade on pcinel 1) , By moans of decade associator
switches as many as five decades can be combined into a group, and, as a group,
associated with a stepper.
The group of decades associated with a stepper counts one each time
the stepper is pulsed. Each decade has associated with it 6 decade switches,
one for each stage of a stepper counter. VJhen the stepper counter is in stage
s and when the decades associated with a stepper register the number set up on
the decade switches belonging to stage s of the associated stepper, the stepper
advances from stage s to stage s+1 and the decades associated with the stepper
clear to zero. Thus, the decades and decade switches make it possible for a
stepper to emit a pulse from the output terminal associated with stage s of the
stepper on the number of occasions specified by the settings of the stage s
decade switches and then to emit a pulse from the output terminal associated
with stage s+1 of the stepper counter.
X - 3
Besides the preceding there are other features of the master programmer
which provide means of controlling the stepper counters and decade counters. Each
decade counter has a direct input (labelled by the decade number followed by di).
Each pulse received at a decade direct input terminal cycles the decade counter
one stage. Similarly each pulse received at a stopper direct input terminal
(di preceded by the stepper letter) cycles the stepper counter 1 stage, A
stepper is cleared to stage 1 by pulse input to its clear direct input, (cdi
preceded by the stepper letter), A stepper clear switch associated with each
stepper unit makes it possible to use a stepper counter as a c stage counter
where 1 -^^^c < ^»
10,1. DECADE ASSOCIATOR Sl'^HiTCHES
Certain decades are permanently associated with one another and, as a
group, with a particular stepper. For example, decades 15, 16, and 17 are per-
manently associated with one another and with stepper C, Other decades (decades
12, 14, 18, and 20 on panel 1, for example) can be associated by means of a
decade associator switch with either of the 2 steppers whose identifying letters
appear on the switch and thus, with the other decades permanently connected to
that stepper. Notice that steppers A and F may be used without any associated
decades.
The decades of a group are connected to one another for the purpose
of carry-over and, as a group, are associated with a stepper to provide one of
the signals which can cycle the stepper counter at certedn times (see Section
10.2,2.).
•
10.2. MASTER mOGRAlEiER DECADES
The master prograinmer decades will be described with reference to the
diagram for decade 11 on PX-.8-304. Each master programmer decade consists of
6 decade switches each with an associated inverter (B41, 42, or 43) > and a
decade ring counter with a clear circuit (inverters 1 and B45 and gate B44;,
a carry over circuit (gate 28 £ind tubes 30), and an input circuit containing
pulse standardizer 25-27 and buffer 31. Noons associated with stages 0 through
9 of the decade counters are shown on PX-8~303.
10,2.1. Decade Counter; Input and Carry Over Circuits
Decade counter D (where 1<.D<20) can be cycled by input to its
decade direct input terminal, from the carry over circuit of decade D-1 (if there
is a decade D-1 associated with it), or, in the case of units decade of a group
associated with a stepper, from the stepper input circuit (see Section 10.3.1.)
Pulse input to the decade direct input cycles the decade counter immediately,
but there is a one addition time delay between the pulsing of the stepper input
and the cycling of the decade counter which results (see Section 10.3.1.).
V/hen a given decade counter is cycled to stage 9, gate 28 (in the
case of decade 11) opens so that the next pulse delivered to the decade not only
cycles the counter back to stage zero, but also passes through the gate and
tubes 30 to be delivered to the next decade at the left if there is one. The
time between successive digit pulses is not sufficient to allow safely for the
carry over process. For this reason digit pulses should not be fed to the
decade direct input terminal (also see Section 10.2.2.). Input to the decade
derived from pulsing the stepper input terminal (see Section 10.3.) comes at the
time of the CPP so that there is sufficient time for carry over.
^^Tube 1 and the docac'o ring counter arc mounted in a plu{'-in unit.
X - 5
10.2.2, Decade Svvitches and Decade Counter Clear Circuits
Each do cade switch is correlated with one of the 6 stages of the
stepper counter associated vvith the decade, A decade switch in the top row is
associated with stage 1; a switch in the bottom row, with stage 6,
The operator sets up on the decade switches corresponding to stage s
of a stepper the number which the decades associated with the stepper must
register for the stepper to advance from stage s to stage s+1 and for the decade
counters to be cleared back to zero. For example, if decades 12 and 11 are
associated with stepper E and if the switches in the second row from the top
are set at 3 and 8 respectively, then stepper E will advance from stage 2 to 3
and the decades will clear bick to zero when this pair of decades stores the
number 3S«
Each point on a decade switch is connected to the norraally positive /
output of one of the stages of the decade counter. The negative signal from a
stage in the abnormal ste,te turns off the inverter associated with a switch set
at the corresponding number. All inverters for the stage s decade switches are
connected to the stage s stepper cycling gate (see Section 10,3.2.) of the
associated stepper. When the stepper counter is in stage s, the stage s stepper
cycling gate emits a signal provided that .aii the inverters for stage s switches
of decades associated with the stepper are turned off.
The output of the stepper cycling gate is taken (through an inverter)
to the gates numbered 44 (preceded by B, C, ..., or L) of the decades associated
with the stepper. The CPP passed through these gates clears the decade counters
associated with the stepper. The output of the stepper cycling gates also goes
(through inverter 64) to gate 63 in the stepper. The CPP which is thus allowed
to pass tl-irough gate 63 causes the stepper counter to cycle one stage at the
X - 6
satiie time that the associated decades are being cleared. The necessity for
providing sufficient tine for gates 4A and 63 to set up before the arrival of
the CPP they are to pass is a second reason for feeding only program pulses to
the decade direct input terminals (also see Section 10,3.2,2.)
10,3. STEPPERS
Each of the 10 steppers (ii-K) consists of a 6 stage stepper counter,
a stepper-counter input, a stepper clear circuit, a stepper input (as distinguished
from the stepper-counter input), and 6 outputs. For convenience, the elements
of these circuits will be identified with reference to the drawing for stepper E.
'^^^ stcppor input circuit consists of a stopper input terminal, an
input flip-flop (66, 6?) and input gate (69), buffers (65 and 70) and an in-
verter (68). Each of the 6 outputs consists of an output gate (61-69), a
standard transmitter, and an output terminal.
^^® stepper-counter input circuit includes a pulse standardizer (21-23)
an inverter (6I) and buffer (62) and can be entered either through the stepper
direct input terminal and buffer 61 or through the circuit containing the stepper
cycling gates (B, C 48-50), inverter 64, and gate 63.
The stepper clear circuit contains an inverter (C46), the stepper
clear direct input terminal and buffer B46, the stepper clear switch, inverter
B46 and gate B47.
10.3.1. Stepper Input and Output Circuits
A program pulse received at the end 01 addition time t or a group of
digit pulses received early (see below) in addition tine t-^1 by the stepper input
terminal sets the input flip-flop. The normally negative output of this flip-
flop then opens gate 69 so that a CPP passes through at the end of addition time
X- 7
t+1. It is to be noted that if digit pulses are fed to the stepper input, they
must be pulges which be^in to be emitted before the 4P (i.e. no later than pulse
time 6) in order to allow time for gate 69 to set up and pass the CPP which
arrives at the end of the addition tLme, Since, in general, one does not know
in advance the magnitude of a number, this restriction on the digit pulses which
may be delivered to the stepper input Is equivalent to sajdng that the only digit
pulses which may be brought to a stepper are sign pulses since the 9P for sign
begin to be emitted early enough in the addition time cycle.
The output of gate 69 has three effects:
1) It resets the input f lip-f lop^«- .
2) Passed through inverter 68, cathode follower 70, and buffer A43,
it causes the associated group of decade counters to be cj'-cled
one stage in units place.
3) Passed through inverter 68 and cathode follower 70, it is delivered
to the stepper output gates.
Each of the 6 output gates is controlled by the normally positive
output (tlirough an inverter) of a stage of the stepper counter. Thus the pulse
from cathode follower 70 is passed through the gate and the transmitter corres-
ponding to the stage in which the stepper counter is at the end of addition
time t+1.
If; when the stepper counter is in stage s, the stepper input alone is
pulsed, the output pulso is thus omitted from the terminal associated with stage s.
It is, however, possible to pulse both the stepper input and stepper direct input
■55-Since this flip-flop is reset at the end of addition time t+1, a^ stepper input
must not be pulsed in successive addition times. The same restriction is also
pertinent to the use of program controls on other units.
X - 8
terminal (see Section 10,3*2,1,) at the same time. If this is done, the output
pulse is emitted from the terminal corresponding to the stage to which the
stepper counter is cycled by the end of addition time t+1 as a result of the
pulses delivered to the stepper direct input terminal,
10,3,2. Cycling a Stepper Counter
A stepper counter which has associated decades can be cycled either
by pulses received at the stepper direct input terminal or as a result of the
fact that the decades have counted to the number set on the decade switches
corresponding to the stage in which the counter is, a stepper without decades
(steppers A and F can be used in this way) can be cycled only by pulse input to
the stepper direct input terminal,
U)»3»2,l, Stepper Direct Input
A pulse received at a stepper direct input terminal is delivered
through tubes 61 and 62 and the pulse standardizer to the stepper counter.
Each pulse, whether prograni or digit, delivered to the stepper direct input
causes the counter to be cycled one stage immediately. Notice, no output pulse
is emitted when a stepper direct input is pulsed,
10,3,2,2, Stepper Cycling Gates
Each stepper cycling gate receives as one input, the normally positive
output (through an inverter) of a stage of the stepper counter and as its second
input, the outputs of the inverter tubes connected to s stage decade switches of
all the decades associated with the stepper. These inverter tubes have their
plates connected in parallel to a common load resistor. The circuit containing
the inverters and stepper cycling gates is such that even if only one of the
inverters connected to a switch is on, the gate remains closed. In this way,
a stepper cycling gate, emits a signal only if, when the stepper counter is in
X - 9
stage s, all the associated decade counters have reached the stages specified by
their s stage decade switches.
The output of a stepper cycling gate causes a CPP to be passed through
each of the gates 63 and 44 (preceded by B, C, ..., or L). The output of gate
63 causes the stepper counter to be cycled one stage, and the output of the gates
44 (preceded by B, C, ..., L) clears the associated decade counters.
Notice that the clearing of the decade counters and stepping of the
stepper takes place one addition time after the decade counters arrive at the
number specified by the decade switch settings whether the decades arrive at
this number because of pulse input to the decade direct or stepper input terminal.
Thus, if the stepper input is pulsed at the end of addition time t or early in
addition time t+1 and the decade counters, as a result, reach the; setting of the
decade switches at the end of addition time t+1, the decade counter clears to
zero and the stepper counter advances one stage at the end of addition time t+2.
But, if the decade counters reach the switch settings as a result of pulsing the
decade direct input at the end of addition time t, the stepping and clearing
takes place at the end of addition time t+1,
10.3,3. Clearing a Stepper Counter
k stepper counter clears back to stage one as the result of pulse
input to its clear direct input terminal or as the result of receiving a pulse
when it is in stage c (the number set up on the stepper clear switch),
10.3.3.1. Stepper Clear Switch
Each point of the stepper clear switch is connected to the normally
negative output of a stage of the stepper counter. If c is the setting of the
stepper clear switch, then, when the stepper counter reaches stage c, the signal
which passes through the clear switch opens gate B47* In this way, the next
^"^X- s^^/o
IS^m TSRIIINAL
TABLE 10-1
PROHSfiTIKS OF MASTER PROGRiUirffiR IIIHJTS
% - addition tiioB iihen terminal is pulsed unless otherwise noted,
h - stage of stepper counter before a pulse is received,
dg = nunber set u^ on decade switches associated with stage s of stepper counter.
c = number set up on stepper clear switch
EFFECT OF REGSPTION OF A PULSE
PDLSE IHPUT
Stepper
Input
.i
Stepper
Input
A or P with
decades
dissociated
Progran pulse at end of
add, tin© t or PU pulses
during add. tin]© t+1.
Program pulse at end of
add. time t or PI! pulses
during add, tine t+1.
1, Output pulse is transmitted througii output terminal
corresponding to stage s of stepper counter,
2, Decade counters cycle 1 stage in unite place
3, If input cycles decade counters to dg
a, decade counters clear to zero
b, stepper counter cycles to (s-^-l) sod o
1, Output pulse is transmitted tlirough output terminal
corresponding to stage s of stepper counter,
2, (No decade counters)
3, (flo decade counters)
ADDITIOH TDffi
EFFECT OCCURS
t + 1
t + 1
t -»■ 2
t + 2
t + 1
Stepper ; Digit <Mr xarogrem pulse
Olrect Input
Stepper
Direct Input
A or P with
decades
dissociated
Digit or program pulse
■4
1, IJo output pulse is transmitted i
2, Decade counters do not cycle
3, Sta^jc^p^r Gooosfcav OTSlas 1 stage for each pulse receiv«d, injaediately
1, No output pulse is transmitted
2, CHo decade counters)
3, Stepper essoaitiey eyel^s 1 stage for each pulse received, immediately
Stepper ! Program; pulse at end of add.
Input "] tirne t
and Stepper ^ Program pulse at ^id of add.
Direct Input time t or p digit pulses
' during add, time t-s-1.
- -| - - - .-
Stepper , Program pulse at end of add.
Input ^tic© t
!
and Stepper -Program pulse at end of add.
Direct input I time t or p digit pulses
.1 or P [during add, time t+1.
with no decade^
3ecade ')irect^ Progrora pulse
Input I
1,
2.
3.
4.
1,
2.
3.
/
I
\
ii.
!
i
'2.
I
3.
Output pulse is transmitted througii output terminal
associated v/ith stage (s^p) of Gte^P^^r counter, t + 1
Decade counters cycle 1 starve in units place. ; t + 1
t
(
Stepper counter cycles 1 stage for each pulse received
at stepper direct input terminal.
If decade counter^: &.re cyciad to cti;./:s d^,„p
a, decade counters clear to zerx?
b, stepper counter cycles to (s+p+1) mai c.
immediately
t + 2
t + 2
Oat>put pulse is transmitted tlirough stage (s+p) mod c, t + 1
(Ho decade counter) ;
V
Stepper oountor cycles 1 sta^^e for each pulae received, immediately
Ho out-nut pulse is transmitted
Decade counter cycles one stage
If decade ;;o.UiterG are cycled to sta^^e d
Stepper Clear I Program pulse or digit
Direct Input j pulses
a, .decade counters clear tc gero
b, stepper counter cycles to stage (s+l) mod c
1, Stepper counter clears to stage 1
immediately
t + 1
t + 1
imm.ediately
X - 10
pulse from buffer 62, whether derived from the stepper cycling gate circuit
or from pulse input to the stepper direct input, is gated through B47 after
passing through inverter Bl^S, The output of gate B47 inverted by C46 clears
the stepper counter back to stage 1,
The circuit containing the stepper clear switch and gate B47 requires
more time than that between successive digit pulses if it is to operate reliably.
For this reason, if digit pulses are ever brought to a stepper direct input
terminal, the stepper clear switch must be set at 6. With the stepper clear
switch set at 6., clearing to stage one results from the fact that the stepper
counters are ring counters,
10.3.3.2. Stepper :Clear Direct Input
Pulse input to the stepper clear direct input terminal passes through
buffer B46 and inverter C46 and iramediatsly clears the stepper.
If another pulse attempts to cycle the stepper at the same time that
the stepper clear direct inptit is pulsed, the clearing action will predominate
because the clear circuit spreads its signal out in time sufficiently for this
purpose ,
10.4. PROGRMMING THE MASTER PROGRAMMER
One aspect of master programmer control is provided by the switch
settings (decade associator, decade, and stepper clear). The other aspect is
the input terminal (decade direct, stepper, stepper direct, or stepper clear
direct) which is pulsed. Table 10-1 summarizes tho properties of the master
programmer inputs.
It is to be noted that in the master programmer, each stepper with
its associated decades functions as a unit independently of the other steppers
X - 11
and decades. For this reason, it is possible to stimulate some or all of them
simultaneously.
It is even permissible to pulse more than one of the input terrairials
of a given stepper-decade combination simultaneously. For example, a decade
direct input terminal and a stepper input terminal may be pulsed simultaneously
because the cycling of the decade counters due to the former is completed before
that due to the latter begins, A stepper input and stepper direct input terminal
may also be pulsed simultaneously because the latter affects only the stepper
counter and does so immediately while the former affects the decade and, if it
affects the stepper counter, does so ti,vo addition times after the input. On the
other hand, the stepper direct input should not be pulsed two addition times after
the stepper input or one addition time after a decade direct input because of the
conflict that would arise if the decade counters were thus cycled to the settings of
the decade switches,
10,5. USES OF THE I^STER PROGRAlvUffiR
The program controls of the master programmer make this unit suitable
for link or digit program control of sequences or chains > for accumulating values
of an independent variable (or even serial numbers), and for extending the program
control facilities of other units,
10.5.1. Link Program Control
The master programmer's contribution to the 3J.nk programming of sequences^
sequences iterated into a chain, chains of chains and various other program
hierarchies is the program output pulses which can be transmitted through any of
its 60 output terminals.
X - 12
10 « 5. 1.1. The stiiTiulation of sequences
The operator can provide for the stimulation of any given sequence by
connecting the input terminals of the first progr?Ji controls used in the sequence
to the sane prograjn line that one or noro progrr^-i output terminals of the master
prograixier a.ro connected. To stimulate that particular sequence, then, a pulse
must be delivered to a stepper input atatine when the stepper counter will be
in the stage associated with one of the master programmer output terminals
mentioned in the previous sentence. Control of the stage of the stepper counter
may be exercised through the settings of the decade s^^itches or by pulsing the
stepper direct input or stepper clear direct input. The pulse which must bo
delivered to the stepper input tern-anal in order to obtain a program output pulse
may be derived from the program output terxminal of one of the transceivers used
in the last program of the sequence (see problem 1, Section 10.6.) or, in more
complex problems, may even be obtained from another master programmer output
terminal (see problem 2, Section 10,6.)
10.5.1.2, Iteration of the sequences of a chain
To secure the iteration of the sequence of c chain n times the master
programmer must be set up to transmit a progreja output pulse through an output
terrainal which feeds to the initial programs of the sequence n times and then
to transmit a pulse through an output terminal which does not feed to that
sequence. This can be accomplished by setting at n the decade switches asso-
ciated with the stepper output terminal which foods to the first programs of the
sequence and by delivering to the stepper input the terminal pulse of the sequence.
A pulse to initiate the chain must be delivered to this stepper input. Then on
each of n successive occasions whenever the stepper input receives a pulse, a
pulse will be transmitted to stimulate the sequence. The nth pulse delivered
X - 13
to this stepper input will, moreover, clear the decade counters to zero and
cycle the stepper counter 1 stage so that the delivery of another pulse to the
stepper input will result in the transmission of an output pulse through a terminal
other than the one which, above, was described as being connected to the first
program controls of the sequence.
10.5.1,3, The stimulation of prograja hierarchies
In general one stage of a stepper counter must be devoted to the stimu-
lation of a single sequence or to the stimulation of a chain of iterated sequences.
To link together a number of different sequences (where some or all of the
sequences may be chains) requires the use of a stepper with one stage of the
stepper counter devoted to each sequence or chain, A number of sequences, each
consisting of several subsequences of the kind referred to in the previous
sentence, requires the use of one stepper for the main sequences and one stepper
for each of the subsequences.
A stepper must have associated with it by means of a decade associator
switch sufficient decades to count the maximum number of iterations involved in
any chains controlled by that stepper. If for any reason, there are not suffi-
cient decades for this purpose, the decade switches correlated with several
successive stages of a stepper may be set so that the sum of the decade switch
settings is the required number and the corresponding outputs hooked together
to the same program line.
The clear switch of the stepper must be set to the number of sequences
(or sequences of chains) to be controlled by the stepper. If the number of
sequences to be linked exceeds 6, several steppers may be used sequentially.
10,5.2, Digit Program Control
If it is desired to use two or three function tables to list the values
X - 14
of a single function instead of merely one, digit control of the program of
looking up a function is needed so that the table appropriate to the value of
the independent variable may be entered. This control can be supplied very
easily by using the master programmer.
For illustrative purposes, let us sajr that three function tables
are to be used (the case in which only two are used may be treated similarly
except for minor details)* Then a transformation of the independent variable
will be made which will cause its values to lie between zero and 299 inclusive.
The program P. (for i = 1, 2, 3) is defined as the program of entering function
table i for a tabular value. The problem, then, is to stimulate the performance
of Pj_ if the digit in hundreds place of the independent variable is i - 1,
The operator must connect three successive program output terminals
of a stepper to three program lines which are in turn connected, one each, to
the program input terminals on function tables 1, 2, and 3 respectively and must
provide for the pulsing of the stepper direct input by digit pulses from the
hundreds decade line of the accumulator storing the independent variable » The
digit pulses may be those transmitted out of the accumulator's add or subtract
output. Which stepper output terminals sxe made to correspond to programs P ,
P^, and Po respectively depends on whether digit pulses from the add or subtract
output terminal are used. The stepper input must also be pulsed (either at the
end of the addition time just before the stepper direct input receives the digit
pulses or some time subsequent to that) so that an output pulse will be trans-
mitted by the stepper through the output tenninal associated with the stage
to which the stepper has been cycled by the digit pulses. And finally, the
stepper clear direct input should be pulsed after the digit discrimination has
been completed so that the stepper will be ready for use in the next digit dis-
X - 15
crimination program when needed,
A conceivable motive for pulsing the stepper direct input with digit
pulses from the subtract output might be avoidance of tying up the accumulator's
add output. If digit pulses from the subtract output are used, 9, 8, or 7 pulses
will be received at the master programmer's stepper direct input if the hundreds
place digit of the argument is respectively 0, 1, or 2, Then the stepper output
terminals corresponding to stages 4, 3, and 2 (with the stepper clear switch set
at 6) respectively of the step^per counter should be so connected as to deliver
the stimulating program pulses for programs P.^^, P^, and P„ respectively. If
digit pulses from the add output terminal are used, then the stepper output
terminals corresponding to stages 1, 2, and 3 respectively of the stepper counter
should be so connected as to deliver the stimulating pulse for programs P^, ?^,
and Po respectively.
Steppers A or F with zero decades associated are especially suited
to digit discrimination programs. Any other stepper, however, may be used. If
a stepper with decades is employed, two alternative methods for setting the
decade switches exist:
1) the decade switches corresponding to stage 1 of the stepper counter
may be set at a number exceeding the number of times the digit
discrimination program will occurj
2) the decade switches corresponding to the various stages of the
stepper may all be set at 1,
Whether a stepper with or without decades is used, provision must
be made for clearing the stepper counter back to stage one sometime before the
next digit discrimination program occurs. This may be done by pulsing the
stepper clear direct input. If the stepper input is pulsed in addition time t,
TABLE 10-2
SET-UP FOR STB'IUUTING PROGRAlvi P^
(i=0, 1, ,.., 9) if digit i appears in k
decade of Accumulator 12
sUnit
Adc
Ace. 12
1-^1 J^-
A 0 1
2^^ ®
.2-5 ®
0 0 2
^2-
2-6
Ace. 14
(r-loars to 5
in decade k)
1-1
a 0 1
1-2
1-2
A 0 1
I A(k+1)
Lto^JJ
[AlkT]
ti) 2-2 i
2-3
Master Propiramnier
Master
Input Output
•'^-Braces are used here to mean "or".
Edi
2-1
Adi
2-2
Fdi
2-2
S^3
Ei
^v.
2-4
Fi
Ai
EnO
2-4
EpO^
2-5
] _
to Pi
F3_o
^2°
to^P2
FoO
hto-^P
A2_o
to P^
ApO
/ to P6
to^
toS,
Ao
to^P.
A, o
AcO
to-'Pg
2-6
A, E, and F cdl
PX-8-^^/
KtI
n
PCC. 12
a
flCC.!4
Clears Tc 5
In Decpde'W
F&oM Rcc.i4
PecGfeOM Ccntbol(G}
?
SrtPfCfc
Decade 'switch Setti»«<;
T"
"I
LOur
7 '
'/H
Unusf.dStpqe Of
St epc^er
PUT Or Stpqf 1
Direct Input To Units Decbde OfThe
Qroup PssociftTED With The Stepper
Use Of Mi^sxER Proqram^ieb To Stimulrte Pi Ir Di^^iT i PppcRies In DEr^p^E K Qv Rcc. 12
O G
9 9 9
£a E2_
MASTER PROQRRMMER
Panel 1
B
D
B
C
c
c
D
^ i
1
A
6
B
C
D
E
2
O G O
• • •
• • •
o o
o o o
• • •
• • •
G G
GOG
• ^t •
G G
9 <? 0
I 3 6
4 5
©
(D
CD
Pig. 10-2 (a)
Digit Discrlmtttation Program
To stimulate P^ if digit i appears in decade k of
accumulator 12-
r
m
00
^
o o
9 9 9
ft! Cfi.
ii<iMfiiin'ii,i>Lit^^iil'ilfiaii)|l>i-ii
.|i»i| immiinmmiiill)>irtmimtmtmta0
Master PRo<iRflnhER
Panel ^
€{
T;
^
H
H
H
J
n
.':
' (
>
Q
H
J
H
1
o o
o o o
• • •
• • •
o o o
• « •
o o o
• • •
• • •
o o
Q O O
• • •
1^
f
Mif«K|MMM9IMMi«PMMi
Pig. 10*. a (b)
I
■9
?
id:
ACCUMULATOC
n ..':°-'.'... n
U rTTTTTTr^r'TM U
D
ttct:
n
on
u
CCTTJq
s
D
0 O e •
a*o vO to »» vo** « o#
I ' I
DeLerE. All Got
Dec^db Line H —
AccuMuuroe
M rcrarcra
D
Tr"Tr T^TTT^T^
ni]
/*
ct:
rrrj
D
9 e o o
?f?t
im
ftCCUWLHTOR
D ..':"-'.^ n
luaaa
D
TT^ 1^ Tf T*
or
r
t:
r
D
cii
D
o o o e
H-
5"!
rA^/; to 2-1-^ rQ<} to z-z
g —
ED
t
ACCUhttiUTOl?
NO. 14
ri
^m-n
r
r^
DtlQ
ccira
•U.
a
-J
3
-.J
/f D/G/r ] Ap^^^^^^ //v 0£c^o£ k O/^ /ice /Z
X - 16
the stepper clear direct input may be pulsed in addition time t+1 when a stepper
"without decades is used or when a stepper with decades whose stage one decade
switches have been set at a number greater than the number of times digit dis-
crimination occurs is used* This allows sufficient time for the stepper to omit
a program output pulse from the output terminal corresponding to the particular
stage to which the digit pulses cycled the stepper. If there are decades asso-
ciated with the stepper used for digit discriraination and if the decade switches
of the various stages used are set at 1, the stepper counter should not be cleared
the end of
to stage 1 sooner than addition time t+2 since, in addition time t+2, a pulse will
try to cycle the stepper counter due to the fact that the decade counter has been
cycled to stage 1,
A digit discrimination program Vvihere the possibilities are limited to
6 consecutive digits may be treated in a fashion similar to that described above
except for obvious modifications. A digit discriraination program calling for the
stimulation of P. if digit i (where o <i <9) appears in decade k reqfuires more
extensive modification.
This problem m.ay be handled in two steps: 1) discriminate to determine
whether the digit is between zero and four inclusive or between 5 Sind 9 inclusive;
2) using two different steppers for the two ranges mentioned above, discriminate
among 5 consecutive digits.
Table 10-2 shows one possible method of carrying out this problem and
Figure 10-1 presents a visual summary of this set-up. Figure 10-2 (a, b, and c)
shows the program and digit connections and switch settings required to carry out
this digit discrimination program. The notation for the master programmer in
Table 10-2 and in Figure 10-2 is explained at the beginning of Section 10.6,
Stop 1 of this digit discrimination program is handled by transmitting
X - 17
the nuinber stored in accumulator 12 to accumulator 14 where it is received
through a special deleter which eliminates all of the decade lines except
decade k. The significant figure s^v^itch on accuiaulator IM. is set to 10-k so
that this accumulator clears to 5 in decade k. Now, if the digit stored in
decade k of accumulator 12 does not exceed I+f decade k+1 of accumulator 11+ will
store zero; if the digit stored in decade k of accumulator 12 is between 5 and
9 inclusive, decade k+1 of accumulator 14 stores 1,
The next step of the program consists of transmitting the addition
output of decade line k+1 from accumulator 14 to the direct input of stepper E
and simultcineouslj the digit pulses jf the out out of decade line k to the direct
inputs of steppers A and F. The pr >gram output pulse from the program control
on accumulator 14 used for the previously mentioned program is delivered to the
input terminal of stepper E« If the digit stored in decade k of accumulator 12
does not exceed 4> the output terminal corresponding to stage 1 of stepper E
delivers a pulse to Fi. Stepper F, acting on the information which it received
from the addition output of accumulator 14, then transmits an output pulse to
stimulate program Pq, P^, ,.,, or P . If the digit stored in decade k of
accumulator 12 exceeds 4> the output terminal corresponding to stage 2 of stepper
E delivers a pulse to A. . Stepper A then emits a pulse to stimulate Pc, P^,
• • • , or r Q •
The pulse output from the terminals corresponding to stages 1 and 2
of stepper E is also taken to a program control on accimiulator 12 whose repeat
switch is set at 2. The output pulse from this transceiver is used to clear
steppers A, E, and F back to stage 1.
10o5.3, Accumulating Values of an Independent Variable
The master programmer is a convenient unit for accumulating, storing
X - 18
and printing values of the independent variable. This may be done by delivering
to a decade direct input, the number of pulses by which the value of the in-
dependent variable is to be increased at a given time or by pulsing a stepper
input. In the latter case, the stepper input must be pulsed in several different
addition times i.f the independent variable is to be increased by more than 1 unit
at a time. At the present time, decades 14 through 18 inclusive, are connected
to the printer. Therefore, it is desirable to choose from among these the
decades to be used for the accumulation of the independent variable.
The decade switches associated with the stepper counter stage involved
in accumulating the independent variable should be set to a number one higher
than the maximum value of the independent variable to be counted so that the
decade counters will not clear to zero before printing is accomplished (see
Section 10,2,2,), After the last printing takes place, the decade counters may
be cleared to zero by feeding one more pulse to either the decade direct input
or to the stepper input after printing. In the event that the criterion for
printing the final result is something other than a certain value of the in-
dependent variable (see Problem 2 of Section 10.6,), it may be necessary to
include a program sequence designed to clear the decade counters,
10 . 5 . 4 . Extending the Program Control Facilities of Other Units
Shpuld the number of program controls on a particular unit prove in-
adequate for some cojbputation, the master programmer may be employed so as to
make possible the repeated use of program controls on that unit at various
times in the set-up.
One way to accomplish this is to deliver the final pulse of the
19
sequence which precedes the program set-up on a rspcatedly used program
control . to that control, Thon the program output pulse of the program
which is used repeatedly goes to the master programmer stepper which determines
which sequence to stimulate subsequently.
Let us suppose, for example, that program control 26 on the constant
transmitter is to be used twice in a canputation, with progi^ams P» and P-^
respectively preceding and following the first use of this constant transmitter
control and with programs Qq and Q-^ respectively preceding and following the
second use of the same constant transmitter control. By delivering the program
output pulse of the controls on which programs P^ and Qq are set up to the
program pulse input terminal of control 26 on the constant transmitter, pro-
vision is made for stimulating this control on each occasion. If, however,
the program output pulse of program control 26 must stimulate program P once
and the next time, program Q^ , this cannot be done directly. Instead, the
output of program control 26 is taken to a master programmer stepper which
determines whether to stimulate program P-, or Q-, .
When high-speed multiplier or divider and square rooter program
controls are used repeatedly in this way, the problem of stimulating the
accumulators which store the a.rgumcnts to transmit may arise. The function
table or another master programmer stepper may be used to provide for this
stimulation. The illustrative problem of Section 8.7. illustrates the re-
peated use of high-speed multiplier program control through the use of the
master programmer (see Figure 8-2 with particular attention to the use of
steppers D-K) ,
In Section 4.5.2, the use of dummy programs set up on accumulators
for the delay of a program pulse was suggested and, in Section 7.4. the use
p.
V
-^p-
o
o
lo
o
n
C\
Dummy
Program
lasting
k add,
ticiea
Z
P
m
4-
P;
Prograra Sequence P^ follo'TS Pq after a delay of n(k.+l)+l addition times
Program Sequenoe Pg folla/fs P-j_ after a delay of Bi(k+l)*l addition tines
) I
Pis;, 10-3
USE (F MASTER PROGILUiMER TO DELAY A PROORAI^ PULSB
X - 20
of a function table program to achieve a longer delay than is possible with
a single accumulator control "was mentioned. *^n alternative method of delaying
a program pulse, and one wliich is practicable for long delays, can be achieved
through the use of the master programmer. This use of the master programmer
is illustrated in Figure 10-3*
10.6. ILLUSTRATIVE PROBLai SET-UPS
Two problems are offered in this section to illustrate the use of
the master progranmier in central programming. Problem 1 uses only link control
to stimulate its sequences. Problem 2 is more complex involving both link and
magnitude control and the use of the master programnier to accumulate the in-
dependent variable.
Both problems are described with reference to a set-up a.nalysis
table, a figure showing the master programmer links, and a setnap diagram. For
problem 2, moreover, there is a set-up tabl^.
In the ^et-iip analysis tables a decimal notation is used to identify
the program sequences s^ti^ s\5tesequences. .The nurrijej? -.separ^^.d from the sequence
identification decimal by a dash indicates the number of times the sequence is
to be iterated into a chadn. For example, the symbols
2-6
2.1 - 10 integrate
2.2 - 1 print
are used to mean that sequence 2, which consists of a subsequence, 2.1, to be
iterated into a chain by its successive performance 10 times and another sub-
sequence, 2.2, to be performed only once, is itself to be iterated 6 times.
In s0t-up tables, (see Table 10-.5) instructions for the master
PA -m- 409
6
MASTEK PROGRAiaiER - PMSL 1
D
o o
o
• ' f
o
o
o
o o
o o o
• • •
• • •
3ta£;e 6
Stage S
Sta«3 1
53tepper Output Terminals
9 9?
Decade Associator Switch Getting
Decade Sv/itch Setting
(associated v/ith stage 1
of stepper S)
Stepi>Gr Clear Switcii Setting
Ifecad© Direct Input Terminal
Stepper Clear Direct Input Terminal
Stepper Input Torminal
Stepper Direct Input Terminal
Fie. 10-4
MASTER PROGRAiuiiER SBT-UP DIAGRAl^I CONVERT IGIIS
1
/"X- 6^0 03
f\
o
CONTPOLS i riE M/^IN 6t QUINCES
I /
i
i
i
^gi^i C "1 /
/t3 /t/ /-3 /'
o
-^T\
:^^rv
D
Controls The Scj33£ouenC€S O/^ Seqlje,'^C£S ^^4
o
o
o' /(9
TTTx
/
\.
X
y
\//\T-
/n/t/ ^T/ NG Pulse
c
!0!
f
With Decades /4 -IB
CooA/rs The Tr^^jecto/?/ /V^r^^E.^s
zoo^
I
X
_::i
'y^'
/V LISTER P/^OGf^finME.'=i L/A/,^S — P/^OSCE'r7 1
r/G. 10 ~s
X - 21
programmer are given in a double column. The input terminal and program line
from which it receives a pulse appear in the left hand half of the column. The
program line designation appears above or below the symbol for the input terminal
according as the line carries a program pulse or digit pulses. The output ter-
minal through which a program output pulse (if any) is transmitted and the program
line to which the output pulse is delivered appear in the right hand half of the
column.
The set-up diagram conventions for the master programmer Bxe shown
in Figure 10-4 ^
The master progransner link diagrams are essentially block diagrams
designed to si-ir:imarize the way in which the various program sequences of a problem
are tied together by the master progratiiraer . The conventions used in these
diagrams appear at the lower left of Figure 10-1, On these diagrams, we have
used two different symbols for dummy programs, namely — -• • * and (d) •
This is done to distinguish between the purposes for which the dioramy programs are
used. A dummy program used to isolate program pulses is symbolized by • • ;
one used to achieve a delay of d addition times by (d) ,
10.6,1. Problem 1
Problem 1 suggests a possible method of setting up the ENIAC to
compute the trajectories needed to make an anti-aircraft table. The number of
trajectories to be computed has arbitrarily beeri taken as 200. The number of
integration stops performed before printing has also been arbitrarily taken as
10, and it is assumed here that 60 integration steps will adequately cover the
required range. Obviously, numbers other than these could be chosen at the
operator's discretion and convenience. Sequences 3 and 4 (see Table 10-3 and
Figure 10-5) together constitute a test run.
X - 22
TABLE 10-3
SET-UP ANALYSIS ~ PROBLia^ 1
1--1 Selective clear
Reaci
Transinit from Coritant Transmitter to Accumulators
2-6
2ol - 10 integrate
2,2-1 print
3-1
Selective clsar
Read
Transmit from Constant Transmitter to Accumulators
4-1
4.1 - 10 integrate
4.2-1 print
I
O O
o o o
1 3
MASTER pRCHiRflnMER
Panel 1
R
C
c
0
6
e
C
'z
' 0
0
ri
0
e
1
i
1
1
i
-
.
A
4
e
c
2
D
2
£
o o
o o o
• • •
• • •
o o
o o o
• •
o 0 o
o o
© o o
• • •
• • •
MipMMwn)inia|*Bvip>«!n
1
4 S
/d
X - 23
In sequence 3> this set-up assumes that the initial conditions for
the test run wiil be read from an %M «ard different from the one which held
the initial conditions for the previous trajectory, This is not meant to in-
dicate that such a procedure is the only possible one. Depending on the amount
of information to be put on the IBI cards or to bo set up on the constant set
switches of the constant transmitter, the initial conditions of the test run
could be put on the same JEM card as those for the previous trajectory or set-
up manually on the constant transmitter.
Stepper C (with decades 14-18 associated) is used to count the
number of trajectories (see Section 9.4.). After 200 trajectories have been
computed further computation sequences will not be initiated. As stepper C is
s-et up here, the 200th card will be punched with serial number zero.
Four stages of stepper counter A are used to advance the computation
through its four main sequences. Stage 1 of stepper counter D is devoted to
the chain of 10 integrations (2.1-10 and 4A-10) and stage 2 to the printing
sequence (2,2-1 and 4.2-»l)»
10,6,2. Problem 2
This problem set-up again involves the sequential computation of a
number of trajectories. Here, however, the set-up is one that would be suitable
for ground gunfire trajectories. Results are printed not after a constant number
of integration sequences (and thus, at even intervals of time if time is the in-
dependent variable) but, instead, only in the neighborhood of the svanmit and
ground. This is accomplished by following each integration sequence with a test
to determine the magnitude of y* or y. Wnen the projectile goes below ground,
computations cease, a test run is performed, and then the next trajectory is
initiated.
X - 24
TABLE 10-4
SET-UP ANALYSIS —
1-1 Initial Sequence
Head IBM card and selective clear
Transmit initial conditions from constant transmitter to accumulators*
2- Until y+c2 <^0 (see- Seq. 2.5) below.
2.1-1 Integrate
2o2- Repeat as long as y'-c^^ ^0
Test y'-C]_ and then integrate
2.3- Repeat as long as y' +c, ^0
Test y' +c , print, and then integrate
2.4- Repeat as long as y - c^ ^ 0
Test y - Cp and then integj'ate
2.5- Repeat as long as y + C2 ;?• 0
Test y + C2, print, and then integrate
3-1 Pr:' nt
4--1 Clear the decades of the master prograjnraer which have been accumulating
the independent variable and clear all other steppers which require
clearing in preparation for the next trajectory computation.
5-1 Test run
5.1-1 Transfer initial conditions from constant transmitter to
accumulators'
5.2-10 Integrate
5.3-1 Print
■It is assumed here that the initial conditions for the test run are set up on
the constant set switches of the constant transmitter or read from the lEM card
for the previous trajectory so that a new card need not be read for the test
ran's initial conditions.
1
PX-8-^^.^ 4
i»friii^*«.iiniiijiw
Result of
Discrimination
Program
Sequence
Performed
and then
Int©>rrate
Test y' ^
Print
Integrate
lest y - C^ and then
Integrate
I Test y ^ C
Print and then
IntepTate
Initiate
Cequence 2
FiGucE IQ- 7
Subsequences of 5eq.2-Problem 2
X - 25
The sequences of this problem are defined in table 10-4. Sequences
1 through 3 cover the computations for a trajectory. The breakdovm of sequence
2 into its component subsequences is shown pictorially in Figure 10-7.
It is assumed in this set-up that the value of the independent variable
is stored in and printed from decades 14-18 (associated with stepper C) of the
master programmer. Computation, for a given trajectory, ceases, not at a fixed
v;.3ue of the independent variable, but when the projectile has gone past ground
■r-arge (see Figure 10-7), This means that the decade switches associated with
,-3tage 1 of stepper counter C must be set at a number safely in excess of the
highest value of the independent variable that can be expected in any of the
trajectory computations, (For the problem under discussion, we will arbitrarily
take this number to be 80.0 with tenths place registered in master programmer
decade 14), Furthermore, we cannot depend on clearing decades 14-18 as a result
of arriving at the setting of the decade switches associated with stage 1 of
stepper C, For this reason, sequence 4 is included in the set-up. The details
for cari'^ying out this sequence will be explained in section 10.6,2,2,
oequoncc 5 constitutes a test run. The plan of the problem calls for
a tept run after each trajectory has been completed.
The master programmer links for this problem are shown in Figure 10-8,
Steppers A, C^ D, E, and F are used.
Stepper A controls the main sequences of the computation with the out-
put of stage i stimulating sequence i+1. Stepper C records' the value of the
independent variable and steppers C and D have been so interrelated as to make
possible the clearing of decades 14-18 after the projectile goes below ground,
T'ne sa^e integration sequence is performed as a subsequence of both sequence 2
ar:d vS6-iuence >e Scepper E is used to choose the routine to be performed after
■'Ki.n :-,e. [iK: .ice 2, hcwever, the integration sequence is accompanied by programs
concerned with accuiiiulating the independent variable. In Sequence 5, we do not
record tne independent variable.
^£ a. I
I- I
PuL5 E
A
CoNT/^OLS The Main SeGU£Nce
. Of Seq. 5
l-Z —
F/G./O-Q
X - 26
integration, with stage 1 motivating the routine in sequence 2, and either
stage 3 or 4, the routine in sequence 5. Stage one of stepper E routes control
to stepper F. This stepper participates in sequence 2, determining which of
the subsequences of sequence 2 is to be performed at any given time,
10.6.2.1, Sequences 1, ^ and 3,
The initiating pulse, at the very beginning of a computation, and
thereafter, the output of stage 5 of stepper A stimulates the performance of
sequence 1 and thus initiates the computations for a trajectory and its test
rim.
The final pulse of sequence 1, pulse 1-2, goes to stepper A. Pulse 2-1,
delivered by a,0, stimulates the performance of sequence 2,1 (integration) and
also causes the value of the independent variable to be increased. It is assumed
here that the increment to the independent variable is 0.2 (see Section 10.6.2.2.).
Pulse 2-1, thru dximray program M goes to the direct input of decade 14 and to Ci
to produce the required increment , Dummy program M is used to isolate the pulse
which goes to Ci and to 14 di from the pulse which stimulates the integration
sequence since, in sequence 4, we shall desire to stimulate Ci and 14 di without
stimxilating the other programs initiated by pulse 2-1 (also see Section 10.6.2.2.),
Dummy program N intervenes between 2-1 and the pulse which stimulates the
integration sequence, pulse 2-3> since, in sequence 5, it is necessa,ry to stim-
ulate the integration sequence without stimulating the associated programs of
sequence 2. Pulse 2-1 is also taken to E cdi to return stepper E to stage 1
as long as sequence 2 is performed.
The terminal pulse of the integration sequence, pulse 2-7, goes to Ei
of . .
and the output E, 0 stimulates Fi. Before the summit range, stepper F is m
A 1
stage 1 so that pulse 2-10 is emitted. This pulse stimulates the performance of
X - 27
the test on y^-Cn (see Section 10,6,2,4. for details of the tests in sequences
2,2-2.5) and through dummy program P, brings the computation back to 2-1 which
initiates the programs discussed in the previous paragraph. Dumniy program P
isolates the integration sequence from the test of y'-c-i so that .later (as in
sequence 2,4) the integration maybe performed with a different test. As long
as y'-CT remains non-negative stepper F remains in stage 1, ViJhen y'--c-|_ is
negative for the first time, the test on this quantity yields pulse 2-9 which
advances stepper F to stage 2, Vi/}iile the test on y'-c-, goes on, the pulse emitted
by dummy program P, initiates the integration sequence*
V/hen the integration sequence is completed, pulse 2-7 is emitted, and
then pulse 2-8, This time, stepper F is in stage 2 so that pulse 2-11 is emitted
by stepper F. Pulse 2-11 stimulates the test on y' ^c^^ and, through d\jmmy program
Q, causes the emission of pulse 1-2, Since pulse 1-2, given out as the terminal
pulse of sequence 1, advances stepper A to stage 2, this time, pulse 1-2 causes
stepper A to emit pulse 3-3 (and advance to stage 3), This pulse stimulates
printing. Pulse 2-11 is also taken to dummy program R for a delay of 4 addition
times. Dummy program R emits pulse 1-3 which clears stepper A back from stage 3
to stage 1 so that when the printing is completed with the emission of pulse 1-2,
stepper A again emits pulse 2-1 (and advances to stage 2). Pulse 2-1 stimulates
the performance of the integration sequence and associated programs. Sequence
2,3 is then repeated until y'+c^ becomes negative, kt that time stepper F
advances to stage 3. vVhenever integration is completed in this phase of sequence
2, pulse 3-1 is given out. This pulse stimulates the test on y-C2 and, through
dummy program S, stimulates the integration sequence as was described above for
sequence 2,2,
X ~ 28
When y*C2 becomes negative, stepper F is cidvrnced to stage 4. In this
p&rt of sequence 2, pulse 3-2 stiiriulates the test of y+c^ and, through dummy
programs T andU, stimulates printing and then integration as described above
for sequence 2,3.
^Vhen y+Cp is negative for the first time pulse 2-9 is given out so that
stepper F advances to stage 5.
Thus, when the integration initiated after the test which yields
y^-Co^O has been completed, pulse 1-2 is emitted by F 0.
Pulse 1-2 finds stepper A in st?-ge 2 so that pulse 3-3 is given out and
printing is stimulated. This completes sequence 3.
We note that at the end of sequence 3 the following state of affairs
exists in the master prograjnmer;
Stepper Stage of Stage of
Stepper i-^ssociated decades
A 3 0
C 1 d i 800
D 1 0 (see Section 10,6.2,2.)
E 2 0
F 5 no decades,
10.6.2.2, Clearing the Decades which Store the Independent Variable; -Sequence 4
In the course of sequence 2, we have been increasing the value of the
independent variable by 2 in decade 14 with every repetition of the integration
sequence. Pulse 2-2, taken to the decade direct input, accounts for an increase
of 1 unit and, taken to Ci, accounts for an increase of one more unit. Pulse
2-2 also causes pulse 2-4 to be emitted. This pulse goes to Di causing stepper
D to advance to stage 2 and pulse 2-5 to be emitted. This pulse, delayed for
two addition times by dummy program W, restores stepper D to stage 1 as long as
X - 29
sequence 2 is in progress.
At the end of sequence 3 (the last printing for a trajectory), pulse
1-2 is delivered to Ai. Pulse 4-1 is then given out by A 0 and stepper A advances
to stage 4.
Pulse 4-1 advances stepper D to stage 2 and, through dummy program V,
goes to both Ci and 14 di. Since we assumed that the settings of the decade
switches associated with stage 1 of stepper C safely exceeded the maximum value
of the independent variable, stepper C is found in stage 1 at this time. Thus
2-4 is given out to stiiiKilate Di and, because 4-1 advanced stepper D to stage 2,
pulse 4-3 is emitted. One addition time after pulse 4-3 is given out stepper D
cycles back to stage 1, However, pulse 4-3, delayed for two addition times by
dummy program X, yields 4-1, Pulse 4-1 then causes the repetition of the programs
described at the beginning of this paragraph.
Now, let us assume that the last printing for a trajectory takes place
when the independent variable has the value 10*-^ (800 -2ffi). Then, the output of
A 0 causes the decades of stepper C to register 800 -^2 (m-1) and, finally,
causes diimmy prograra X to emit a pulse for the 1st time. This, in turn causes
the decades of stepper C to advance to 800-2(m-2) a.nd causes dummy program X
to emit pulse 4-1 for the 2nd time etc. The (m-1) st pulse emitted by dummy
program X causes decades 14-18 to reach 800 and also causes the emission of 2-4
which results, finally, in the emission of pulse 4-1 by dummy prograi-.i X for the :■
m time. Stepper C advances to stage 2 and its decades clear to zero before the
th
m pulse from dummy program X causes Ci to be pulsed again. Therefore, this time
pulse 4-1 causes pulse 4-2 to be emitted from C^O. Pulse 4-2 goes to F cdi to
J. u,
restore this stepper to stage 1, Since the m pulse emitted by dummy program X
steps D to stage 2, it is necessary also to clear stepper D in preparation for the
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X - 30
trajectory to follow the test run. This is done by the output of dummy program
Z. Pulse 4-2, through dioramy program Y, yields 1-2 -which goes to Ai. Pulse 5-1,
the output of A 0, initiates sequence 5,
A-
It is to be noted that the method described above for clearing stepper
C requires that the settings of the decade switches for stages 1 and 2 be multiples
of the increment to the independent variable,
10 •6, 2, 3. Sequence 5.
The output of A 0 stimulates the performance of sequence 5-1 in which
4
the accumulators used for integration and printing are cleared and in which the
initial conditions for the test run are transferred from the constant transmitter
to accuraulators. The last pulse of sequence 5*1, pulse 2-7, is delivered to Ei.
Pulse 2-j^ emitted from E 0, stimulates the performance of the integration
sequence. After 10 integrations have been stimulated, E advances to stage 3
so that pulse 2-7, delivered to Ei at the end of the 10th integration, causes
3-3 to be emdtted. Pulse 3-3 stimulates printing and the output of the printing
, pulse 1-2, causes stepper A to emit pulse 1-1 from A 0 and then to return to
5
stage 1, Pulse 1-1 initiates the computations for the next trajectory. No
provision has been made for counting the number of trajectory computations and
terminating computations after a specified number. Instead, we rely upon the
exhaustion of the cards in the reader^ s magazine to terminate computation (see
Chapter VIII),
10,6,2,4» Tests on y and y'
The tests on y'-c , y' +C-, etc, included in sequence 2 are described
with the aid of Table 10-5 and Figure 10-9 (a-c). All 4 tests have been planned
in such a way as to use the same program controls wherever possible. In table
10-5 the progrfjm controls used in each of the 4 tests are stim.ulated by pulses
carried in program tray 7j those controls common to only 2 of the tests are
stimulated by pulses carried in program tray 6.
XI - 1
XI, SYNCHRONIZING, DIGIT, AND PROGRAi/I TRANSLilSSION SISTQdS AND SPECIAL EQUIBAENT
There are three principal types of dynsunic communication between units
of the ENIAC: l) communication of the synchronizing pulses and gates, 2) digit
pulse communication, and 3) program pulse communication. These three types of
communication are accomplished through the use of conductors mounted in trays,
which, except for their outlets, are identical for all three purposes. Each
tray has a ground and 11 conductors separated from one another by metal shields
and has the dimensions 8 ft. x 9 in, x 1,25 in. Since each panel of the ENIAC
is two feet wide, each tray extends the length of 4 panels. Found at both ends
of a tray is a 12 point terminal. Trays can be connected serially to one another
by jumper connections between these end terminals. Communication.- of types 1 and
2 above is by means of so called digit trays. These have twelve point termi-
nals at 2 foot intervals. The digit tray is shown on PX-4-102. Program trays
which have a set of 11 two point (1 wire and ground) outlets at 2 foot intervals
are used for communication of type 3. The units of the ENIAC are connected into
these trays by means of digit or program cables.
The synchronizing, digit, and program transmission system and associated
equipment such as load resistors, shifters, deleters, etc. are discussed in the
following sections: Transm.ission of Synchronizing Pulses and Gates, Section 11.1;
Transmission of Digit Pulses, Section 11, 2j and Transmission of Progrsjn Pulses,
Section 11.3, Pulse amplifiers which may be used in either the digit or program
transmission system are discussed in Section 11,4*
The semi-perm-anent connections between accumulators and the printer,
high-speed multiplier, and divider and the interconnection of accumulators are
treated in Section 11.5.
XI - 2
A portable control box which ptira^llels cortain controls on the
initiating and cycling units is discussed in Section 11,6,
Ua. SYTJCI-IRONIZING TRUNK
Nine digit trays connected in series by iioiKpers from the synchronizing
trunk which delivers to the other >':1:>..'IAC u:'iit3 the 9 trains of pulses and the
carry clear gate emitted by the cycling unit and the selective clear gate emitted
by the initiating unit,-, The synchroni^'.ing trunk runs around the back of the
ENIAC below the venhilating pjinels from the initiating unit up imtil (but not
including) panel 3 of the const-^nt transmitter. The lines marked (j/) through (ll)
on PX-4-'102 are used for the following pulses or gates:
® GPP CS) RP
© IP (7) i.p
® 9P (D CCG
® lOP (2) 2P
(?) SCG @) 2'P
A cable with a 12 point plug at either end is used to bring into each unit the
fundamental pulses and gates,
11.2, DIGIT TRANSIvIISSION
11.2.1. Digit Trunks
Seventy-two digit trays (in addition to the 9 trays for the synchroniz-
ing trunk) have been built for the ENIAC, These trays can be stacked on a shelf
Cibove the svdtch panels of the units from panel 1 of function table 1 to panel 2
of the cc^istant transmitter inclusive. As many as 8 trays on one level can be
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XI - 3
connected by jumpers. The load resistor (or load box) shown on PX-4-103 is
plugged into an unused terminal usually on either the first or last tray of a
set of jumper connected trays (certain Qyc^eptions to this statement are noted
in Section 11.2.4.), The digit input and output terminals on the various units
are connected into the digit trays by means of digit cables, A three-way plug
is used at a digit tray terminal when more than one digit terminal of a unit is
connected to a partitular digit tray terminal. The term digit trunk is used to
refer to a set of jumper connected digit trays, the load box at one end, and the
digit cables which connect units to the set of digit trays.
In digit trunks, the lines marked 1 through 10 on PX-4-102 carry the
digit pulses for decade places 1 through 10 respectively and line' 11 carries
the PM pulses (also see Section 11,2,2,),
11,2,2. Shifters, Deleters, and Adaptors
Shifters, deleters, or adaptors, used between digit cables, and digit
terminals on the units, when it is desired to establish a special relationship
between the decade place leads of the transmitting and receiving digit terminals,
consist of specially wired 12 point plug and socket assemblies. Shifters are
used to effect multiplication by powers of 10, deleters to eliminate digit pulses
on certain decade place leads, and adaptors for other special purposes such as
taking digital information to program lines.
The shifters which have been constructed at present are shown on
PX-4-104 A-E, ?/hile in some cases special shifters could be built for use at
digit output terminals, these shifters are for use only at digit input terminals.
The terminology used here is that a +n shifter (for n positive) multiplies a
number by 10 (or shifts data n places to the left)^ a -n shifter multiplies a
number by 10 (or shifts data n places to the right) »
XI - 4
The following connections are made bet-ween the socket ('S) and plug
(?) leads of the +n shifters:
s [r^J ^ p [m]
S jn left hand 1 — ^ Not connected to anjrthing
jdecade places]
S jdecade places")— ;^P [decade places i -^ nl respectively
Ground —7 P |"n right hand decade places J
The connections established in the -n shifters are the following:
S jjMJ ^ p fpM and n left hand decade places]
S |"decade places]— ^P fdecade places i - nl respectively
S jn right hand j-^Not connected to anything
decade places |
Notice that connections in the shifters for translating numbers n places to the
right are made in such a v«ay as to duplicate the PM pulses in the n left hand
decade places of the receiving unit. Thus, for example, the number carried in
a digit tray as M 4 823 000 000 is received through a -3 shifter in an accumulator
as M 9 994 823 000, Because of the necessity of duplicating sign pulses in the
n left hand decade places when a negative number is shifted to the right, a
right hand shifter ftould not be designed for use at a digit output terminal
for such a shifter would causp the PM transmitter to be loaded with the capacity
of two or more lines in the digit trunlt and would tie these lines together, thus
making the trunk a special purpose trunk.
From the description of the +n and -n shifters above, it can be seen
that if a -»-n shifter were used at a digit output terminal, the shift with regard
to the n left hand decade places transmitted would be equivalent to that which
results when a -n shifter is used at a digit input terminal. However, this
interchange cannot be made because, in the case of a negative number, sign pulses
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XI - 5
are not duplicated in the n left hand decade places. Similarly a -n shifter
cannot be used at a digit output terminal to accomplish a shift to the left
because the n right hand decade place leads at the receiving end are not grounded.
The deleters which have been constructed are tabulated on PX-4-109.
The deleters omit socket to plug connections for the leads associated with the
decade places which are deleted. The deleters on PX-4-109 are designed for use
at digit output terminals. Special deleters could be built for use at digit
input terminals. Such deleters would ground the plug leads for the deleted
decade places.
Certain special adaptors which combine shifting and deleting character-
istics have also been constructed. These are shown on PX-4-117. These adaptors
have the following properties;
3A 5 place to the right shifter with sign deletion
5A 5 left hand and B/I place deleter
8A 1 place to the right shifter with sign deletion
4A 5 place to the left shifter with output of decade
place 5 brought also to the PU. lead
6A 3 place to the left shifter with sign deletion
lOA m deleter
7A 5 place to the right shifter with sign deletion.
Adaptors for use at 12 point terrain.als on the divider and square rooter
which function in a programming capacity are described in Section 6.4.2,
11^2,3, Load Units for Dif,:it Trunks
The capacity to ground of any line in a tray is approximately 120
micro-farads. This capacity, plus that of the short jumper used to connect
one tray to the next, is called a load unit. The capacity of a three foot cable
XI - 6
for connecting a digit input or output terminal to a digit tray is roughly equal
to a load unit. Adaptors have negligible capacity. In order to obtain pulse
rise tines within the proper limits for safe and reliable operation of the ENIAC,
the total nunber of load units (which equals the number of jumper connected trays
plus the number of digit cables plugged into the trays) of a given digit trunk
must not exceed 60 (also see Section 11.4.)
11.2.4. Special Uses of Digit Trays Vfithout Load Boxes
A load box is used on all digit trunks formed by connecting digit
trays together. Because the trays have been designed so that the load resistor
is plugged into the unused terminals of one of the end trays of a trunk, the
flexibility of being able to connect varying numbers of digit terminals to the
trunks is possible.
In a few special cases, the resistance has been built into circuits
of the units and certain single digit trays connected to these units by digit
cables are used without load boxes. No other units may be connected in parallel
into these trays.
In the case of the divider and square rooter (see PX-6-311), the
following associated digit trays are used without load boxes:
1) the single digit tray which carries components of the answer
from the answer output terminal to the quotient accumulator's
a input terminal and to the denominator accumulator' s y input
terminal,
2) the digit tray ' which carries proRramming instructions from the
^^unninrr from the divider and square rooter to accumulrtor 5. J^ special short
cable connects this digit tray to the a input terminal on the quotient accumu-
lator and another cable connects this tray to the y input terminal of the
denominator accuraulator . n + c •
-"-"-A single tray running from the divider and square rooter to accumulator 5 is
used.' Special cables (see PX-10-307) are plugged from this tray to the inter-
connector terminals on accumulators 2 and 7.
XI - 7
quotient and shift accumulator program terminal on the divider and
square rooter to interconnector terminals on accumulators 2 and 7
3) the di^it tray which carries prop:ramiiiing instructions from the de-
nominator and square root accumulator program terminal to accumu-
lator 5.
In the case of the high-speed multiplier, a digit tray without load
box is used to connect each of the three partial products output terminals
LHPP II, RHPP I and II to the appropriate accumulator, A special short digit
resistor
cable without.load connects the LHPP I terminal to accumulator 11 and, for
safest operation, the three lowest digit trays are used for the other three
partial products.
11,3, PROGRAJA TRANSIvIISSION
11»3«1» Program Lines
Eighty one program trays have been constructed for the MIA€, These
trays, like the digit trays, are 8 feet long, have 11 wires and a ground, and
at either end, have 12 point terminals so tha.t a number of program trays can
be jumper connected to form a prograia trunk. The prograrA trays, however, have
a group of eleven 2 point terminals spaced at 2 foot intervals instead of the
12 point terminals found on digit trays. A program pulse input or output terminal
of a unit is connected to a program tray by means of a progroji cable which has a
two point plug on each end (1 wire and a shield). In general, a load box
(see PX-4-103) is plugged into an unused terminal at one end of program trunk.
The term program line is used to refer to one conductor running the length of
a set of jumper connected program trays and the program cables plugged into the
conductor a
XI -
Fifty digit - proj5;rai-a adaptors have been made. Each of these consists
of a box with a 12 point digit plug connected to a group of 11, 2-point program
sockets. These adaptors make it possible to use digit trays as program trays.
11.3.2, Special Program Cables
In addition to the standard progra-m cables, a number of special U
and Y program cables have been assembled. The U cable has a 2 point terminal
on either end and a built in load. It is used to connect two program terminals
on the same unit or on adjacent units without going into a program tray. The Y
cable has three 2 point plugs. This latter type is used #ien it is desired to
connect 2 program terminals on the sarae unit and also to connect to a program
line,
11.3.3. Load units for Program Trays
In the case of program lines, as in the case of digit trunks, the
number of load units must be restricted in order to provide suitable time con-
stants for safe and reliable operation of the ENIAC, For program lines which
carry only program pulses the total number of load units (number of jumper con-
nected program trays through vi/hich the line runs and program cables plugged into
the line) must not exceed 120. A program line which carries digit pulses, a
case which can arise in magnitude discrimine^tion programs for e^xample, must not
have more than 60 load units. The more stringent restriction of load units is
made for lines carrying digit pulses particularly because the short interval
between successive digit pulses makes necessary an especiaJLly short rise and
fall time for digit pulses for safe resolution of these pulses. Also, the digit
pulses are slightly broader than the program pulst^^s so that even in the case
where only 1 digit pulse is tr.ansmitted in a given addition tirae, for the most
reliovble operation, it is best to restrict the number of load units to 60.
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XI - 9
11,3.4. Special Prop^ram Lines Without Load Resistor
Program lines mthout a load resistor are used to carry stimulating
signals to the following prograra input torminals:
I3 and R3 on the initiating unit (see PX-9-302)
PA, Ik, and Cont. on the cycling unit (see PX-9-303).
If desired, special program cables without resistance load nay be used instead
of lines in program trays. Also, see Section 11,6. for a discussion of the
portable control box which can be used to parallel these terminals.
11,4. PULSE AMPLIFIER
Three pulse amplifier units (and chassis for two more) have been con-
structed. The pulse amplifier unit provides a means of circumventing the load
limit restriction (see Sections 11,2.3. and 11.3.3.) on the total number of digit
terminals or program terminals that can be connected for communication with one
another and also is capable of being used to isolate program pulses.
This device contains eleven identical circuits, each consisting of
a buffer and transmitter (see PX-4~301) . A signal delivered to the pulse
amplifier by way of one of the leads of the 12-point terminal at the left
of its front face, passes through the associated buffer and transmitter and is
corresDondinp' lead of the
eniitted from the,c)utpul terminal on the right side. Power for the pulse amplx-
fier is obtained by connecting the terminal on the left face to one of the four
12-point terminals at the bottom of the diagonally placed panels at either end
of the wall containing the high-speed multiplier.
If two trays are connected by a pulse amplifier, each tray may have
as many as the maximum nmiber of load units specified for that type (digit or
program). Furthermore, data transmitted through the tray connected to the input
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ISOLATIOli OP PROGRAMS THROIKJH THE USE OP A PULSE AMPLIFIER
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XI - 10
of the pulse amplifier is comiaunicated to the tray connected to the pulse
amplifier's output. Data carried on the tray connected to the pulse ajnplifier's
output, however, is not conrnunicated to the tray connected to the input. For
example, in Figure 11-1, the a input of accumulator 1 can receive from only the
A output of accumulator 2; the g input of accumulator 2 can receive from both
the A and S outputs of accumulator 2,
Through the use of 2 pulse amplifiers, two trays can be connected
so that there is bidirectional communication between them. In Figure 11-2, for
example, both the a and p inputs on accumulator 1 can receive from either the
A or S outputs of accumulator 2,
The unidirectional communication in one of two trays connected by a
pulse amplifier provides a means of using a pulse ajnplifier instead of one or
more dummy program controls to isolate program pulses » In Figure 11-3, the
schematic drawing shows two set-ups that are logically equivalent: one uses
a dummy program controlj the other, a pulse amplifier.
11.5. SPECIAL INTERCONNECTION OF UNITS
11.5.1. Connections to the Printer
The units whose static outputs are delivered to the printer so that
data stored in them can be recorded are listed in Section 9.4. The reader is
also referred to the following diagrams:
Static Output Cable PX-4-111
Printer Adaptors PX-12-114
11 . 5 . 2 , The High-Speed Multiplier and Its Associated Accumulators
The accumulators connected to the high-speed multiplier for the
communication of digital .and progrojnming information are discussed in Section 5.4.
*•
XI • 11
Reference is also made to the following diagrams:
Interconnection of High-Speed
Multiplier with Associated
Acciamulators PK-6-311
Static Output Cable ' PX-4-.111
Accumulator Interconnect or
Cable (Multiplier) PX-5-131
11,5,3. The Divider and Square Rooter and Its Kssociated Accumulators
The connections established between the divider and square rooter and
its associated accumulators are described in Section 6.4. The interconnection of
these units is pictured on PX-1.0-307 and, on this same drawing, reference is made
tt the drawings of special cables and adaptors used,
11*5,4, Interconnection of Accumulators
In Section 4,4,2, the interconnector terminal connections for using
one accumulator as a 10 decade accumulator or for using 2 accumulators as a 20
decade accumulator are discussed. The following diagrams are relevant to that
discussion:
Accumulator Interconnector Terminal
Load Box PX-5-109
Accumulator Interconnector Cable
(Vertical) PX-5-121
Accumulator Interconnector Cable
(Horiziontal) PX-5-110
Accumulator Program Front Panel PX-5-105
11.6. PORTABLE CONTROL BOX
Certain initiating unit and cycling unit controls which are particular-
ly useful in testing the operation of the ENIAC have been described in Chapters
II and III. These controls include:
XI - 12
Initial Clear Switch
Reader start switch and terminal R
which parallels the switch
Initiating Pulse Switch and terminal
I which parallels the switch
Operation selector switch for switching
from IP to either lA or continuous operation,
and the terrainals lA and Cont. which parallel
this switch
1 Pulse or 1 Addition Time Switch and the
terminal Pa which parallels this switch
Section 2.1,2.
Section 2,2,
Section 2.2.
Section 3«2,
Section 3.2,
In Chapters II, and III there was described the direct operation
of these controls at the initiating and cycling units or, except for the
initial clear control, from anywhere in the ENIAC room with the aid of special
program lines without load resistor.
The portable control box provides a third and more convenient means
of operating these controls and the initial clear button. By means of a cable
the portable control box is connected directly into the circuits of the controls
mentioned above. This cable is long enough to permit the use of the control box
anywhere in the EMIAC room. The controls on the box reading from top down are:
l) Operation selector switch for switching to 1 addition time or
continuous operation when the operation selector switch on
the cycling unit is set at 1 pulse time.
XI - 1-
2) Initial clear button which, when pushed, causes initial clearing
to take place, ( Operation selector switch must be set at Cont»
when initial clear button is pushed,)
3) Reader start button which is used to stimulate the reading of
a card. Terminal Rq emits a pulse when reading initiated in this
way is completed, without the reception of an interlock pulse at Rl,
4) Initial pulse button which, when pushed, causes a program output
pulse to be emitted from terminal I^ on the cycling unit,
5) 1 Pulse ~ 1 Addition push button, Vdth the operation selector
switch set at IP or Ik respectively, one pulse or the 1 addition
time sequence of pulses is given out each time this button is
pushed.
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